Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
phy: qcom-qmp-combo: use v6 registers in v6 regs layout
Make sure that we use only v6 registers in qmp_v6_usb3phy_regs_layout.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230928105445.1210861-4-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
authored by
Dmitry Baryshkov
and committed by
Vinod Koul
b5ec2824
5077b136
+12
-7
+6
-6
drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+6
-6
drivers/phy/qualcomm/phy-qcom-qmp-combo.c
···
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};
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static const unsigned int qmp_v6_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
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-
[QPHY_SW_RESET] = QPHY_V5_PCS_SW_RESET,
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-
[QPHY_START_CTRL] = QPHY_V5_PCS_START_CONTROL,
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-
[QPHY_PCS_STATUS] = QPHY_V5_PCS_PCS_STATUS1,
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-
[QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V5_PCS_POWER_DOWN_CONTROL,
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+
[QPHY_SW_RESET] = QPHY_V6_PCS_SW_RESET,
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+
[QPHY_START_CTRL] = QPHY_V6_PCS_START_CONTROL,
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+
[QPHY_PCS_STATUS] = QPHY_V6_PCS_PCS_STATUS1,
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[QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V6_PCS_POWER_DOWN_CONTROL,
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/* In PCS_USB */
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[QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V5_PCS_USB3_AUTONOMOUS_MODE_CTRL,
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[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V5_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
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+
[QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL,
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[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
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[QPHY_COM_RESETSM_CNTRL] = QSERDES_V6_COM_RESETSM_CNTRL,
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[QPHY_COM_C_READY_STATUS] = QSERDES_V6_COM_C_READY_STATUS,
+2
-1
drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
+2
-1
drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
···
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6
#ifndef QCOM_PHY_QMP_PCS_USB_V6_H_
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#define QCOM_PHY_QMP_PCS_USB_V6_H_
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-
/* Only for QMP V6 PHY - USB3 have different offsets than V5 */
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#define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
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+
#define QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL 0x08
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+
#define QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR 0x14
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#define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
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#define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
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#define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
+4
drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
+4
drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
···
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#define QCOM_PHY_QMP_PCS_V6_H_
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/* Only for QMP V6 PHY - USB/PCIe PCS registers */
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+
#define QPHY_V6_PCS_SW_RESET 0x000
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+
#define QPHY_V6_PCS_PCS_STATUS1 0x014
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+
#define QPHY_V6_PCS_POWER_DOWN_CONTROL 0x040
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+
#define QPHY_V6_PCS_START_CONTROL 0x044
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#define QPHY_V6_PCS_POWER_STATE_CONFIG1 0x090
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#define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0x0c4
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#define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0x0c8