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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'linux-can-next-for-6.19-20251112-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next
Marc Kleine-Budde says:
====================
pull-request: can-next 2025-11-12
this is a pull request of 11 patches for net-next/main.
The first 3 patches are by Vadim Fedorenko and convert the CAN drivers
to use the ndo_hwtstamp callbacks.
Maud Spierings contributes a patch for the mcp251x driver that
converts it to use dev_err_probe().
The next 6 patches target the mcp251xfd driver and are by Gregor
Herburger and me. They add GPIO controller functionality to the
driver.
The final patch is by Chu Guangqing and fixes a typo in the bxcan
driver.
linux-can-next-for-6.19-20251112-2
* tag 'linux-can-next-for-6.19-20251112-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next:
can: bxcan: Fix a typo error for assign
dt-bindings: can: mcp251xfd: add gpio-controller property
can: mcp251xfd: add gpio functionality
can: mcp251xfd: only configure PIN1 when rx_int is set
can: mcp251xfd: add workaround for errata 5
can: mcp251xfd: utilize gather_write function for all non-CRC writes
can: mcp251xfd: move chip sleep mode into runtime pm
can: mcp251x: mcp251x_can_probe(): use dev_err_probe()
can: peak_usb: convert to use ndo_hwtstamp callbacks
can: peak_canfd: convert to use ndo_hwtstamp callbacks
can: convert generic HW timestamp ioctl to ndo_hwtstamp callbacks
====================
Link: https://patch.msgid.link/20251112184344.189863-1-mkl@pengutronix.de
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+446
-152
+5
Documentation/devicetree/bindings/net/can/microchip,mcp251xfd.yaml
+5
Documentation/devicetree/bindings/net/can/microchip,mcp251xfd.yaml
+1
-1
drivers/net/can/bxcan.c
+1
-1
drivers/net/can/bxcan.c
+22
-23
drivers/net/can/dev/dev.c
+22
-23
drivers/net/can/dev/dev.c
···
379
379
}
380
380
EXPORT_SYMBOL_GPL(can_set_static_ctrlmode);
381
381
382
-
/* generic implementation of netdev_ops::ndo_eth_ioctl for CAN devices
382
+
/* generic implementation of netdev_ops::ndo_hwtstamp_get for CAN devices
383
383
* supporting hardware timestamps
384
384
*/
385
-
int can_eth_ioctl_hwts(struct net_device *netdev, struct ifreq *ifr, int cmd)
385
+
int can_hwtstamp_get(struct net_device *netdev,
386
+
struct kernel_hwtstamp_config *cfg)
386
387
{
387
-
struct hwtstamp_config hwts_cfg = { 0 };
388
+
cfg->tx_type = HWTSTAMP_TX_ON;
389
+
cfg->rx_filter = HWTSTAMP_FILTER_ALL;
388
390
389
-
switch (cmd) {
390
-
case SIOCSHWTSTAMP: /* set */
391
-
if (copy_from_user(&hwts_cfg, ifr->ifr_data, sizeof(hwts_cfg)))
392
-
return -EFAULT;
393
-
if (hwts_cfg.tx_type == HWTSTAMP_TX_ON &&
394
-
hwts_cfg.rx_filter == HWTSTAMP_FILTER_ALL)
395
-
return 0;
396
-
return -ERANGE;
397
-
398
-
case SIOCGHWTSTAMP: /* get */
399
-
hwts_cfg.tx_type = HWTSTAMP_TX_ON;
400
-
hwts_cfg.rx_filter = HWTSTAMP_FILTER_ALL;
401
-
if (copy_to_user(ifr->ifr_data, &hwts_cfg, sizeof(hwts_cfg)))
402
-
return -EFAULT;
403
-
return 0;
404
-
405
-
default:
406
-
return -EOPNOTSUPP;
407
-
}
391
+
return 0;
408
392
}
409
-
EXPORT_SYMBOL(can_eth_ioctl_hwts);
393
+
EXPORT_SYMBOL(can_hwtstamp_get);
394
+
395
+
/* generic implementation of netdev_ops::ndo_hwtstamp_set for CAN devices
396
+
* supporting hardware timestamps
397
+
*/
398
+
int can_hwtstamp_set(struct net_device *netdev,
399
+
struct kernel_hwtstamp_config *cfg,
400
+
struct netlink_ext_ack *extack)
401
+
{
402
+
if (cfg->tx_type == HWTSTAMP_TX_ON &&
403
+
cfg->rx_filter == HWTSTAMP_FILTER_ALL)
404
+
return 0;
405
+
NL_SET_ERR_MSG_MOD(extack, "Only TX on and RX all packets filter supported");
406
+
return -ERANGE;
407
+
}
408
+
EXPORT_SYMBOL(can_hwtstamp_set);
410
409
411
410
/* generic implementation of ethtool_ops::get_ts_info for CAN devices
412
411
* supporting hardware timestamps
+2
-1
drivers/net/can/esd/esd_402_pci-core.c
+2
-1
drivers/net/can/esd/esd_402_pci-core.c
···
86
86
.ndo_open = acc_open,
87
87
.ndo_stop = acc_close,
88
88
.ndo_start_xmit = acc_start_xmit,
89
-
.ndo_eth_ioctl = can_eth_ioctl_hwts,
89
+
.ndo_hwtstamp_get = can_hwtstamp_get,
90
+
.ndo_hwtstamp_set = can_hwtstamp_set,
90
91
};
91
92
92
93
static const struct ethtool_ops pci402_acc_ethtool_ops = {
+2
-1
drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c
+2
-1
drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c
···
902
902
static const struct net_device_ops kvaser_pciefd_netdev_ops = {
903
903
.ndo_open = kvaser_pciefd_open,
904
904
.ndo_stop = kvaser_pciefd_stop,
905
-
.ndo_eth_ioctl = can_eth_ioctl_hwts,
906
905
.ndo_start_xmit = kvaser_pciefd_start_xmit,
906
+
.ndo_hwtstamp_get = can_hwtstamp_get,
907
+
.ndo_hwtstamp_set = can_hwtstamp_set,
907
908
};
908
909
909
910
static int kvaser_pciefd_set_phys_id(struct net_device *netdev,
+16
-19
drivers/net/can/peak_canfd/peak_canfd.c
+16
-19
drivers/net/can/peak_canfd/peak_canfd.c
···
743
743
return NETDEV_TX_OK;
744
744
}
745
745
746
-
static int peak_eth_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
746
+
static int peak_eth_hwtstamp_get(struct net_device *netdev,
747
+
struct kernel_hwtstamp_config *config)
747
748
{
748
-
struct hwtstamp_config hwts_cfg = { 0 };
749
+
config->tx_type = HWTSTAMP_TX_OFF;
750
+
config->rx_filter = HWTSTAMP_FILTER_ALL;
749
751
750
-
switch (cmd) {
751
-
case SIOCSHWTSTAMP: /* set */
752
-
if (copy_from_user(&hwts_cfg, ifr->ifr_data, sizeof(hwts_cfg)))
753
-
return -EFAULT;
754
-
if (hwts_cfg.tx_type == HWTSTAMP_TX_OFF &&
755
-
hwts_cfg.rx_filter == HWTSTAMP_FILTER_ALL)
756
-
return 0;
757
-
return -ERANGE;
752
+
return 0;
753
+
}
758
754
759
-
case SIOCGHWTSTAMP: /* get */
760
-
hwts_cfg.tx_type = HWTSTAMP_TX_OFF;
761
-
hwts_cfg.rx_filter = HWTSTAMP_FILTER_ALL;
762
-
if (copy_to_user(ifr->ifr_data, &hwts_cfg, sizeof(hwts_cfg)))
763
-
return -EFAULT;
755
+
static int peak_eth_hwtstamp_set(struct net_device *netdev,
756
+
struct kernel_hwtstamp_config *config,
757
+
struct netlink_ext_ack *extack)
758
+
{
759
+
if (config->tx_type == HWTSTAMP_TX_OFF &&
760
+
config->rx_filter == HWTSTAMP_FILTER_ALL)
764
761
return 0;
765
762
766
-
default:
767
-
return -EOPNOTSUPP;
768
-
}
763
+
NL_SET_ERR_MSG_MOD(extack, "Only RX HWTSTAMP_FILTER_ALL is supported");
764
+
return -ERANGE;
769
765
}
770
766
771
767
static const struct net_device_ops peak_canfd_netdev_ops = {
772
768
.ndo_open = peak_canfd_open,
773
769
.ndo_stop = peak_canfd_close,
774
-
.ndo_eth_ioctl = peak_eth_ioctl,
775
770
.ndo_start_xmit = peak_canfd_start_xmit,
771
+
.ndo_hwtstamp_get = peak_eth_hwtstamp_get,
772
+
.ndo_hwtstamp_set = peak_eth_hwtstamp_set,
776
773
};
777
774
778
775
static int peak_get_ts_info(struct net_device *dev,
+20
-11
drivers/net/can/spi/mcp251x.c
+20
-11
drivers/net/can/spi/mcp251x.c
···
1320
1320
1321
1321
clk = devm_clk_get_optional(&spi->dev, NULL);
1322
1322
if (IS_ERR(clk))
1323
-
return PTR_ERR(clk);
1323
+
return dev_err_probe(&spi->dev, PTR_ERR(clk), "Cannot get clock\n");
1324
1324
1325
1325
freq = clk_get_rate(clk);
1326
1326
if (freq == 0)
···
1328
1328
1329
1329
/* Sanity check */
1330
1330
if (freq < 1000000 || freq > 25000000)
1331
-
return -ERANGE;
1331
+
return dev_err_probe(&spi->dev, -ERANGE, "clock frequency out of range\n");
1332
1332
1333
1333
/* Allocate can/net device */
1334
1334
net = alloc_candev(sizeof(struct mcp251x_priv), TX_ECHO_SKB_MAX);
···
1336
1336
return -ENOMEM;
1337
1337
1338
1338
ret = clk_prepare_enable(clk);
1339
-
if (ret)
1339
+
if (ret) {
1340
+
dev_err_probe(&spi->dev, ret, "Cannot enable clock\n");
1340
1341
goto out_free;
1342
+
}
1341
1343
1342
1344
net->netdev_ops = &mcp251x_netdev_ops;
1343
1345
net->ethtool_ops = &mcp251x_ethtool_ops;
···
1364
1362
else
1365
1363
spi->max_speed_hz = spi->max_speed_hz ? : 10 * 1000 * 1000;
1366
1364
ret = spi_setup(spi);
1367
-
if (ret)
1365
+
if (ret) {
1366
+
dev_err_probe(&spi->dev, ret, "Cannot set up spi\n");
1368
1367
goto out_clk;
1368
+
}
1369
1369
1370
1370
priv->power = devm_regulator_get_optional(&spi->dev, "vdd");
1371
1371
priv->transceiver = devm_regulator_get_optional(&spi->dev, "xceiver");
1372
1372
if ((PTR_ERR(priv->power) == -EPROBE_DEFER) ||
1373
1373
(PTR_ERR(priv->transceiver) == -EPROBE_DEFER)) {
1374
1374
ret = -EPROBE_DEFER;
1375
+
dev_err_probe(&spi->dev, ret, "supply deferred\n");
1375
1376
goto out_clk;
1376
1377
}
1377
1378
1378
1379
ret = mcp251x_power_enable(priv->power, 1);
1379
-
if (ret)
1380
+
if (ret) {
1381
+
dev_err_probe(&spi->dev, ret, "Cannot enable power\n");
1380
1382
goto out_clk;
1383
+
}
1381
1384
1382
1385
priv->wq = alloc_workqueue("mcp251x_wq",
1383
1386
WQ_FREEZABLE | WQ_MEM_RECLAIM | WQ_PERCPU,
···
1416
1409
/* Here is OK to not lock the MCP, no one knows about it yet */
1417
1410
ret = mcp251x_hw_probe(spi);
1418
1411
if (ret) {
1419
-
if (ret == -ENODEV)
1420
-
dev_err(&spi->dev, "Cannot initialize MCP%x. Wrong wiring?\n",
1421
-
priv->model);
1412
+
dev_err_probe(&spi->dev, ret, "Cannot initialize MCP%x. Wrong wiring?\n",
1413
+
priv->model);
1422
1414
goto error_probe;
1423
1415
}
1424
1416
1425
1417
mcp251x_hw_sleep(spi);
1426
1418
1427
1419
ret = register_candev(net);
1428
-
if (ret)
1420
+
if (ret) {
1421
+
dev_err_probe(&spi->dev, ret, "Cannot register CAN device\n");
1429
1422
goto error_probe;
1423
+
}
1430
1424
1431
1425
ret = mcp251x_gpio_setup(priv);
1432
-
if (ret)
1426
+
if (ret) {
1427
+
dev_err_probe(&spi->dev, ret, "Cannot set up gpios\n");
1433
1428
goto out_unregister_candev;
1429
+
}
1434
1430
1435
1431
netdev_info(net, "MCP%x successfully initialized.\n", priv->model);
1436
1432
return 0;
···
1452
1442
out_free:
1453
1443
free_candev(net);
1454
1444
1455
-
dev_err(&spi->dev, "Probe failed, err=%d\n", -ret);
1456
1445
return ret;
1457
1446
}
1458
1447
+1
drivers/net/can/spi/mcp251xfd/Kconfig
+1
drivers/net/can/spi/mcp251xfd/Kconfig
+231
-53
drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c
+231
-53
drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c
···
608
608
609
609
static int mcp251xfd_chip_rx_int_enable(const struct mcp251xfd_priv *priv)
610
610
{
611
-
u32 val;
611
+
u32 val, mask;
612
612
613
613
if (!priv->rx_int)
614
614
return 0;
615
615
616
-
/* Configure GPIOs:
617
-
* - PIN0: GPIO Input
618
-
* - PIN1: GPIO Input/RX Interrupt
616
+
/* Configure PIN1 as RX Interrupt:
619
617
*
620
618
* PIN1 must be Input, otherwise there is a glitch on the
621
619
* rx-INT line. It happens between setting the PIN as output
622
620
* (in the first byte of the SPI transfer) and configuring the
623
621
* PIN as interrupt (in the last byte of the SPI transfer).
624
622
*/
625
-
val = MCP251XFD_REG_IOCON_PM0 | MCP251XFD_REG_IOCON_TRIS1 |
626
-
MCP251XFD_REG_IOCON_TRIS0;
627
-
return regmap_write(priv->map_reg, MCP251XFD_REG_IOCON, val);
623
+
val = MCP251XFD_REG_IOCON_TRIS(1);
624
+
mask = MCP251XFD_REG_IOCON_TRIS(1) | MCP251XFD_REG_IOCON_PM(1);
625
+
return regmap_update_bits(priv->map_reg, MCP251XFD_REG_IOCON, mask, val);
628
626
}
629
627
630
628
static int mcp251xfd_chip_rx_int_disable(const struct mcp251xfd_priv *priv)
···
632
634
if (!priv->rx_int)
633
635
return 0;
634
636
635
-
/* Configure GPIOs:
636
-
* - PIN0: GPIO Input
637
-
* - PIN1: GPIO Input
638
-
*/
639
-
val = MCP251XFD_REG_IOCON_PM1 | MCP251XFD_REG_IOCON_PM0 |
640
-
MCP251XFD_REG_IOCON_TRIS1 | MCP251XFD_REG_IOCON_TRIS0;
641
-
return regmap_write(priv->map_reg, MCP251XFD_REG_IOCON, val);
637
+
/* Configure PIN1 as GPIO Input */
638
+
val = MCP251XFD_REG_IOCON_PM(1) | MCP251XFD_REG_IOCON_TRIS(1);
639
+
return regmap_update_bits(priv->map_reg, MCP251XFD_REG_IOCON, val, val);
642
640
}
643
641
644
642
static int mcp251xfd_chip_ecc_init(struct mcp251xfd_priv *priv)
···
761
767
mcp251xfd_chip_interrupts_disable(priv);
762
768
mcp251xfd_chip_rx_int_disable(priv);
763
769
mcp251xfd_timestamp_stop(priv);
764
-
mcp251xfd_chip_sleep(priv);
770
+
mcp251xfd_chip_set_mode(priv, MCP251XFD_REG_CON_MODE_CONFIG);
765
771
}
766
772
767
773
static int mcp251xfd_chip_start(struct mcp251xfd_priv *priv)
768
774
{
769
775
int err;
770
-
771
-
err = mcp251xfd_chip_softreset(priv);
772
-
if (err)
773
-
goto out_chip_stop;
774
-
775
-
err = mcp251xfd_chip_clock_init(priv);
776
-
if (err)
777
-
goto out_chip_stop;
778
776
779
777
err = mcp251xfd_chip_timestamp_init(priv);
780
778
if (err)
···
1611
1625
return err;
1612
1626
1613
1627
err = pm_runtime_resume_and_get(ndev->dev.parent);
1614
-
if (err)
1628
+
if (err) {
1629
+
if (err == -ETIMEDOUT || err == -ENODEV)
1630
+
pm_runtime_set_suspended(ndev->dev.parent);
1615
1631
goto out_close_candev;
1632
+
}
1616
1633
1617
1634
err = mcp251xfd_ring_alloc(priv);
1618
1635
if (err)
···
1703
1714
.ndo_open = mcp251xfd_open,
1704
1715
.ndo_stop = mcp251xfd_stop,
1705
1716
.ndo_start_xmit = mcp251xfd_start_xmit,
1706
-
.ndo_eth_ioctl = can_eth_ioctl_hwts,
1717
+
.ndo_hwtstamp_get = can_hwtstamp_get,
1718
+
.ndo_hwtstamp_set = can_hwtstamp_set,
1707
1719
};
1708
1720
1709
1721
static void
···
1795
1805
priv->rx_int = NULL;
1796
1806
1797
1807
return 0;
1808
+
}
1809
+
1810
+
static const char * const mcp251xfd_gpio_names[] = { "GPIO0", "GPIO1" };
1811
+
1812
+
static int mcp251xfd_gpio_request(struct gpio_chip *chip, unsigned int offset)
1813
+
{
1814
+
struct mcp251xfd_priv *priv = gpiochip_get_data(chip);
1815
+
u32 pin_mask = MCP251XFD_REG_IOCON_PM(offset);
1816
+
int ret;
1817
+
1818
+
if (priv->rx_int && offset == 1) {
1819
+
netdev_err(priv->ndev, "Can't use GPIO 1 with RX-INT!\n");
1820
+
return -EINVAL;
1821
+
}
1822
+
1823
+
ret = pm_runtime_resume_and_get(priv->ndev->dev.parent);
1824
+
if (ret)
1825
+
return ret;
1826
+
1827
+
return regmap_update_bits(priv->map_reg, MCP251XFD_REG_IOCON, pin_mask, pin_mask);
1828
+
}
1829
+
1830
+
static void mcp251xfd_gpio_free(struct gpio_chip *chip, unsigned int offset)
1831
+
{
1832
+
struct mcp251xfd_priv *priv = gpiochip_get_data(chip);
1833
+
1834
+
pm_runtime_put(priv->ndev->dev.parent);
1835
+
}
1836
+
1837
+
static int mcp251xfd_gpio_get_direction(struct gpio_chip *chip,
1838
+
unsigned int offset)
1839
+
{
1840
+
struct mcp251xfd_priv *priv = gpiochip_get_data(chip);
1841
+
u32 mask = MCP251XFD_REG_IOCON_TRIS(offset);
1842
+
u32 val;
1843
+
int ret;
1844
+
1845
+
ret = regmap_read(priv->map_reg, MCP251XFD_REG_IOCON, &val);
1846
+
if (ret)
1847
+
return ret;
1848
+
1849
+
if (mask & val)
1850
+
return GPIO_LINE_DIRECTION_IN;
1851
+
1852
+
return GPIO_LINE_DIRECTION_OUT;
1853
+
}
1854
+
1855
+
static int mcp251xfd_gpio_get(struct gpio_chip *chip, unsigned int offset)
1856
+
{
1857
+
struct mcp251xfd_priv *priv = gpiochip_get_data(chip);
1858
+
u32 mask = MCP251XFD_REG_IOCON_GPIO(offset);
1859
+
u32 val;
1860
+
int ret;
1861
+
1862
+
ret = regmap_read(priv->map_reg, MCP251XFD_REG_IOCON, &val);
1863
+
if (ret)
1864
+
return ret;
1865
+
1866
+
return !!(mask & val);
1867
+
}
1868
+
1869
+
static int mcp251xfd_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
1870
+
unsigned long *bit)
1871
+
{
1872
+
struct mcp251xfd_priv *priv = gpiochip_get_data(chip);
1873
+
u32 val;
1874
+
int ret;
1875
+
1876
+
ret = regmap_read(priv->map_reg, MCP251XFD_REG_IOCON, &val);
1877
+
if (ret)
1878
+
return ret;
1879
+
1880
+
*bit = FIELD_GET(MCP251XFD_REG_IOCON_GPIO_MASK, val) & *mask;
1881
+
1882
+
return 0;
1883
+
}
1884
+
1885
+
static int mcp251xfd_gpio_direction_output(struct gpio_chip *chip,
1886
+
unsigned int offset, int value)
1887
+
{
1888
+
struct mcp251xfd_priv *priv = gpiochip_get_data(chip);
1889
+
u32 dir_mask = MCP251XFD_REG_IOCON_TRIS(offset);
1890
+
u32 val_mask = MCP251XFD_REG_IOCON_LAT(offset);
1891
+
u32 val;
1892
+
1893
+
if (value)
1894
+
val = val_mask;
1895
+
else
1896
+
val = 0;
1897
+
1898
+
return regmap_update_bits(priv->map_reg, MCP251XFD_REG_IOCON,
1899
+
dir_mask | val_mask, val);
1900
+
}
1901
+
1902
+
static int mcp251xfd_gpio_direction_input(struct gpio_chip *chip,
1903
+
unsigned int offset)
1904
+
{
1905
+
struct mcp251xfd_priv *priv = gpiochip_get_data(chip);
1906
+
u32 dir_mask = MCP251XFD_REG_IOCON_TRIS(offset);
1907
+
1908
+
return regmap_update_bits(priv->map_reg, MCP251XFD_REG_IOCON, dir_mask, dir_mask);
1909
+
}
1910
+
1911
+
static int mcp251xfd_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)
1912
+
{
1913
+
struct mcp251xfd_priv *priv = gpiochip_get_data(chip);
1914
+
u32 val_mask = MCP251XFD_REG_IOCON_LAT(offset);
1915
+
u32 val;
1916
+
1917
+
if (value)
1918
+
val = val_mask;
1919
+
else
1920
+
val = 0;
1921
+
1922
+
return regmap_update_bits(priv->map_reg, MCP251XFD_REG_IOCON, val_mask, val);
1923
+
}
1924
+
1925
+
static int mcp251xfd_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask,
1926
+
unsigned long *bits)
1927
+
{
1928
+
struct mcp251xfd_priv *priv = gpiochip_get_data(chip);
1929
+
u32 val;
1930
+
1931
+
val = FIELD_PREP(MCP251XFD_REG_IOCON_LAT_MASK, *bits);
1932
+
1933
+
return regmap_update_bits(priv->map_reg, MCP251XFD_REG_IOCON,
1934
+
MCP251XFD_REG_IOCON_LAT_MASK, val);
1935
+
}
1936
+
1937
+
static int mcp251fdx_gpio_setup(struct mcp251xfd_priv *priv)
1938
+
{
1939
+
struct gpio_chip *gc = &priv->gc;
1940
+
1941
+
if (!device_property_present(&priv->spi->dev, "gpio-controller"))
1942
+
return 0;
1943
+
1944
+
gc->label = dev_name(&priv->spi->dev);
1945
+
gc->parent = &priv->spi->dev;
1946
+
gc->owner = THIS_MODULE;
1947
+
gc->request = mcp251xfd_gpio_request;
1948
+
gc->free = mcp251xfd_gpio_free;
1949
+
gc->get_direction = mcp251xfd_gpio_get_direction;
1950
+
gc->direction_output = mcp251xfd_gpio_direction_output;
1951
+
gc->direction_input = mcp251xfd_gpio_direction_input;
1952
+
gc->get = mcp251xfd_gpio_get;
1953
+
gc->get_multiple = mcp251xfd_gpio_get_multiple;
1954
+
gc->set = mcp251xfd_gpio_set;
1955
+
gc->set_multiple = mcp251xfd_gpio_set_multiple;
1956
+
gc->base = -1;
1957
+
gc->can_sleep = true;
1958
+
gc->ngpio = ARRAY_SIZE(mcp251xfd_gpio_names);
1959
+
gc->names = mcp251xfd_gpio_names;
1960
+
1961
+
return devm_gpiochip_add_data(&priv->spi->dev, gc, priv);
1798
1962
}
1799
1963
1800
1964
static int
···
2050
1906
struct net_device *ndev = priv->ndev;
2051
1907
int err;
2052
1908
1909
+
mcp251xfd_register_quirks(priv);
1910
+
2053
1911
err = mcp251xfd_clks_and_vdd_enable(priv);
2054
1912
if (err)
2055
1913
return err;
1914
+
1915
+
err = mcp251xfd_chip_softreset(priv);
1916
+
if (err == -ENODEV)
1917
+
goto out_clks_and_vdd_disable;
1918
+
if (err)
1919
+
goto out_chip_sleep;
1920
+
1921
+
err = mcp251xfd_chip_clock_init(priv);
1922
+
if (err == -ENODEV)
1923
+
goto out_clks_and_vdd_disable;
1924
+
if (err)
1925
+
goto out_chip_sleep;
2056
1926
2057
1927
pm_runtime_get_noresume(ndev->dev.parent);
2058
1928
err = pm_runtime_set_active(ndev->dev.parent);
···
2074
1916
goto out_runtime_put_noidle;
2075
1917
pm_runtime_enable(ndev->dev.parent);
2076
1918
2077
-
mcp251xfd_register_quirks(priv);
2078
-
2079
-
err = mcp251xfd_chip_softreset(priv);
2080
-
if (err == -ENODEV)
2081
-
goto out_runtime_disable;
2082
-
if (err)
2083
-
goto out_chip_sleep;
2084
-
2085
-
err = mcp251xfd_chip_clock_init(priv);
2086
-
if (err == -ENODEV)
2087
-
goto out_runtime_disable;
2088
-
if (err)
2089
-
goto out_chip_sleep;
2090
-
2091
1919
err = mcp251xfd_register_chip_detect(priv);
2092
1920
if (err)
2093
-
goto out_chip_sleep;
1921
+
goto out_runtime_disable;
2094
1922
2095
1923
err = mcp251xfd_register_check_rx_int(priv);
2096
1924
if (err)
2097
-
goto out_chip_sleep;
1925
+
goto out_runtime_disable;
2098
1926
2099
1927
mcp251xfd_ethtool_init(priv);
2100
1928
1929
+
err = mcp251fdx_gpio_setup(priv);
1930
+
if (err) {
1931
+
dev_err_probe(&priv->spi->dev, err, "Failed to register gpio-controller.\n");
1932
+
goto out_runtime_disable;
1933
+
}
1934
+
2101
1935
err = register_candev(ndev);
2102
1936
if (err)
2103
-
goto out_chip_sleep;
1937
+
goto out_runtime_disable;
2104
1938
2105
1939
err = mcp251xfd_register_done(priv);
2106
1940
if (err)
2107
1941
goto out_unregister_candev;
2108
1942
2109
-
/* Put controller into sleep mode and let pm_runtime_put()
2110
-
* disable the clocks and vdd. If CONFIG_PM is not enabled,
2111
-
* the clocks and vdd will stay powered.
1943
+
/* Put controller into Config mode and let pm_runtime_put()
1944
+
* put in sleep mode, disable the clocks and vdd. If CONFIG_PM
1945
+
* is not enabled, the clocks and vdd will stay powered.
2112
1946
*/
2113
-
err = mcp251xfd_chip_sleep(priv);
1947
+
err = mcp251xfd_chip_set_mode(priv, MCP251XFD_REG_CON_MODE_CONFIG);
2114
1948
if (err)
2115
1949
goto out_unregister_candev;
2116
1950
···
2112
1962
2113
1963
out_unregister_candev:
2114
1964
unregister_candev(ndev);
2115
-
out_chip_sleep:
2116
-
mcp251xfd_chip_sleep(priv);
2117
1965
out_runtime_disable:
2118
1966
pm_runtime_disable(ndev->dev.parent);
2119
1967
out_runtime_put_noidle:
2120
1968
pm_runtime_put_noidle(ndev->dev.parent);
1969
+
out_chip_sleep:
1970
+
mcp251xfd_chip_sleep(priv);
1971
+
out_clks_and_vdd_disable:
2121
1972
mcp251xfd_clks_and_vdd_disable(priv);
2122
1973
2123
1974
return err;
···
2130
1979
2131
1980
unregister_candev(ndev);
2132
1981
2133
-
if (pm_runtime_enabled(ndev->dev.parent))
1982
+
if (pm_runtime_enabled(ndev->dev.parent)) {
2134
1983
pm_runtime_disable(ndev->dev.parent);
2135
-
else
1984
+
} else {
1985
+
mcp251xfd_chip_sleep(priv);
2136
1986
mcp251xfd_clks_and_vdd_disable(priv);
1987
+
}
2137
1988
}
2138
1989
2139
1990
static const struct of_device_id mcp251xfd_of_match[] = {
···
2358
2205
2359
2206
static int __maybe_unused mcp251xfd_runtime_suspend(struct device *device)
2360
2207
{
2361
-
const struct mcp251xfd_priv *priv = dev_get_drvdata(device);
2208
+
struct mcp251xfd_priv *priv = dev_get_drvdata(device);
2362
2209
2210
+
mcp251xfd_chip_sleep(priv);
2363
2211
return mcp251xfd_clks_and_vdd_disable(priv);
2364
2212
}
2365
2213
2366
2214
static int __maybe_unused mcp251xfd_runtime_resume(struct device *device)
2367
2215
{
2368
-
const struct mcp251xfd_priv *priv = dev_get_drvdata(device);
2216
+
struct mcp251xfd_priv *priv = dev_get_drvdata(device);
2217
+
int err;
2369
2218
2370
-
return mcp251xfd_clks_and_vdd_enable(priv);
2219
+
err = mcp251xfd_clks_and_vdd_enable(priv);
2220
+
if (err)
2221
+
return err;
2222
+
2223
+
err = mcp251xfd_chip_softreset(priv);
2224
+
if (err == -ENODEV)
2225
+
goto out_clks_and_vdd_disable;
2226
+
if (err)
2227
+
goto out_chip_sleep;
2228
+
2229
+
err = mcp251xfd_chip_clock_init(priv);
2230
+
if (err == -ENODEV)
2231
+
goto out_clks_and_vdd_disable;
2232
+
if (err)
2233
+
goto out_chip_sleep;
2234
+
2235
+
return 0;
2236
+
2237
+
out_chip_sleep:
2238
+
mcp251xfd_chip_sleep(priv);
2239
+
out_clks_and_vdd_disable:
2240
+
mcp251xfd_clks_and_vdd_disable(priv);
2241
+
2242
+
return err;
2371
2243
}
2372
2244
2373
2245
static const struct dev_pm_ops mcp251xfd_pm_ops = {
+96
-18
drivers/net/can/spi/mcp251xfd/mcp251xfd-regmap.c
+96
-18
drivers/net/can/spi/mcp251xfd/mcp251xfd-regmap.c
···
13
13
static const struct regmap_config mcp251xfd_regmap_crc;
14
14
15
15
static int
16
-
mcp251xfd_regmap_nocrc_write(void *context, const void *data, size_t count)
17
-
{
18
-
struct spi_device *spi = context;
19
-
20
-
return spi_write(spi, data, count);
21
-
}
22
-
23
-
static int
24
-
mcp251xfd_regmap_nocrc_gather_write(void *context,
25
-
const void *reg, size_t reg_len,
26
-
const void *val, size_t val_len)
16
+
_mcp251xfd_regmap_nocrc_gather_write(void *context,
17
+
const void *reg, size_t reg_len,
18
+
const void *val, size_t val_len)
27
19
{
28
20
struct spi_device *spi = context;
29
21
struct mcp251xfd_priv *priv = spi_get_drvdata(spi);
···
39
47
return spi_sync_transfer(spi, xfer, ARRAY_SIZE(xfer));
40
48
}
41
49
50
+
static int
51
+
mcp251xfd_regmap_nocrc_gather_write(void *context,
52
+
const void *reg_p, size_t reg_len,
53
+
const void *val, size_t val_len)
54
+
{
55
+
const u16 byte_exclude = MCP251XFD_REG_IOCON +
56
+
mcp251xfd_first_byte_set(MCP251XFD_REG_IOCON_GPIO_MASK);
57
+
u16 reg = be16_to_cpu(*(__be16 *)reg_p) & MCP251XFD_SPI_ADDRESS_MASK;
58
+
int ret;
59
+
60
+
/* Never write to bits 16..23 of IOCON register to avoid clearing of LAT0/LAT1
61
+
*
62
+
* According to MCP2518FD Errata DS80000789E 5 writing IOCON register using one
63
+
* SPI write command clears LAT0/LAT1.
64
+
*
65
+
* Errata Fix/Work Around suggests to write registers with single byte
66
+
* write instructions. However, it seems that the byte at 0xe06(IOCON[23:16])
67
+
* is for read-only access and writing to it causes the clearing of LAT0/LAT1.
68
+
*/
69
+
if (reg <= byte_exclude && reg + val_len > byte_exclude) {
70
+
size_t len = byte_exclude - reg;
71
+
72
+
/* Write up to 0xe05 */
73
+
ret = _mcp251xfd_regmap_nocrc_gather_write(context, reg_p, reg_len, val, len);
74
+
if (ret)
75
+
return ret;
76
+
77
+
/* Write from 0xe07 on */
78
+
reg += len + 1;
79
+
reg = (__force unsigned short)cpu_to_be16(MCP251XFD_SPI_INSTRUCTION_WRITE | reg);
80
+
return _mcp251xfd_regmap_nocrc_gather_write(context, ®, reg_len,
81
+
val + len + 1,
82
+
val_len - len - 1);
83
+
}
84
+
85
+
return _mcp251xfd_regmap_nocrc_gather_write(context, reg_p, reg_len,
86
+
val, val_len);
87
+
}
88
+
89
+
static int
90
+
mcp251xfd_regmap_nocrc_write(void *context, const void *data, size_t count)
91
+
{
92
+
const size_t data_offset = sizeof(__be16);
93
+
94
+
return mcp251xfd_regmap_nocrc_gather_write(context, data, data_offset,
95
+
data + data_offset, count - data_offset);
96
+
}
97
+
42
98
static inline bool
43
99
mcp251xfd_update_bits_read_reg(const struct mcp251xfd_priv *priv,
44
100
unsigned int reg)
···
104
64
case MCP251XFD_REG_CON:
105
65
case MCP251XFD_REG_OSC:
106
66
case MCP251XFD_REG_ECCCON:
67
+
case MCP251XFD_REG_IOCON:
107
68
return true;
108
69
default:
109
70
mcp251xfd_for_each_rx_ring(priv, ring, n) {
···
180
139
tmp_le32 = orig_le32 & ~mask_le32;
181
140
tmp_le32 |= val_le32 & mask_le32;
182
141
183
-
mcp251xfd_spi_cmd_write_nocrc(&buf_tx->cmd, reg + first_byte);
184
-
memcpy(buf_tx->data, &tmp_le32, len);
185
-
186
-
return spi_write(spi, buf_tx, sizeof(buf_tx->cmd) + len);
142
+
reg += first_byte;
143
+
mcp251xfd_spi_cmd_write_nocrc(&buf_tx->cmd, reg);
144
+
return mcp251xfd_regmap_nocrc_gather_write(context, &buf_tx->cmd, 2, &tmp_le32, len);
187
145
}
188
146
189
147
static int
···
236
196
}
237
197
238
198
static int
239
-
mcp251xfd_regmap_crc_gather_write(void *context,
240
-
const void *reg_p, size_t reg_len,
241
-
const void *val, size_t val_len)
199
+
_mcp251xfd_regmap_crc_gather_write(void *context,
200
+
const void *reg_p, size_t reg_len,
201
+
const void *val, size_t val_len)
242
202
{
243
203
struct spi_device *spi = context;
244
204
struct mcp251xfd_priv *priv = spi_get_drvdata(spi);
···
267
227
put_unaligned_be16(crc, buf_tx->data + val_len);
268
228
269
229
return spi_sync_transfer(spi, xfer, ARRAY_SIZE(xfer));
230
+
}
231
+
232
+
static int
233
+
mcp251xfd_regmap_crc_gather_write(void *context,
234
+
const void *reg_p, size_t reg_len,
235
+
const void *val, size_t val_len)
236
+
{
237
+
const u16 byte_exclude = MCP251XFD_REG_IOCON +
238
+
mcp251xfd_first_byte_set(MCP251XFD_REG_IOCON_GPIO_MASK);
239
+
u16 reg = *(u16 *)reg_p;
240
+
int ret;
241
+
242
+
/* Never write to bits 16..23 of IOCON register to avoid clearing of LAT0/LAT1
243
+
*
244
+
* According to MCP2518FD Errata DS80000789E 5 writing IOCON register using one
245
+
* SPI write command clears LAT0/LAT1.
246
+
*
247
+
* Errata Fix/Work Around suggests to write registers with single byte
248
+
* write instructions. However, it seems that the byte at 0xe06(IOCON[23:16])
249
+
* is for read-only access and writing to it causes the clearing of LAT0/LAT1.
250
+
*/
251
+
if (reg <= byte_exclude && reg + val_len > byte_exclude) {
252
+
size_t len = byte_exclude - reg;
253
+
254
+
/* Write up to 0xe05 */
255
+
ret = _mcp251xfd_regmap_crc_gather_write(context, ®, reg_len, val, len);
256
+
if (ret)
257
+
return ret;
258
+
259
+
/* Write from 0xe07 on */
260
+
reg += len + 1;
261
+
return _mcp251xfd_regmap_crc_gather_write(context, ®, reg_len,
262
+
val + len + 1,
263
+
val_len - len - 1);
264
+
}
265
+
266
+
return _mcp251xfd_regmap_crc_gather_write(context, reg_p, reg_len,
267
+
val, val_len);
270
268
}
271
269
272
270
static int
+8
drivers/net/can/spi/mcp251xfd/mcp251xfd.h
+8
drivers/net/can/spi/mcp251xfd/mcp251xfd.h
···
15
15
#include <linux/can/dev.h>
16
16
#include <linux/can/rx-offload.h>
17
17
#include <linux/gpio/consumer.h>
18
+
#include <linux/gpio/driver.h>
18
19
#include <linux/kernel.h>
19
20
#include <linux/netdevice.h>
20
21
#include <linux/regmap.h>
···
336
335
#define MCP251XFD_REG_IOCON_TXCANOD BIT(28)
337
336
#define MCP251XFD_REG_IOCON_PM1 BIT(25)
338
337
#define MCP251XFD_REG_IOCON_PM0 BIT(24)
338
+
#define MCP251XFD_REG_IOCON_PM(n) (MCP251XFD_REG_IOCON_PM0 << (n))
339
339
#define MCP251XFD_REG_IOCON_GPIO1 BIT(17)
340
340
#define MCP251XFD_REG_IOCON_GPIO0 BIT(16)
341
+
#define MCP251XFD_REG_IOCON_GPIO(n) (MCP251XFD_REG_IOCON_GPIO0 << (n))
342
+
#define MCP251XFD_REG_IOCON_GPIO_MASK GENMASK(17, 16)
341
343
#define MCP251XFD_REG_IOCON_LAT1 BIT(9)
342
344
#define MCP251XFD_REG_IOCON_LAT0 BIT(8)
345
+
#define MCP251XFD_REG_IOCON_LAT(n) (MCP251XFD_REG_IOCON_LAT0 << (n))
346
+
#define MCP251XFD_REG_IOCON_LAT_MASK GENMASK(9, 8)
343
347
#define MCP251XFD_REG_IOCON_XSTBYEN BIT(6)
344
348
#define MCP251XFD_REG_IOCON_TRIS1 BIT(1)
345
349
#define MCP251XFD_REG_IOCON_TRIS0 BIT(0)
350
+
#define MCP251XFD_REG_IOCON_TRIS(n) (MCP251XFD_REG_IOCON_TRIS0 << (n))
346
351
347
352
#define MCP251XFD_REG_CRC 0xe08
348
353
#define MCP251XFD_REG_CRC_FERRIE BIT(25)
···
677
670
678
671
struct mcp251xfd_devtype_data devtype_data;
679
672
struct can_berr_counter bec;
673
+
struct gpio_chip gc;
680
674
};
681
675
682
676
#define MCP251XFD_IS(_model) \
+2
-1
drivers/net/can/usb/etas_es58x/es58x_core.c
+2
-1
drivers/net/can/usb/etas_es58x/es58x_core.c
···
1976
1976
.ndo_open = es58x_open,
1977
1977
.ndo_stop = es58x_stop,
1978
1978
.ndo_start_xmit = es58x_start_xmit,
1979
-
.ndo_eth_ioctl = can_eth_ioctl_hwts,
1979
+
.ndo_hwtstamp_get = can_hwtstamp_get,
1980
+
.ndo_hwtstamp_set = can_hwtstamp_set,
1980
1981
};
1981
1982
1982
1983
static const struct ethtool_ops es58x_ethtool_ops = {
+17
-3
drivers/net/can/usb/gs_usb.c
+17
-3
drivers/net/can/usb/gs_usb.c
···
1087
1087
return 0;
1088
1088
}
1089
1089
1090
-
static int gs_can_eth_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1090
+
static int gs_can_hwtstamp_get(struct net_device *netdev,
1091
+
struct kernel_hwtstamp_config *cfg)
1091
1092
{
1092
1093
const struct gs_can *dev = netdev_priv(netdev);
1093
1094
1094
1095
if (dev->feature & GS_CAN_FEATURE_HW_TIMESTAMP)
1095
-
return can_eth_ioctl_hwts(netdev, ifr, cmd);
1096
+
return can_hwtstamp_get(netdev, cfg);
1097
+
1098
+
return -EOPNOTSUPP;
1099
+
}
1100
+
1101
+
static int gs_can_hwtstamp_set(struct net_device *netdev,
1102
+
struct kernel_hwtstamp_config *cfg,
1103
+
struct netlink_ext_ack *extack)
1104
+
{
1105
+
const struct gs_can *dev = netdev_priv(netdev);
1106
+
1107
+
if (dev->feature & GS_CAN_FEATURE_HW_TIMESTAMP)
1108
+
return can_hwtstamp_set(netdev, cfg, extack);
1096
1109
1097
1110
return -EOPNOTSUPP;
1098
1111
}
···
1114
1101
.ndo_open = gs_can_open,
1115
1102
.ndo_stop = gs_can_close,
1116
1103
.ndo_start_xmit = gs_can_start_xmit,
1117
-
.ndo_eth_ioctl = gs_can_eth_ioctl,
1104
+
.ndo_hwtstamp_get = gs_can_hwtstamp_get,
1105
+
.ndo_hwtstamp_set = gs_can_hwtstamp_set,
1118
1106
};
1119
1107
1120
1108
static int gs_usb_set_identify(struct net_device *netdev, bool do_identify)
+2
-1
drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c
+2
-1
drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c
···
784
784
static const struct net_device_ops kvaser_usb_netdev_ops = {
785
785
.ndo_open = kvaser_usb_open,
786
786
.ndo_stop = kvaser_usb_close,
787
-
.ndo_eth_ioctl = can_eth_ioctl_hwts,
788
787
.ndo_start_xmit = kvaser_usb_start_xmit,
788
+
.ndo_hwtstamp_get = can_hwtstamp_get,
789
+
.ndo_hwtstamp_set = can_hwtstamp_set,
789
790
};
790
791
791
792
static const struct ethtool_ops kvaser_usb_ethtool_ops = {
+16
-19
drivers/net/can/usb/peak_usb/pcan_usb_core.c
+16
-19
drivers/net/can/usb/peak_usb/pcan_usb_core.c
···
784
784
return 0;
785
785
}
786
786
787
-
static int peak_eth_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
787
+
static int peak_hwtstamp_get(struct net_device *netdev,
788
+
struct kernel_hwtstamp_config *config)
788
789
{
789
-
struct hwtstamp_config hwts_cfg = { 0 };
790
+
config->tx_type = HWTSTAMP_TX_OFF;
791
+
config->rx_filter = HWTSTAMP_FILTER_ALL;
790
792
791
-
switch (cmd) {
792
-
case SIOCSHWTSTAMP: /* set */
793
-
if (copy_from_user(&hwts_cfg, ifr->ifr_data, sizeof(hwts_cfg)))
794
-
return -EFAULT;
795
-
if (hwts_cfg.tx_type == HWTSTAMP_TX_OFF &&
796
-
hwts_cfg.rx_filter == HWTSTAMP_FILTER_ALL)
797
-
return 0;
798
-
return -ERANGE;
793
+
return 0;
794
+
}
799
795
800
-
case SIOCGHWTSTAMP: /* get */
801
-
hwts_cfg.tx_type = HWTSTAMP_TX_OFF;
802
-
hwts_cfg.rx_filter = HWTSTAMP_FILTER_ALL;
803
-
if (copy_to_user(ifr->ifr_data, &hwts_cfg, sizeof(hwts_cfg)))
804
-
return -EFAULT;
796
+
static int peak_hwtstamp_set(struct net_device *netdev,
797
+
struct kernel_hwtstamp_config *config,
798
+
struct netlink_ext_ack *extack)
799
+
{
800
+
if (config->tx_type == HWTSTAMP_TX_OFF &&
801
+
config->rx_filter == HWTSTAMP_FILTER_ALL)
805
802
return 0;
806
803
807
-
default:
808
-
return -EOPNOTSUPP;
809
-
}
804
+
NL_SET_ERR_MSG_MOD(extack, "Only RX HWTSTAMP_FILTER_ALL is supported");
805
+
return -ERANGE;
810
806
}
811
807
812
808
static const struct net_device_ops peak_usb_netdev_ops = {
813
809
.ndo_open = peak_usb_ndo_open,
814
810
.ndo_stop = peak_usb_ndo_stop,
815
-
.ndo_eth_ioctl = peak_eth_ioctl,
816
811
.ndo_start_xmit = peak_usb_ndo_start_xmit,
812
+
.ndo_hwtstamp_get = peak_hwtstamp_get,
813
+
.ndo_hwtstamp_set = peak_hwtstamp_set,
817
814
};
818
815
819
816
/* CAN-USB devices generally handle 32-bit CAN channel IDs.
+5
-1
include/linux/can/dev.h
+5
-1
include/linux/can/dev.h
···
129
129
void can_set_default_mtu(struct net_device *dev);
130
130
int __must_check can_set_static_ctrlmode(struct net_device *dev,
131
131
u32 static_mode);
132
-
int can_eth_ioctl_hwts(struct net_device *netdev, struct ifreq *ifr, int cmd);
132
+
int can_hwtstamp_get(struct net_device *netdev,
133
+
struct kernel_hwtstamp_config *cfg);
134
+
int can_hwtstamp_set(struct net_device *netdev,
135
+
struct kernel_hwtstamp_config *cfg,
136
+
struct netlink_ext_ack *extack);
133
137
int can_ethtool_op_get_ts_info_hwts(struct net_device *dev,
134
138
struct kernel_ethtool_ts_info *info);
135
139