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drm/amdgpu: Use correct MES pipe in non-SPX mode on GFX 12.1

On GFX 12.1, use the correct MES pipe instance for readiness before
sending MES commands on that pipe. Additionally, send the TLB requests
on the correct MES pipe in non-SPX modes.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Alex Sierra <alex.sierra@amd.com>
Reviewed-by: Michael Chen <michael.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Mukul Joshi and committed by
Alex Deucher
b7c4040d 05282873

+11 -3
+1 -1
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
··· 859 859 unsigned long flags; 860 860 uint32_t seq; 861 861 862 - if (adev->mes.ring[0].sched.ready) { 862 + if (adev->mes.ring[MES_PIPE_INST(xcc_inst, 0)].sched.ready) { 863 863 amdgpu_mes_reg_write_reg_wait(adev, reg0, reg1, 864 864 ref, mask, xcc_inst); 865 865 return;
+10 -2
drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c
··· 317 317 static void gmc_v12_1_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, 318 318 uint32_t vmhub, uint32_t flush_type) 319 319 { 320 + u32 inst; 321 + 322 + if (vmhub >= AMDGPU_MMHUB0(0)) 323 + inst = 0; 324 + else 325 + inst = vmhub; 326 + 320 327 /* This is necessary for SRIOV as well as for GFXOFF to function 321 328 * properly under bare metal 322 329 */ 323 - if (((adev->gfx.kiq[0].ring.sched.ready || adev->mes.ring[0].sched.ready) && 330 + if (((adev->gfx.kiq[inst].ring.sched.ready || 331 + adev->mes.ring[MES_PIPE_INST(inst, 0)].sched.ready) && 324 332 (amdgpu_sriov_runtime(adev) || !amdgpu_sriov_vf(adev)))) { 325 333 struct amdgpu_vmhub *hub = &adev->vmhub[vmhub]; 326 334 const unsigned eng = 17; ··· 337 329 u32 ack = hub->vm_inv_eng0_ack + hub->eng_distance * eng; 338 330 339 331 amdgpu_gmc_fw_reg_write_reg_wait(adev, req, ack, inv_req, 340 - 1 << vmid, 0); 332 + 1 << vmid, inst); 341 333 return; 342 334 } 343 335