tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

drm/msm/dpu: get rid of DPU_MDP_PERIPH_0_REMOVED

Continue migration to the MDSS-revision based checks and replace
DPU_MDP_PERIPH_0_REMOVED feature bit with the core_major_ver >= 8 check.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/655400/
Link: https://lore.kernel.org/r/20250522-dpu-drop-features-v5-19-3b2085a07884@oss.qualcomm.com

authored by

Dmitry Baryshkov and committed by
Dmitry Baryshkov bd88789b a4887182

+2 -12
-1
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h
··· 21 21 static const struct dpu_mdp_cfg sm8650_mdp = { 22 22 .name = "top_0", 23 23 .base = 0, .len = 0x494, 24 - .features = BIT(DPU_MDP_PERIPH_0_REMOVED), 25 24 .clk_ctrls = { 26 25 [DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 }, 27 26 },
-1
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
··· 21 21 static const struct dpu_mdp_cfg sc8280xp_mdp = { 22 22 .name = "top_0", 23 23 .base = 0x0, .len = 0x494, 24 - .features = BIT(DPU_MDP_PERIPH_0_REMOVED), 25 24 .clk_ctrls = { 26 25 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 }, 27 26 [DPU_CLK_CTRL_VIG1] = { .reg_off = 0x2b4, .bit_off = 0 },
-1
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
··· 21 21 static const struct dpu_mdp_cfg sm8450_mdp = { 22 22 .name = "top_0", 23 23 .base = 0x0, .len = 0x494, 24 - .features = BIT(DPU_MDP_PERIPH_0_REMOVED), 25 24 .clk_ctrls = { 26 25 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 }, 27 26 [DPU_CLK_CTRL_VIG1] = { .reg_off = 0x2b4, .bit_off = 0 },
-1
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h
··· 20 20 static const struct dpu_mdp_cfg sa8775p_mdp = { 21 21 .name = "top_0", 22 22 .base = 0x0, .len = 0x494, 23 - .features = BIT(DPU_MDP_PERIPH_0_REMOVED), 24 23 .clk_ctrls = { 25 24 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 }, 26 25 [DPU_CLK_CTRL_VIG1] = { .reg_off = 0x2b4, .bit_off = 0 },
-1
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
··· 21 21 static const struct dpu_mdp_cfg sm8550_mdp = { 22 22 .name = "top_0", 23 23 .base = 0, .len = 0x494, 24 - .features = BIT(DPU_MDP_PERIPH_0_REMOVED), 25 24 .clk_ctrls = { 26 25 [DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 }, 27 26 },
-1
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_1_sar2130p.h
··· 21 21 static const struct dpu_mdp_cfg sar2130p_mdp = { 22 22 .name = "top_0", 23 23 .base = 0, .len = 0x494, 24 - .features = BIT(DPU_MDP_PERIPH_0_REMOVED), 25 24 .clk_ctrls = { 26 25 [DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 }, 27 26 },
-1
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h
··· 20 20 static const struct dpu_mdp_cfg x1e80100_mdp = { 21 21 .name = "top_0", 22 22 .base = 0, .len = 0x494, 23 - .features = BIT(DPU_MDP_PERIPH_0_REMOVED), 24 23 .clk_ctrls = { 25 24 [DPU_CLK_CTRL_REG_DMA] = { .reg_off = 0x2bc, .bit_off = 20 }, 26 25 },
-3
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
··· 32 32 * MDP TOP BLOCK features 33 33 * @DPU_MDP_PANIC_PER_PIPE Panic configuration needs to be done per pipe 34 34 * @DPU_MDP_10BIT_SUPPORT, Chipset supports 10 bit pixel formats 35 - * @DPU_MDP_PERIPH_0_REMOVED Indicates that access to periph top0 block results 36 - * in a failure 37 35 * @DPU_MDP_MAX Maximum value 38 36 39 37 */ ··· 39 41 DPU_MDP_PANIC_PER_PIPE = 0x1, 40 42 DPU_MDP_10BIT_SUPPORT, 41 43 DPU_MDP_AUDIO_SELECT, 42 - DPU_MDP_PERIPH_0_REMOVED, 43 44 DPU_MDP_MAX 44 45 }; 45 46
+1 -1
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
··· 272 272 273 273 if (mdss_rev->core_major_ver < 5) 274 274 ops->setup_vsync_source = dpu_hw_setup_vsync_sel; 275 - else if (!(cap & BIT(DPU_MDP_PERIPH_0_REMOVED))) 275 + else if (mdss_rev->core_major_ver < 8) 276 276 ops->setup_vsync_source = dpu_hw_setup_wd_timer; 277 277 278 278 ops->get_safe_status = dpu_hw_get_safe_status;
+1 -1
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
··· 1022 1022 dpu_kms->mmio + cat->wb[i].base, "%s", 1023 1023 cat->wb[i].name); 1024 1024 1025 - if (cat->mdp[0].features & BIT(DPU_MDP_PERIPH_0_REMOVED)) { 1025 + if (dpu_kms->catalog->mdss_ver->core_major_ver >= 8) { 1026 1026 msm_disp_snapshot_add_block(disp_state, MDP_PERIPH_TOP0, 1027 1027 dpu_kms->mmio + cat->mdp[0].base, "top"); 1028 1028 msm_disp_snapshot_add_block(disp_state, cat->mdp[0].len - MDP_PERIPH_TOP0_END,