Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
spi: sh-msiof: SICTR bitfield conversion
Convert MSIOF Control Register field accesses to use the FIELD_PREP()
bitfield access macro.
This gets rid of explicit shifts.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/4511c678c8fce5969eb50ffa7372d53396ff80ff.1747401908.git.geert+renesas@glider.be
Signed-off-by: Mark Brown <broonie@kernel.org>
authored by
Geert Uytterhoeven
and committed by
Mark Brown
bd8d6658
c2cc4b72
+16
-15
+16
-15
drivers/spi/spi-sh-msiof.c
+16
-15
drivers/spi/spi-sh-msiof.c
···
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#define SISCR_BRDV_DIV_1 7U
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/* SICTR */
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-
#define SICTR_TSCKIZ_MASK GENMASK(31, 30) /* Transmit Clock I/O Polarity Select */
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#define SICTR_TSCKIZ GENMASK(31, 30) /* Transmit Clock I/O Polarity Select */
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#define SICTR_TSCKIZ_SCK BIT(31) /* Disable SCK when TX disabled */
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#define SICTR_TSCKIZ_POL_SHIFT 30 /* Transmit Clock Polarity */
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#define SICTR_RSCKIZ_MASK GENMASK(29, 28) /* Receive Clock Polarity Select */
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#define SICTR_TSCKIZ_POL BIT(30) /* Transmit Clock Polarity */
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#define SICTR_RSCKIZ GENMASK(29, 28) /* Receive Clock Polarity Select */
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#define SICTR_RSCKIZ_SCK BIT(29) /* Must match CTR_TSCKIZ_SCK */
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#define SICTR_RSCKIZ_POL_SHIFT 28 /* Receive Clock Polarity */
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#define SICTR_TEDG_SHIFT 27 /* Transmit Timing (1 = falling edge) */
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#define SICTR_REDG_SHIFT 26 /* Receive Timing (1 = falling edge) */
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#define SICTR_TXDIZ_MASK GENMASK(23, 22) /* Pin Output When TX is Disabled */
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#define SICTR_TXDIZ_LOW (0 << 22) /* 0 */
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#define SICTR_TXDIZ_HIGH (1 << 22) /* 1 */
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#define SICTR_TXDIZ_HIZ (2 << 22) /* High-impedance */
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#define SICTR_RSCKIZ_POL BIT(28) /* Receive Clock Polarity */
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#define SICTR_TEDG BIT(27) /* Transmit Timing (1 = falling edge) */
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#define SICTR_REDG BIT(26) /* Receive Timing (1 = falling edge) */
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#define SICTR_TXDIZ GENMASK(23, 22) /* Pin Output When TX is Disabled */
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#define SICTR_TXDIZ_LOW 0U /* 0 */
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#define SICTR_TXDIZ_HIGH 1U /* 1 */
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#define SICTR_TXDIZ_HIZ 2U /* High-impedance */
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#define SICTR_TSCKE BIT(15) /* Transmit Serial Clock Output Enable */
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#define SICTR_TFSE BIT(14) /* Transmit Frame Sync Signal Output Enable */
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#define SICTR_TXE BIT(9) /* Transmit Enable */
···
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sh_msiof_write(p, SIRMDR1, tmp);
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tmp = 0;
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tmp |= SICTR_TSCKIZ_SCK | cpol << SICTR_TSCKIZ_POL_SHIFT;
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tmp |= SICTR_RSCKIZ_SCK | cpol << SICTR_RSCKIZ_POL_SHIFT;
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tmp |= SICTR_TSCKIZ_SCK | FIELD_PREP(SICTR_TSCKIZ_POL, cpol);
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tmp |= SICTR_RSCKIZ_SCK | FIELD_PREP(SICTR_RSCKIZ_POL, cpol);
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edge = cpol ^ !cpha;
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tmp |= edge << SICTR_TEDG_SHIFT;
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tmp |= edge << SICTR_REDG_SHIFT;
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tmp |= tx_hi_z ? SICTR_TXDIZ_HIZ : SICTR_TXDIZ_LOW;
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tmp |= FIELD_PREP(SICTR_TEDG, edge);
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tmp |= FIELD_PREP(SICTR_REDG, edge);
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tmp |= FIELD_PREP(SICTR_TXDIZ,
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tx_hi_z ? SICTR_TXDIZ_HIZ : SICTR_TXDIZ_LOW);
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sh_msiof_write(p, SICTR, tmp);
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}
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