tjh.dev / kernel
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Merge tag 'nuvoton-arm-6.16-devicetree' of https://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into soc/dt

Nuvoton ARM devicetree updates for v6.16

- MMC, OHCI, UDC and EDAC blocks added to the NPCM7XX DTSI
- Fixes for GPIO hog names in the NPCM730 and RunBMC Olympus platforms

* tag 'nuvoton-arm-6.16-devicetree' of https://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
ARM: dts: nuvoton: Add MMC Nodes
ARM: dts: nuvoton: Add OHCI node
ARM: dts: nuvoton: Add UDC nodes
ARM: dts: nuvoton: Add EDAC node
ARM: dts: nuvoton: Align GPIO hog name with bindings

Link: https://lore.kernel.org/r/CACPK8Xe=f_hNNWUGL670x4-OeKgDB+2P+mxp5BaTLW==T5jE_A@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Arnd Bergmann c307e9c1 7e1a0dfb

+239 -66
+108
arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi
··· 99 99 }; 100 100 }; 101 101 102 + udc0_phy: usb-phy { 103 + compatible = "usb-nop-xceiv"; 104 + #phy-cells = <0>; 105 + }; 106 + 102 107 ahb { 103 108 #address-cells = <1>; 104 109 #size-cells = <1>; ··· 127 122 clocks = <&clk_refclk>, <&clk_sysbypck>, <&clk_mcbypck>; 128 123 }; 129 124 125 + mc: memory-controller@f0824000 { 126 + compatible = "nuvoton,npcm750-memory-controller"; 127 + reg = <0xf0824000 0x1000>; 128 + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 129 + status = "disabled"; 130 + }; 131 + 130 132 gmac0: eth@f0802000 { 131 133 device_type = "network"; 132 134 compatible = "snps,dwmac"; ··· 149 137 status = "disabled"; 150 138 }; 151 139 140 + sdmmc: mmc@f0842000 { 141 + compatible = "nuvoton,npcm750-sdhci"; 142 + status = "disabled"; 143 + reg = <0xf0842000 0x200>; 144 + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 145 + clocks = <&clk NPCM7XX_CLK_AHB>; 146 + clock-names = "clk_mmc"; 147 + pinctrl-names = "default"; 148 + pinctrl-0 = <&mmc8_pins 149 + &mmc_pins>; 150 + }; 151 + 152 + sdhci: mmc@f0840000 { 153 + compatible = "nuvoton,npcm750-sdhci"; 154 + status = "disabled"; 155 + reg = <0xf0840000 0x200>; 156 + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 157 + clocks = <&clk NPCM7XX_CLK_AHB>; 158 + clock-names = "clk_sdhc"; 159 + pinctrl-names = "default"; 160 + pinctrl-0 = <&sd1_pins>; 161 + }; 162 + 152 163 ehci1: usb@f0806000 { 153 164 compatible = "nuvoton,npcm750-ehci"; 154 165 reg = <0xf0806000 0x1000>; 155 166 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; 167 + status = "disabled"; 168 + }; 169 + 170 + ohci1: usb@f0807000 { 171 + compatible = "generic-ohci"; 172 + reg = <0xf0807000 0x1000>; 173 + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 156 174 status = "disabled"; 157 175 }; 158 176 ··· 218 176 reg-names = "control", "memory"; 219 177 clocks = <&clk NPCM7XX_CLK_SPIX>; 220 178 clock-names = "clk_spix"; 179 + status = "disabled"; 180 + }; 181 + 182 + udc5: usb@f0835000 { 183 + compatible = "nuvoton,npcm750-udc"; 184 + reg = <0xf0835000 0x1000 185 + 0xfffd2800 0x800>; 186 + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 187 + clocks = <&clk NPCM7XX_CLK_SU>; 188 + clock-names = "clk_usb_bridge"; 189 + phys = <&udc0_phy>; 190 + phy_type = "utmi_wide"; 191 + dr_mode = "peripheral"; 192 + status = "disabled"; 193 + }; 194 + 195 + udc6: usb@f0836000 { 196 + compatible = "nuvoton,npcm750-udc"; 197 + reg = <0xf0836000 0x1000 198 + 0xfffd3000 0x800>; 199 + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; 200 + clocks = <&clk NPCM7XX_CLK_SU>; 201 + clock-names = "clk_usb_bridge"; 202 + phys = <&udc0_phy>; 203 + phy_type = "utmi_wide"; 204 + dr_mode = "peripheral"; 205 + status = "disabled"; 206 + }; 207 + 208 + udc7: usb@f0837000 { 209 + compatible = "nuvoton,npcm750-udc"; 210 + reg = <0xf0837000 0x1000 211 + 0xfffd3800 0x800>; 212 + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 213 + clocks = <&clk NPCM7XX_CLK_SU>; 214 + clock-names = "clk_usb_bridge"; 215 + phys = <&udc0_phy>; 216 + phy_type = "utmi_wide"; 217 + dr_mode = "peripheral"; 218 + status = "disabled"; 219 + }; 220 + 221 + udc8: usb@f0838000 { 222 + compatible = "nuvoton,npcm750-udc"; 223 + reg = <0xf0838000 0x1000 224 + 0xfffd4000 0x800>; 225 + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 226 + clocks = <&clk NPCM7XX_CLK_SU>; 227 + clock-names = "clk_usb_bridge"; 228 + phys = <&udc0_phy>; 229 + phy_type = "utmi_wide"; 230 + dr_mode = "peripheral"; 231 + status = "disabled"; 232 + }; 233 + 234 + udc9: usb@f0839000 { 235 + compatible = "nuvoton,npcm750-udc"; 236 + reg = <0xf0839000 0x1000 237 + 0xfffd4800 0x800>; 238 + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; 239 + clocks = <&clk NPCM7XX_CLK_SU>; 240 + clock-names = "clk_usb_bridge"; 241 + nuvoton,sysgcr = <&gcr>; 242 + phys = <&udc0_phy>; 243 + phy_type = "utmi_wide"; 244 + dr_mode = "peripheral"; 221 245 status = "disabled"; 222 246 }; 223 247
+6 -6
arch/arm/boot/dts/nuvoton/nuvoton-npcm730-gbs.dts
··· 1050 1050 "","","","SIO_POWER_GOOD","","","",""; 1051 1051 }; 1052 1052 gpio2: gpio@f0012000 { 1053 - bmc_usb_mux_oe_n { 1053 + bmc-usb-mux-oe-n-hog { 1054 1054 gpio-hog; 1055 1055 gpios = <25 GPIO_ACTIVE_HIGH>; 1056 1056 output-low; 1057 1057 line-name = "bmc-usb-mux-oe-n"; 1058 1058 }; 1059 - bmc_usb_mux_sel { 1059 + bmc-usb-mux-sel-hog { 1060 1060 gpio-hog; 1061 1061 gpios = <26 GPIO_ACTIVE_HIGH>; 1062 1062 output-low; 1063 1063 line-name = "bmc-usb-mux-sel"; 1064 1064 }; 1065 - bmc_usb2517_reset_n { 1065 + bmc-usb2517-reset-n-hog { 1066 1066 gpio-hog; 1067 1067 gpios = <27 GPIO_ACTIVE_LOW>; 1068 1068 output-low; ··· 1070 1070 }; 1071 1071 }; 1072 1072 gpio3: gpio@f0013000 { 1073 - assert_cpu0_reset { 1073 + assert-cpu0-reset-hog { 1074 1074 gpio-hog; 1075 1075 gpios = <14 GPIO_ACTIVE_HIGH>; 1076 1076 output-low; 1077 1077 line-name = "assert-cpu0-reset"; 1078 1078 }; 1079 - assert_pwrok_cpu0_n { 1079 + assert-pwrok-cpu0-n-hog { 1080 1080 gpio-hog; 1081 1081 gpios = <15 GPIO_ACTIVE_HIGH>; 1082 1082 output-low; 1083 1083 line-name = "assert-pwrok-cpu0-n"; 1084 1084 }; 1085 - assert_cpu0_prochot { 1085 + assert-cpu0-prochot-hog { 1086 1086 gpio-hog; 1087 1087 gpios = <16 GPIO_ACTIVE_HIGH>; 1088 1088 output-low;
+60 -60
arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts
··· 427 427 gpio-controller; 428 428 #gpio-cells = <2>; 429 429 reset-gpios = <&gpio7 4 GPIO_ACTIVE_LOW>; 430 - G1A_P0_0 { 430 + g1a-p0-0-hog { 431 431 gpio-hog; 432 432 gpios = <0 0>; 433 433 output-high; 434 434 line-name = "TPM_BMC_ALERT_N"; 435 435 }; 436 - G1A_P0_1 { 436 + g1a-p0-1-hog { 437 437 gpio-hog; 438 438 gpios = <1 0>; 439 439 input; 440 440 line-name = "FM_BIOS_TOP_SWAP"; 441 441 }; 442 - G1A_P0_2 { 442 + g1a-p0-2-hog { 443 443 gpio-hog; 444 444 gpios = <2 0>; 445 445 input; 446 446 line-name = "FM_BIOS_PREFRB2_GOOD"; 447 447 }; 448 - G1A_P0_3 { 448 + g1a-p0-3-hog { 449 449 gpio-hog; 450 450 gpios = <3 0>; 451 451 input; 452 452 line-name = "BMC_SATAXPCIE_0TO3_SEL"; 453 453 }; 454 - G1A_P0_4 { 454 + g1a-p0-4-hog { 455 455 gpio-hog; 456 456 gpios = <4 0>; 457 457 input; 458 458 line-name = "BMC_SATAXPCIE_4TO7_SEL"; 459 459 }; 460 - G1A_P0_5 { 460 + g1a-p0-5-hog { 461 461 gpio-hog; 462 462 gpios = <5 0>; 463 463 output-low; 464 464 line-name = "FM_UV_ADR_TRIGGER_EN_N"; 465 465 }; 466 - G1A_P0_6 { 466 + g1a-p0-6-hog { 467 467 gpio-hog; 468 468 gpios = <6 0>; 469 469 input; 470 470 line-name = "RM_THROTTLE_EN_N"; 471 471 }; 472 - G1A_P1_0 { 472 + g1a-p1-0-hog { 473 473 gpio-hog; 474 474 gpios = <8 0>; 475 475 input; 476 476 line-name = "FM_BMC_TPM_PRES_N"; 477 477 }; 478 - G1A_P1_1 { 478 + g1a-p1-1-hog { 479 479 gpio-hog; 480 480 gpios = <9 0>; 481 481 input; 482 482 line-name = "FM_CPU0_SKTOCC_LVT3_N"; 483 483 }; 484 - G1A_P1_2 { 484 + g1a-p1-2-hog { 485 485 gpio-hog; 486 486 gpios = <10 0>; 487 487 input; 488 488 line-name = "FM_CPU1_SKTOCC_LVT3_N"; 489 489 }; 490 - G1A_P1_3 { 490 + g1a-p1-3-hog { 491 491 gpio-hog; 492 492 gpios = <11 0>; 493 493 input; 494 494 line-name = "PSU1_ALERT_N"; 495 495 }; 496 - G1A_P1_4 { 496 + g1a-p1-4-hog { 497 497 gpio-hog; 498 498 gpios = <12 0>; 499 499 input; 500 500 line-name = "PSU2_ALERT_N"; 501 501 }; 502 - G1A_P1_5 { 502 + g1a-p1-5-hog { 503 503 gpio-hog; 504 504 gpios = <13 0>; 505 505 input; 506 506 line-name = "H_CPU0_FAST_WAKE_LVT3_N"; 507 507 }; 508 - G1A_P1_6 { 508 + g1a-p1-6-hog { 509 509 gpio-hog; 510 510 gpios = <14 0>; 511 511 output-high; 512 512 line-name = "I2C_MUX1_RESET_N"; 513 513 }; 514 - G1A_P1_7 { 514 + g1a-p1-7-hog { 515 515 gpio-hog; 516 516 gpios = <15 0>; 517 517 input; ··· 524 524 reg = <0x75>; 525 525 gpio-controller; 526 526 #gpio-cells = <2>; 527 - G1B_P0_0 { 527 + g1b-p0-0-hog { 528 528 gpio-hog; 529 529 gpios = <0 0>; 530 530 input; 531 531 line-name = "PVDDQ_ABC_PINALERT_N"; 532 532 }; 533 - G1B_P0_1 { 533 + g1b-p0-1-hog { 534 534 gpio-hog; 535 535 gpios = <1 0>; 536 536 input; 537 537 line-name = "PVDDQ_DEF_PINALERT_N"; 538 538 }; 539 - G1B_P0_2 { 539 + g1b-p0-2-hog { 540 540 gpio-hog; 541 541 gpios = <2 0>; 542 542 input; 543 543 line-name = "PVDDQ_GHJ_PINALERT_N"; 544 544 }; 545 - G1B_P0_3 { 545 + g1b-p0-3-hog { 546 546 gpio-hog; 547 547 gpios = <3 0>; 548 548 input; 549 549 line-name = "PVDDQ_KLM_PINALERT_N"; 550 550 }; 551 - G1B_P0_5 { 551 + g1b-p0-5-hog { 552 552 gpio-hog; 553 553 gpios = <5 0>; 554 554 input; 555 555 line-name = "FM_BOARD_REV_ID0"; 556 556 }; 557 - G1B_P0_6 { 557 + g1b-p0-6-hog { 558 558 gpio-hog; 559 559 gpios = <6 0>; 560 560 input; 561 561 line-name = "FM_BOARD_REV_ID1"; 562 562 }; 563 - G1B_P0_7 { 563 + g1b-p0-7-hog { 564 564 gpio-hog; 565 565 gpios = <7 0>; 566 566 input; 567 567 line-name = "FM_BOARD_REV_ID2"; 568 568 }; 569 - G1B_P1_0 { 569 + g1b-p1-0-hog { 570 570 gpio-hog; 571 571 gpios = <8 0>; 572 572 input; 573 573 line-name = "FM_OC_DETECT_EN_N"; 574 574 }; 575 - G1B_P1_1 { 575 + g1b-p1-1-hog { 576 576 gpio-hog; 577 577 gpios = <9 0>; 578 578 input; 579 579 line-name = "FM_FLASH_DESC_OVERRIDE"; 580 580 }; 581 - G1B_P1_2 { 581 + g1b-p1-2-hog { 582 582 gpio-hog; 583 583 gpios = <10 0>; 584 584 output-low; 585 585 line-name = "FP_PWR_ID_LED_N"; 586 586 }; 587 - G1B_P1_3 { 587 + g1b-p1-3-hog { 588 588 gpio-hog; 589 589 gpios = <11 0>; 590 590 output-low; 591 591 line-name = "BMC_LED_PWR_GRN"; 592 592 }; 593 - G1B_P1_4 { 593 + g1b-p1-4-hog { 594 594 gpio-hog; 595 595 gpios = <12 0>; 596 596 output-low; 597 597 line-name = "BMC_LED_PWR_AMBER"; 598 598 }; 599 - G1B_P1_5 { 599 + g1b-p1-5-hog { 600 600 gpio-hog; 601 601 gpios = <13 0>; 602 602 output-high; 603 603 line-name = "FM_BMC_FAULT_LED_N"; 604 604 }; 605 - G1B_P1_6 { 605 + g1b-p1-6-hog { 606 606 gpio-hog; 607 607 gpios = <14 0>; 608 608 output-high; 609 609 line-name = "FM_CPLD_BMC_PWRDN_N"; 610 610 }; 611 - G1B_P1_7 { 611 + g1b-p1-7-hog { 612 612 gpio-hog; 613 613 gpios = <15 0>; 614 614 output-high; ··· 626 626 gpio-controller; 627 627 #gpio-cells = <2>; 628 628 reset-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>; 629 - G2A_P0_0 { 629 + g2a-p0-0-hog { 630 630 gpio-hog; 631 631 gpios = <0 0>; 632 632 output-high; 633 633 line-name = "BMC_PON_RST_REQ_N"; 634 634 }; 635 - G2A_P0_1 { 635 + g2a-p0-1-hog { 636 636 gpio-hog; 637 637 gpios = <1 0>; 638 638 output-high; 639 639 line-name = "BMC_RST_IND_REQ_N"; 640 640 }; 641 - G2A_P0_2 { 641 + g2a-p0-2-hog { 642 642 gpio-hog; 643 643 gpios = <2 0>; 644 644 input; 645 645 line-name = "RST_BMC_RTCRST"; 646 646 }; 647 - G2A_P0_3 { 647 + g2a-p0-3-hog { 648 648 gpio-hog; 649 649 gpios = <3 0>; 650 650 output-high; 651 651 line-name = "FM_BMC_PWRBTN_OUT_N"; 652 652 }; 653 - G2A_P0_4 { 653 + g2a-p0-4-hog { 654 654 gpio-hog; 655 655 gpios = <4 0>; 656 656 output-high; 657 657 line-name = "RST_BMC_SYSRST_BTN_OUT_N"; 658 658 }; 659 - G2A_P0_5 { 659 + g2a-p0-5-hog { 660 660 gpio-hog; 661 661 gpios = <5 0>; 662 662 output-high; 663 663 line-name = "FM_BATTERY_SENSE_EN_N"; 664 664 }; 665 - G2A_P0_6 { 665 + g2a-p0-6-hog { 666 666 gpio-hog; 667 667 gpios = <6 0>; 668 668 output-high; 669 669 line-name = "FM_BMC_READY_N"; 670 670 }; 671 - G2A_P0_7 { 671 + g2a-p0-7-hog { 672 672 gpio-hog; 673 673 gpios = <7 0>; 674 674 input; 675 675 line-name = "IRQ_BMC_PCH_SMI_LPC_N"; 676 676 }; 677 - G2A_P1_0 { 677 + g2a-p1-0-hog { 678 678 gpio-hog; 679 679 gpios = <8 0>; 680 680 input; 681 681 line-name = "FM_SLOT4_CFG0"; 682 682 }; 683 - G2A_P1_1 { 683 + g2a-p1-1-hog { 684 684 gpio-hog; 685 685 gpios = <9 0>; 686 686 input; 687 687 line-name = "FM_SLOT4_CFG1"; 688 688 }; 689 - G2A_P1_2 { 689 + g2a-p1-2-hog { 690 690 gpio-hog; 691 691 gpios = <10 0>; 692 692 input; 693 693 line-name = "FM_NVDIMM_EVENT_N"; 694 694 }; 695 - G2A_P1_3 { 695 + g2a-p1-3-hog { 696 696 gpio-hog; 697 697 gpios = <11 0>; 698 698 input; 699 699 line-name = "PSU1_BLADE_EN_N"; 700 700 }; 701 - G2A_P1_4 { 701 + g2a-p1-4-hog { 702 702 gpio-hog; 703 703 gpios = <12 0>; 704 704 input; 705 705 line-name = "BMC_PCH_FNM"; 706 706 }; 707 - G2A_P1_5 { 707 + g2a-p1-5-hog { 708 708 gpio-hog; 709 709 gpios = <13 0>; 710 710 input; 711 711 line-name = "FM_SOL_UART_CH_SEL"; 712 712 }; 713 - G2A_P1_6 { 713 + g2a-p1-6-hog { 714 714 gpio-hog; 715 715 gpios = <14 0>; 716 716 input; ··· 723 723 reg = <0x75>; 724 724 gpio-controller; 725 725 #gpio-cells = <2>; 726 - G2B_P0_0 { 726 + g2b-p0-0-hog { 727 727 gpio-hog; 728 728 gpios = <0 0>; 729 729 input; 730 730 line-name = "FM_CPU_MSMI_LVT3_N"; 731 731 }; 732 - G2B_P0_1 { 732 + g2b-p0-1-hog { 733 733 gpio-hog; 734 734 gpios = <1 0>; 735 735 input; 736 736 line-name = "FM_BIOS_MRC_DEBUG_MSG_DIS"; 737 737 }; 738 - G2B_P0_2 { 738 + g2b-p0-2-hog { 739 739 gpio-hog; 740 740 gpios = <2 0>; 741 741 input; 742 742 line-name = "FM_CPU1_DISABLE_BMC_N"; 743 743 }; 744 - G2B_P0_3 { 744 + g2b-p0-3-hog { 745 745 gpio-hog; 746 746 gpios = <3 0>; 747 747 output-low; 748 748 line-name = "BMC_JTAG_SELECT"; 749 749 }; 750 - G2B_P0_4 { 750 + g2b-p0-4-hog { 751 751 gpio-hog; 752 752 gpios = <4 0>; 753 753 output-high; 754 754 line-name = "PECI_MUX_SELECT"; 755 755 }; 756 - G2B_P0_5 { 756 + g2b-p0-5-hog { 757 757 gpio-hog; 758 758 gpios = <5 0>; 759 759 output-high; 760 760 line-name = "I2C_MUX2_RESET_N"; 761 761 }; 762 - G2B_P0_6 { 762 + g2b-p0-6-hog { 763 763 gpio-hog; 764 764 gpios = <6 0>; 765 765 input; 766 766 line-name = "FM_BMC_CPLD_PSU2_ON"; 767 767 }; 768 - G2B_P0_7 { 768 + g2b-p0-7-hog { 769 769 gpio-hog; 770 770 gpios = <7 0>; 771 771 output-high; 772 772 line-name = "PSU2_ALERT_EN_N"; 773 773 }; 774 - G2B_P1_0 { 774 + g2b-p1-0-hog { 775 775 gpio-hog; 776 776 gpios = <8 0>; 777 777 output-high; 778 778 line-name = "FM_CPU_BMC_INIT"; 779 779 }; 780 - G2B_P1_1 { 780 + g2b-p1-1-hog { 781 781 gpio-hog; 782 782 gpios = <9 0>; 783 783 output-high; 784 784 line-name = "IRQ_BMC_PCH_SCI_LPC_N"; 785 785 }; 786 - G2B_P1_2 { 786 + g2b-p1-2-hog { 787 787 gpio-hog; 788 788 gpios = <10 0>; 789 789 output-low; 790 790 line-name = "PMB_ALERT_EN_N"; 791 791 }; 792 - G2B_P1_3 { 792 + g2b-p1-3-hog { 793 793 gpio-hog; 794 794 gpios = <11 0>; 795 795 output-high; 796 796 line-name = "FM_FAST_PROCHOT_EN_N"; 797 797 }; 798 - G2B_P1_4 { 798 + g2b-p1-4-hog { 799 799 gpio-hog; 800 800 gpios = <12 0>; 801 801 output-high; 802 802 line-name = "BMC_NVDIMM_PRSNT_N"; 803 803 }; 804 - G2B_P1_5 { 804 + g2b-p1-5-hog { 805 805 gpio-hog; 806 806 gpios = <13 0>; 807 807 output-low; 808 808 line-name = "FM_BACKUP_BIOS_SEL_H_BMC"; 809 809 }; 810 - G2B_P1_6 { 810 + g2b-p1-6-hog { 811 811 gpio-hog; 812 812 gpios = <14 0>; 813 813 output-high;
+65
arch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi
··· 58 58 &rg2mdio_pins>; 59 59 status = "disabled"; 60 60 }; 61 + 62 + udc0: usb@f0830000 { 63 + compatible = "nuvoton,npcm750-udc"; 64 + reg = <0xf0830000 0x1000 65 + 0xfffd0000 0x800>; 66 + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; 67 + clocks = <&clk NPCM7XX_CLK_SU>; 68 + clock-names = "clk_usb_bridge"; 69 + phys = <&udc0_phy>; 70 + phy_type = "utmi_wide"; 71 + dr_mode = "peripheral"; 72 + status = "disabled"; 73 + }; 74 + 75 + udc1: usb@f0831000 { 76 + compatible = "nuvoton,npcm750-udc"; 77 + reg = <0xf0831000 0x1000 78 + 0xfffd0800 0x800>; 79 + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; 80 + clocks = <&clk NPCM7XX_CLK_SU>; 81 + clock-names = "clk_usb_bridge"; 82 + phys = <&udc0_phy>; 83 + phy_type = "utmi_wide"; 84 + dr_mode = "peripheral"; 85 + status = "disabled"; 86 + }; 87 + 88 + udc2: usb@f0832000 { 89 + compatible = "nuvoton,npcm750-udc"; 90 + reg = <0xf0832000 0x1000 91 + 0xfffd1000 0x800>; 92 + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 93 + clocks = <&clk NPCM7XX_CLK_SU>; 94 + clock-names = "clk_usb_bridge"; 95 + phys = <&udc0_phy>; 96 + phy_type = "utmi_wide"; 97 + dr_mode = "peripheral"; 98 + status = "disabled"; 99 + }; 100 + 101 + udc3: usb@f0833000 { 102 + compatible = "nuvoton,npcm750-udc"; 103 + reg = <0xf0833000 0x1000 104 + 0xfffd1800 0x800>; 105 + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; 106 + clocks = <&clk NPCM7XX_CLK_SU>; 107 + clock-names = "clk_usb_bridge"; 108 + phys = <&udc0_phy>; 109 + phy_type = "utmi_wide"; 110 + dr_mode = "peripheral"; 111 + status = "disabled"; 112 + }; 113 + 114 + udc4: usb@f0834000 { 115 + compatible = "nuvoton,npcm750-udc"; 116 + reg = <0xf0834000 0x1000 117 + 0xfffd2000 0x800>; 118 + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; 119 + clocks = <&clk NPCM7XX_CLK_SU>; 120 + clock-names = "clk_usb_bridge"; 121 + phys = <&udc0_phy>; 122 + phy_type = "utmi_wide"; 123 + dr_mode = "peripheral"; 124 + status = "disabled"; 125 + }; 61 126 }; 62 127 };