Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
usb: dwc3: dwc3-octeon: Avoid half-initialized controller state
Power gpio configuration is done from the middle of
dwc3_octeon_clocks_start leaving hardware in half-initialized
state if it fails. As that indicates dwc3_octeon_clocks_start
does more than just initialize the clocks rename it appropriately
and verify power gpio configuration in advance at the beginning
of device probe.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
Link: https://lore.kernel.org/r/ZMd/oMRx8ze22/kK@lenoch
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
authored by
Ladislav Michl
and committed by
Greg Kroah-Hartman
c6110163
23f87bca
+43
-47
+43
-47
drivers/usb/dwc3/dwc3-octeon.c
+43
-47
drivers/usb/dwc3/dwc3-octeon.c
···
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void __iomem *base;
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};
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+
#define DWC3_GPIO_POWER_NONE (-1)
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+
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#ifdef CONFIG_CAVIUM_OCTEON_SOC
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#include <asm/octeon/octeon.h>
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static inline uint64_t dwc3_octeon_readq(void __iomem *addr)
···
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return div;
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}
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-
static int dwc3_octeon_config_power(struct device *dev, void __iomem *base)
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-
{
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uint32_t gpio_pwr[3];
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int gpio, len, power_active_low;
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struct device_node *node = dev->of_node;
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u64 val;
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void __iomem *uctl_host_cfg_reg = base + USBDRD_UCTL_HOST_CFG;
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-
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if (of_find_property(node, "power", &len) != NULL) {
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if (len == 12) {
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of_property_read_u32_array(node, "power", gpio_pwr, 3);
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power_active_low = gpio_pwr[2] & 0x01;
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gpio = gpio_pwr[1];
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} else if (len == 8) {
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of_property_read_u32_array(node, "power", gpio_pwr, 2);
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power_active_low = 0;
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gpio = gpio_pwr[1];
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} else {
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dev_err(dev, "invalid power configuration\n");
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return -EINVAL;
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-
}
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dwc3_octeon_config_gpio(((u64)base >> 24) & 1, gpio);
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-
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/* Enable XHCI power control and set if active high or low. */
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val = dwc3_octeon_readq(uctl_host_cfg_reg);
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val |= USBDRD_UCTL_HOST_PPC_EN;
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if (power_active_low)
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val &= ~USBDRD_UCTL_HOST_PPC_ACTIVE_HIGH_EN;
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else
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val |= USBDRD_UCTL_HOST_PPC_ACTIVE_HIGH_EN;
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dwc3_octeon_writeq(uctl_host_cfg_reg, val);
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} else {
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/* Disable XHCI power control and set if active high. */
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val = dwc3_octeon_readq(uctl_host_cfg_reg);
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val &= ~USBDRD_UCTL_HOST_PPC_EN;
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val &= ~USBDRD_UCTL_HOST_PPC_ACTIVE_HIGH_EN;
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-
dwc3_octeon_writeq(uctl_host_cfg_reg, val);
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dev_info(dev, "power control disabled\n");
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-
}
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return 0;
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-
}
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-
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-
static int dwc3_octeon_clocks_start(struct dwc3_octeon *octeon)
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+
static int dwc3_octeon_setup(struct dwc3_octeon *octeon,
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int power_gpio, int power_active_low)
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{
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int i, div, mpll_mul, ref_clk_fsel, ref_clk_sel = 2;
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u32 clock_rate;
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u64 val;
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struct device *dev = octeon->dev;
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void __iomem *uctl_ctl_reg = octeon->base + USBDRD_UCTL_CTL;
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void __iomem *uctl_host_cfg_reg = octeon->base + USBDRD_UCTL_HOST_CFG;
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if (dev->of_node) {
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const char *ss_clock_type;
···
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udelay(10);
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/* Step 8c: Setup power control. */
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-
if (dwc3_octeon_config_power(dev, octeon->base))
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-
return -EINVAL;
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val = dwc3_octeon_readq(uctl_host_cfg_reg);
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val |= USBDRD_UCTL_HOST_PPC_EN;
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if (power_gpio == DWC3_GPIO_POWER_NONE) {
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val &= ~USBDRD_UCTL_HOST_PPC_EN;
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} else {
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val |= USBDRD_UCTL_HOST_PPC_EN;
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dwc3_octeon_config_gpio(((__force uintptr_t)octeon->base >> 24) & 1,
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power_gpio);
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dev_dbg(dev, "power control is using gpio%d\n", power_gpio);
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}
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if (power_active_low)
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val &= ~USBDRD_UCTL_HOST_PPC_ACTIVE_HIGH_EN;
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+
else
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val |= USBDRD_UCTL_HOST_PPC_ACTIVE_HIGH_EN;
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dwc3_octeon_writeq(uctl_host_cfg_reg, val);
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/* Step 8d: Deassert UAHC reset signal. */
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val = dwc3_octeon_readq(uctl_ctl_reg);
···
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struct device *dev = &pdev->dev;
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struct device_node *node = dev->of_node;
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struct dwc3_octeon *octeon;
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-
int err;
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int power_active_low, power_gpio;
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int err, len;
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+
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power_gpio = DWC3_GPIO_POWER_NONE;
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power_active_low = 0;
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if (of_find_property(node, "power", &len)) {
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u32 gpio_pwr[3];
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+
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switch (len) {
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case 8:
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of_property_read_u32_array(node, "power", gpio_pwr, 2);
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break;
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case 12:
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of_property_read_u32_array(node, "power", gpio_pwr, 3);
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power_active_low = gpio_pwr[2] & 0x01;
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break;
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default:
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dev_err(dev, "invalid power configuration\n");
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return -EINVAL;
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}
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power_gpio = gpio_pwr[1];
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}
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octeon = devm_kzalloc(dev, sizeof(*octeon), GFP_KERNEL);
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if (!octeon)
···
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if (IS_ERR(octeon->base))
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return PTR_ERR(octeon->base);
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-
err = dwc3_octeon_clocks_start(octeon);
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+
err = dwc3_octeon_setup(octeon, power_gpio, power_active_low);
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if (err)
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return err;
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