tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/msm: Add CONTEXT_SWITCH_CNTL bitfields

Add missing bitfields to CONTEXT_SWITCH_CNTL in a6xx.xml.

Tested-by: Rob Clark <robdclark@gmail.com>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8450-HDK
Signed-off-by: Antonino Maniscalco <antomani103@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/618016/
Signed-off-by: Rob Clark <robdclark@chromium.org>

authored by

Antonino Maniscalco and committed by
Rob Clark c7546e2c b9365f41

+6 -1
+6 -1
drivers/gpu/drm/msm/registers/adreno/a6xx.xml
··· 2358 2358 <reg32 offset="0x0" name="REG" type="a6x_cp_protect"/> 2359 2359 </array> 2360 2360 2361 - <reg32 offset="0x08A0" name="CP_CONTEXT_SWITCH_CNTL"/> 2361 + <reg32 offset="0x08A0" name="CP_CONTEXT_SWITCH_CNTL"> 2362 + <bitfield name="STOP" pos="0" type="boolean"/> 2363 + <bitfield name="LEVEL" low="6" high="7"/> 2364 + <bitfield name="USES_GMEM" pos="8" type="boolean"/> 2365 + <bitfield name="SKIP_SAVE_RESTORE" pos="9" type="boolean"/> 2366 + </reg32> 2362 2367 <reg64 offset="0x08A1" name="CP_CONTEXT_SWITCH_SMMU_INFO"/> 2363 2368 <reg64 offset="0x08A3" name="CP_CONTEXT_SWITCH_PRIV_NON_SECURE_RESTORE_ADDR"/> 2364 2369 <reg64 offset="0x08A5" name="CP_CONTEXT_SWITCH_PRIV_SECURE_RESTORE_ADDR"/>