Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/msm/dpu: split _dpu_encoder_resource_control_helper()
Follow the _dpu_encoder_irq_control() change and split the
_dpu_encoder_resource_control_helper() into enable and disable parts.
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/577525/
Link: https://lore.kernel.org/r/20240208-fd_remove_phys_ops_atomic_mode_set-v4-2-caf5dcd125c0@linaro.org
+37
-20
+29
-16
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+29
-16
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
···
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}
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}
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764
-
static void _dpu_encoder_resource_control_helper(struct drm_encoder *drm_enc,
765
-
bool enable)
764
+
static void _dpu_encoder_resource_enable(struct drm_encoder *drm_enc)
766
765
{
767
766
struct msm_drm_private *priv;
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struct dpu_kms *dpu_kms;
···
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772
priv = drm_enc->dev->dev_private;
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dpu_kms = to_dpu_kms(priv->kms);
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774
-
trace_dpu_enc_rc_helper(DRMID(drm_enc), enable);
775
+
trace_dpu_enc_rc_enable(DRMID(drm_enc));
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if (!dpu_enc->cur_master) {
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DPU_ERROR("encoder master not set\n");
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return;
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}
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781
-
if (enable) {
782
-
/* enable DPU core clks */
783
-
pm_runtime_get_sync(&dpu_kms->pdev->dev);
782
+
/* enable DPU core clks */
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+
pm_runtime_get_sync(&dpu_kms->pdev->dev);
784
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-
/* enable all the irq */
786
-
_dpu_encoder_irq_enable(drm_enc);
785
+
/* enable all the irq */
786
+
_dpu_encoder_irq_enable(drm_enc);
787
+
}
787
788
788
-
} else {
789
-
/* disable all the irq */
790
-
_dpu_encoder_irq_disable(drm_enc);
789
+
static void _dpu_encoder_resource_disable(struct drm_encoder *drm_enc)
790
+
{
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+
struct msm_drm_private *priv;
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+
struct dpu_kms *dpu_kms;
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+
struct dpu_encoder_virt *dpu_enc;
791
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792
-
/* disable DPU core clks */
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-
pm_runtime_put_sync(&dpu_kms->pdev->dev);
795
+
dpu_enc = to_dpu_encoder_virt(drm_enc);
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+
priv = drm_enc->dev->dev_private;
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+
dpu_kms = to_dpu_kms(priv->kms);
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+
799
+
trace_dpu_enc_rc_disable(DRMID(drm_enc));
800
+
801
+
if (!dpu_enc->cur_master) {
802
+
DPU_ERROR("encoder master not set\n");
803
+
return;
794
804
}
795
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+
/* disable all the irq */
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+
_dpu_encoder_irq_disable(drm_enc);
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+
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+
/* disable DPU core clks */
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+
pm_runtime_put_sync(&dpu_kms->pdev->dev);
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811
}
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static int dpu_encoder_resource_control(struct drm_encoder *drm_enc,
···
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851
if (is_vid_mode && dpu_enc->rc_state == DPU_ENC_RC_STATE_IDLE)
865
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_dpu_encoder_irq_enable(drm_enc);
866
853
else
867
-
_dpu_encoder_resource_control_helper(drm_enc, true);
854
+
_dpu_encoder_resource_enable(drm_enc);
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dpu_enc->rc_state = DPU_ENC_RC_STATE_ON;
870
857
···
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946
* and in IDLE state the resources are already disabled
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*/
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if (dpu_enc->rc_state == DPU_ENC_RC_STATE_PRE_OFF)
962
-
_dpu_encoder_resource_control_helper(drm_enc, false);
949
+
_dpu_encoder_resource_disable(drm_enc);
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dpu_enc->rc_state = DPU_ENC_RC_STATE_OFF;
965
952
···
994
981
if (is_vid_mode)
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982
_dpu_encoder_irq_disable(drm_enc);
996
983
else
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-
_dpu_encoder_resource_control_helper(drm_enc, false);
984
+
_dpu_encoder_resource_disable(drm_enc);
998
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986
dpu_enc->rc_state = DPU_ENC_RC_STATE_IDLE;
1000
987
+8
-4
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
+8
-4
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
···
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TP_PROTO(uint32_t drm_id),
274
274
TP_ARGS(drm_id)
275
275
);
276
+
DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_rc_enable,
277
+
TP_PROTO(uint32_t drm_id),
278
+
TP_ARGS(drm_id)
279
+
);
280
+
DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_rc_disable,
281
+
TP_PROTO(uint32_t drm_id),
282
+
TP_ARGS(drm_id)
283
+
);
276
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TRACE_EVENT(dpu_enc_enable,
278
286
TP_PROTO(uint32_t drm_id, int hdisplay, int vdisplay),
···
349
341
),
350
342
TP_printk("id=%u, enable=%s",
351
343
__entry->drm_id, __entry->enable ? "true" : "false")
352
-
);
353
-
DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_rc_helper,
354
-
TP_PROTO(uint32_t drm_id, bool enable),
355
-
TP_ARGS(drm_id, enable)
356
344
);
357
345
DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_vblank_cb,
358
346
TP_PROTO(uint32_t drm_id, bool enable),