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Merge tag 'omap-for-v6.13/dt-signed-1' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap into soc/dt

ARM: dts: OMAP updates for v6.13

Misc. minor updates for OMAP3, OMAP4, AM3 and DRA7 platforms.

* tag 'omap-for-v6.13/dt-signed-1' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap:
ARM: dts: omap4-kc1: fix twl6030 power node
ARM: dts: am335x-bone-common: Increase MDIO reset deassert delay to 50ms
ARM: dts: ti/omap: omap4-epson-embt2ws: add charger
ARM: dts: omap36xx: declare 1GHz OPP as turbo again
ARM: ti/omap: omap3-gta04a5: add Bluetooth
ARM: dts: ti/omap: dra7: fix redundant clock divider definition
ARM: dts: ti/omap: use standard node name for twl4030 charger
ARM: dts: omap: omap4-epson-embt2ws: add GPIO expander
ARM: dts: omap: omap4-epson-embt2ws: add unknown gpio outputs
ARM: dts: omap: omap4-epson-embt2ws: wire up regulators
ARM: dts: omap: omap4-epson-embt2ws: define GPIO regulators
ARM: dts: ti: dra7: Remove double include of clock bindings
ARM: dts: ti: omap3434-sdp: drop linux,mtd-name from onenand node
ARM: dts: ti: omap: am335x-baltos: drop "gpmc,device-nand" from NAND node
ARM: dts: ti: drop linux,mtd-name from NAND nodes
ARM: dts: ti/omap: Fix at24 EEPROM node names

+248 -56
+1 -2
arch/arm/boot/dts/ti/omap/am335x-baltos.dtsi
··· 199 199 ti,nand-ecc-opt = "bch8"; 200 200 ti,nand-xfer-type = "prefetch-dma"; 201 201 202 - gpmc,device-nand = "true"; 203 202 gpmc,device-width = <1>; 204 203 gpmc,sync-clk-ps = <0>; 205 204 gpmc,cs-on-ns = <0>; ··· 250 251 pinctrl-0 = <&tps65910_pins>; 251 252 }; 252 253 253 - at24@50 { 254 + eeprom@50 { 254 255 compatible = "atmel,24c02"; 255 256 pagesize = <8>; 256 257 reg = <0x50>;
+6 -6
arch/arm/boot/dts/ti/omap/am335x-bone-common.dtsi
··· 216 216 reg = <0x24>; 217 217 }; 218 218 219 - baseboard_eeprom: baseboard_eeprom@50 { 219 + baseboard_eeprom: eeprom@50 { 220 220 compatible = "atmel,24c256"; 221 221 reg = <0x50>; 222 222 vcc-supply = <&ldo4_reg>; ··· 240 240 status = "okay"; 241 241 clock-frequency = <100000>; 242 242 243 - cape_eeprom0: cape_eeprom0@54 { 243 + cape_eeprom0: eeprom@54 { 244 244 compatible = "atmel,24c256"; 245 245 reg = <0x54>; 246 246 ··· 255 255 }; 256 256 }; 257 257 258 - cape_eeprom1: cape_eeprom1@55 { 258 + cape_eeprom1: eeprom@55 { 259 259 compatible = "atmel,24c256"; 260 260 reg = <0x55>; 261 261 ··· 270 270 }; 271 271 }; 272 272 273 - cape_eeprom2: cape_eeprom2@56 { 273 + cape_eeprom2: eeprom@56 { 274 274 compatible = "atmel,24c256"; 275 275 reg = <0x56>; 276 276 ··· 285 285 }; 286 286 }; 287 287 288 - cape_eeprom3: cape_eeprom3@57 { 288 + cape_eeprom3: eeprom@57 { 289 289 compatible = "atmel,24c256"; 290 290 reg = <0x57>; 291 291 ··· 409 409 /* Support GPIO reset on revision C3 boards */ 410 410 reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; 411 411 reset-assert-us = <300>; 412 - reset-deassert-us = <13000>; 412 + reset-deassert-us = <50000>; 413 413 }; 414 414 }; 415 415
+1 -1
arch/arm/boot/dts/ti/omap/am335x-boneblue.dts
··· 313 313 }; 314 314 315 315 &i2c0 { 316 - baseboard_eeprom: baseboard_eeprom@50 { 316 + baseboard_eeprom: eeprom@50 { 317 317 compatible = "atmel,24c256"; 318 318 reg = <0x50>; 319 319
+3 -3
arch/arm/boot/dts/ti/omap/am335x-pdu001.dts
··· 289 289 reg = <0x2d>; 290 290 }; 291 291 292 - m2_eeprom: m2_eeprom@50 { 292 + m2_eeprom: eeprom@50 { 293 293 compatible = "atmel,24c256"; 294 294 reg = <0x50>; 295 295 status = "okay"; ··· 303 303 status = "okay"; 304 304 clock-frequency = <100000>; 305 305 306 - board_24aa025e48: board_24aa025e48@50 { 306 + board_24aa025e48: eeprom@50 { 307 307 compatible = "atmel,24c02"; 308 308 reg = <0x50>; 309 309 }; 310 310 311 - backplane_24aa025e48: backplane_24aa025e48@53 { 311 + backplane_24aa025e48: eeprom@53 { 312 312 compatible = "atmel,24c02"; 313 313 reg = <0x53>; 314 314 };
+1 -1
arch/arm/boot/dts/ti/omap/am335x-shc.dts
··· 169 169 reg = <0x24>; 170 170 }; 171 171 172 - at24@50 { 172 + eeprom@50 { 173 173 compatible = "atmel,24c32"; 174 174 pagesize = <32>; 175 175 reg = <0x50>;
-1
arch/arm/boot/dts/ti/omap/am3517-som.dtsi
··· 44 44 45 45 nand@0,0 { 46 46 compatible = "ti,omap2-nand"; 47 - linux,mtd-name = "micron,mt29f4g16abchch"; 48 47 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ 49 48 nand-bus-width = <16>; 50 49 ti,nand-ecc-opt = "bch8";
+4 -4
arch/arm/boot/dts/ti/omap/am3874-iceboard.dts
··· 249 249 tmp100@4c { compatible = "ti,tmp100"; reg = <0x4c>; }; 250 250 251 251 /* EEPROM bank and serial number are treated as separate devices */ 252 - at24c01@57 { compatible = "atmel,24c01"; reg = <0x57>; }; 253 - at24cs01@5f { compatible = "atmel,24cs01"; reg = <0x5f>; }; 252 + eeprom@57 { compatible = "atmel,24c01"; reg = <0x57>; }; 253 + eeprom@5f { compatible = "atmel,24cs01"; reg = <0x5f>; }; 254 254 }; 255 255 }; 256 256 }; ··· 270 270 multi-master; 271 271 272 272 /* All backplanes should have this -- it's how we know they're there. */ 273 - at24c08@54 { compatible="atmel,24c08"; reg=<0x54>; }; 274 - at24cs08@5c { compatible="atmel,24cs08"; reg=<0x5c>; }; 273 + eeprom@54 { compatible="atmel,24c08"; reg=<0x54>; }; 274 + eeprom@5c { compatible="atmel,24cs08"; reg=<0x5c>; }; 275 275 276 276 /* 16 slot backplane */ 277 277 tmp421@4d { compatible="ti,tmp421"; reg=<0x4d>; };
+1 -1
arch/arm/boot/dts/ti/omap/am437x-cm-t43.dts
··· 254 254 }; 255 255 }; 256 256 257 - eeprom_module: at24@50 { 257 + eeprom_module: eeprom@50 { 258 258 compatible = "atmel,24c02"; 259 259 reg = <0x50>; 260 260 pagesize = <16>;
+1 -1
arch/arm/boot/dts/ti/omap/am437x-idk-evm.dts
··· 333 333 pinctrl-1 = <&i2c0_pins_sleep>; 334 334 clock-frequency = <400000>; 335 335 336 - at24@50 { 336 + eeprom@50 { 337 337 compatible = "atmel,24c256"; 338 338 pagesize = <64>; 339 339 reg = <0x50>;
+1 -1
arch/arm/boot/dts/ti/omap/am437x-sbc-t43.dts
··· 112 112 #gpio-cells = <2>; 113 113 }; 114 114 115 - eeprom_base: at24@50 { 115 + eeprom_base: eeprom@50 { 116 116 compatible = "atmel,24c02"; 117 117 reg = <0x50>; 118 118 pagesize = <16>;
+1 -1
arch/arm/boot/dts/ti/omap/am437x-sk-evm.dts
··· 570 570 }; 571 571 }; 572 572 573 - at24@50 { 573 + eeprom@50 { 574 574 compatible = "atmel,24c256"; 575 575 pagesize = <64>; 576 576 reg = <0x50>;
+1 -1
arch/arm/boot/dts/ti/omap/am43x-epos-evm.dts
··· 651 651 }; 652 652 }; 653 653 654 - at24@50 { 654 + eeprom@50 { 655 655 compatible = "atmel,24c256"; 656 656 pagesize = <64>; 657 657 reg = <0x50>;
+1 -1
arch/arm/boot/dts/ti/omap/am57xx-cl-som-am57x.dts
··· 429 429 reg = <0x56>; 430 430 }; 431 431 432 - eeprom_module: atmel@50 { 432 + eeprom_module: eeprom@50 { 433 433 compatible = "atmel,24c08"; 434 434 reg = <0x50>; 435 435 pagesize = <16>;
+1 -1
arch/arm/boot/dts/ti/omap/am57xx-sbc-am57x.dts
··· 105 105 pinctrl-0 = <&i2c5_pins_default>; 106 106 clock-frequency = <400000>; 107 107 108 - eeprom_base: atmel@54 { 108 + eeprom_base: eeprom@54 { 109 109 compatible = "atmel,24c08"; 110 110 reg = <0x54>; 111 111 pagesize = <16>;
-1
arch/arm/boot/dts/ti/omap/dm8148-evm.dts
··· 51 51 interrupt-parent = <&gpmc>; 52 52 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 53 53 <1 IRQ_TYPE_NONE>; /* termcount */ 54 - linux,mtd-name = "micron,mt29f2g16aadwp"; 55 54 #address-cells = <1>; 56 55 #size-cells = <1>; 57 56 ti,nand-ecc-opt = "bch8";
-1
arch/arm/boot/dts/ti/omap/dm8168-evm.dts
··· 119 119 120 120 nand@0,0 { 121 121 compatible = "ti,omap2-nand"; 122 - linux,mtd-name = "micron,mt29f2g16aadwp"; 123 122 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ 124 123 interrupt-parent = <&gpmc>; 125 124 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
-1
arch/arm/boot/dts/ti/omap/dra62x-j5eco-evm.dts
··· 51 51 interrupt-parent = <&gpmc>; 52 52 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 53 53 <1 IRQ_TYPE_NONE>; /* termcount */ 54 - linux,mtd-name = "micron,mt29f2g16aadwp"; 55 54 #address-cells = <1>; 56 55 #size-cells = <1>; 57 56 ti,nand-ecc-opt = "bch8";
-1
arch/arm/boot/dts/ti/omap/dra7.dtsi
··· 9 9 #include <dt-bindings/clock/dra7.h> 10 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 11 #include <dt-bindings/pinctrl/dra.h> 12 - #include <dt-bindings/clock/dra7.h> 13 12 14 13 #define MAX_SOURCES 400 15 14
-1
arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi
··· 1376 1376 clocks = <&apll_pcie_ck>; 1377 1377 #clock-cells = <0>; 1378 1378 reg = <0x021c>; 1379 - ti,dividers = <2>, <1>; 1380 1379 ti,bit-shift = <8>; 1381 1380 ti,max-div = <2>; 1382 1381 };
-1
arch/arm/boot/dts/ti/omap/logicpd-som-lv.dtsi
··· 51 51 interrupt-parent = <&gpmc>; 52 52 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 53 53 <1 IRQ_TYPE_NONE>; /* termcount */ 54 - linux,mtd-name = "micron,mt29f4g16abbda3w"; 55 54 nand-bus-width = <16>; 56 55 ti,nand-ecc-opt = "bch8"; 57 56 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
+1 -2
arch/arm/boot/dts/ti/omap/logicpd-torpedo-som.dtsi
··· 49 49 interrupt-parent = <&gpmc>; 50 50 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 51 51 <1 IRQ_TYPE_NONE>; /* termcount */ 52 - linux,mtd-name = "micron,mt29f4g16abbda3w"; 53 52 nand-bus-width = <16>; 54 53 ti,nand-ecc-opt = "bch8"; 55 54 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ ··· 102 103 pinctrl-names = "default"; 103 104 pinctrl-0 = <&i2c3_pins>; 104 105 clock-frequency = <400000>; 105 - at24@50 { 106 + eeprom@50 { 106 107 compatible = "atmel,24c64"; 107 108 readonly; 108 109 reg = <0x50>;
+1 -1
arch/arm/boot/dts/ti/omap/omap3-cm-t3x.dtsi
··· 190 190 191 191 clock-frequency = <400000>; 192 192 193 - at24@50 { 193 + eeprom@50 { 194 194 compatible = "atmel,24c02"; 195 195 pagesize = <16>; 196 196 reg = <0x50>;
-1
arch/arm/boot/dts/ti/omap/omap3-evm-37xx.dts
··· 60 60 interrupt-parent = <&gpmc>; 61 61 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 62 62 <1 IRQ_TYPE_NONE>; /* termcount */ 63 - linux,mtd-name = "hynix,h8kds0un0mer-4em"; 64 63 nand-bus-width = <16>; 65 64 gpmc,device-width = <2>; 66 65 ti,nand-ecc-opt = "bch8";
-1
arch/arm/boot/dts/ti/omap/omap3-evm.dts
··· 60 60 interrupt-parent = <&gpmc>; 61 61 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 62 62 <1 IRQ_TYPE_NONE>; /* termcount */ 63 - linux,mtd-name = "micron,mt29f2g16abdhc"; 64 63 nand-bus-width = <16>; 65 64 gpmc,device-width = <2>; 66 65 ti,nand-ecc-opt = "bch8";
+1 -1
arch/arm/boot/dts/ti/omap/omap3-gta04.dtsi
··· 601 601 }; 602 602 603 603 /* RFID EEPROM */ 604 - m24lr64@50 { 604 + eeprom@50 { 605 605 compatible = "atmel,24c64"; 606 606 reg = <0x50>; 607 607 };
+10
arch/arm/boot/dts/ti/omap/omap3-gta04a5.dts
··· 114 114 }; 115 115 }; 116 116 117 + &uart1 { 118 + bluetooth { 119 + compatible = "ti,wl1837-st"; 120 + pinctrl-names = "default"; 121 + pinctrl-0 = <&bt_pins>; 122 + enable-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>; /* GPIO_137 */ 123 + }; 124 + }; 125 + 126 + 117 127 &i2c2 { 118 128 /delete-node/ bmp085@77; 119 129 /delete-node/ bma180@41;
-1
arch/arm/boot/dts/ti/omap/omap3-igep.dtsi
··· 111 111 interrupt-parent = <&gpmc>; 112 112 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 113 113 <1 IRQ_TYPE_NONE>; /* termcount */ 114 - linux,mtd-name = "micron,mt29c4g96maz"; 115 114 nand-bus-width = <16>; 116 115 gpmc,device-width = <2>; 117 116 ti,nand-ecc-opt = "bch8";
-1
arch/arm/boot/dts/ti/omap/omap3-ldp.dts
··· 103 103 interrupt-parent = <&gpmc>; 104 104 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 105 105 <1 IRQ_TYPE_NONE>; /* termcount */ 106 - linux,mtd-name = "micron,nand"; 107 106 nand-bus-width = <16>; 108 107 gpmc,device-width = <2>; 109 108 ti,nand-ecc-opt = "bch8";
-1
arch/arm/boot/dts/ti/omap/omap3-overo-base.dtsi
··· 222 222 223 223 nand@0,0 { 224 224 compatible = "ti,omap2-nand"; 225 - linux,mtd-name = "micron,mt29c4g96maz"; 226 225 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ 227 226 interrupt-parent = <&gpmc>; 228 227 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+1 -1
arch/arm/boot/dts/ti/omap/omap3-sb-t35.dtsi
··· 89 89 90 90 clock-frequency = <400000>; 91 91 92 - at24@50 { 92 + eeprom@50 { 93 93 compatible = "atmel,24c02"; 94 94 pagesize = <16>; 95 95 reg = <0x50>;
-2
arch/arm/boot/dts/ti/omap/omap3430-sdp.dts
··· 105 105 interrupt-parent = <&gpmc>; 106 106 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 107 107 <1 IRQ_TYPE_NONE>; /* termcount */ 108 - linux,mtd-name = "micron,mt29f1g08abb"; 109 108 #address-cells = <1>; 110 109 #size-cells = <1>; 111 110 ti,nand-ecc-opt = "sw"; ··· 147 148 }; 148 149 149 150 onenand@2,0 { 150 - linux,mtd-name = "samsung,kfm2g16q2m-deb8"; 151 151 #address-cells = <1>; 152 152 #size-cells = <1>; 153 153 compatible = "ti,omap2-onenand";
+1
arch/arm/boot/dts/ti/omap/omap36xx.dtsi
··· 72 72 <1375000 1375000 1375000>; 73 73 /* only on am/dm37x with speed-binned bit set */ 74 74 opp-supported-hw = <0xffffffff 2>; 75 + turbo-mode; 75 76 }; 76 77 }; 77 78
+206 -5
arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts
··· 17 17 reg = <0x80000000 0x40000000>; /* 1024M */ 18 18 }; 19 19 20 + battery: battery { 21 + compatible = "simple-battery"; 22 + device-chemistry = "lithium-ion"; 23 + charge-full-design-microamp-hours = <2720000>; 24 + voltage-max-design-microvolt = <4200000>; 25 + voltage-min-design-microvolt = <3300000>; 26 + 27 + constant-charge-voltage-max-microvolt = <4200000>; 28 + /* 29 + * vendor kernel says max charge 1400000, input limit 900000 30 + * and charges only with dcp chargers. So it is unclear what 31 + * is really allowed. Play safe for now and restrict things 32 + * here. Maybe 900000 is just the limit of the vendor charger? 33 + */ 34 + constant-charge-current-max-microamp = <900000>; 35 + charge-term-current-microamp = <200000>; 36 + }; 37 + 20 38 backlight-left { 21 39 compatible = "pwm-backlight"; 22 40 pwms = <&twl_pwm 1 7812500>; 23 - power-supply = <&unknown_supply>; 41 + power-supply = <&lb_v50>; 24 42 }; 25 43 26 44 backlight-right { 27 45 compatible = "pwm-backlight"; 28 46 pwms = <&twl_pwm 0 7812500>; 29 - power-supply = <&unknown_supply>; 47 + power-supply = <&lb_v50>; 30 48 }; 31 49 32 50 chosen { ··· 64 46 }; 65 47 }; 66 48 67 - unknown_supply: unknown-supply { 49 + cb_v18: regulator-cb-v18 { 50 + pinctrl-names = "default"; 51 + pinctrl-0 = <&cb_v18_pins>; 68 52 compatible = "regulator-fixed"; 69 - regulator-name = "unknown"; 53 + regulator-name = "cb_v18"; 54 + regulator-min-microvolt = <1800000>; 55 + regulator-max-microvolt = <1800000>; 56 + regulator-always-on; 57 + gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>; 58 + enable-active-high; 59 + }; 60 + 61 + cb_v33: regulator-cb-v33 { 62 + pinctrl-names = "default"; 63 + pinctrl-0 = <&cb_v33_pins>; 64 + compatible = "regulator-fixed"; 65 + regulator-name = "cb_v33"; 66 + regulator-min-microvolt = <3300000>; 67 + regulator-max-microvolt = <3300000>; 68 + regulator-always-on; 69 + gpio = <&gpio6 30 GPIO_ACTIVE_HIGH>; 70 + enable-active-high; 71 + }; 72 + 73 + regulator-cb-v50 { 74 + pinctrl-names = "default"; 75 + pinctrl-0 = <&cb_v50_pins>; 76 + compatible = "regulator-fixed"; 77 + regulator-name = "cb_v50"; 78 + regulator-min-microvolt = <5000000>; 79 + regulator-max-microvolt = <5000000>; 80 + regulator-always-on; 81 + gpio = <&gpio6 31 GPIO_ACTIVE_HIGH>; 82 + enable-active-high; 83 + }; 84 + 85 + lb_v50: regulator-lb-v50 { 86 + /* required for many things at the head (probably indirectly) */ 87 + pinctrl-names = "default"; 88 + pinctrl-0 = <&lb_v50_pins>; 89 + compatible = "regulator-fixed"; 90 + regulator-name = "lb_v50"; 91 + regulator-min-microvolt = <5000000>; 92 + regulator-max-microvolt = <5000000>; 93 + regulator-always-on; 94 + gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>; 95 + enable-active-high; 70 96 }; 71 97 72 98 wl12xx_pwrseq: wl12xx-pwrseq { ··· 133 71 }; 134 72 }; 135 73 74 + &gpio1 { 75 + pinctrl-names = "default"; 76 + pinctrl-0 = <&gpio1_hog_pins &gpio1wk_hog_pins>; 77 + 78 + lb-reset-hog { 79 + gpio-hog; 80 + gpios = <9 GPIO_ACTIVE_HIGH>; 81 + output-low; 82 + line-name = "lb_reset"; 83 + }; 84 + 85 + power-en-hog { 86 + gpio-hog; 87 + gpios = <10 GPIO_ACTIVE_HIGH>; 88 + output-high; 89 + line-name = "power_en"; 90 + }; 91 + 92 + /* 93 + * Name taken from vendor kernel but no evidence of actual usage found 94 + * nor what it really controls. 95 + */ 96 + panel-power-en-hog { 97 + gpio-hog; 98 + gpios = <14 GPIO_ACTIVE_HIGH>; 99 + output-low; 100 + line-name = "panel_power_en"; 101 + }; 102 + 103 + /* 104 + * These two are exported to sysfs in vendor kernel, usage unknown, 105 + * backlight state seems unrelated to these. 106 + */ 107 + blc-r-hog { 108 + gpio-hog; 109 + gpios = <17 GPIO_ACTIVE_HIGH>; 110 + output-low; 111 + line-name = "blc_r"; 112 + }; 113 + 114 + blc-l-hog { 115 + gpio-hog; 116 + gpios = <16 GPIO_ACTIVE_HIGH>; 117 + output-low; 118 + line-name = "blc_l"; 119 + }; 120 + 121 + high-hog { 122 + gpio-hog; 123 + gpios = <15 GPIO_ACTIVE_HIGH /* maybe dsi to dpi chip reset? */ 124 + 21 GPIO_ACTIVE_HIGH 125 + 26 GPIO_ACTIVE_HIGH>; 126 + output-high; 127 + line-name = "unknown-high"; 128 + }; 129 + 130 + low-hog { 131 + gpio-hog; 132 + gpios = <18 GPIO_ACTIVE_HIGH 133 + 19 GPIO_ACTIVE_HIGH 134 + 20 GPIO_ACTIVE_HIGH 135 + 22 GPIO_ACTIVE_HIGH>; 136 + output-low; 137 + line-name = "unknown-low"; 138 + }; 139 + }; 140 + 136 141 &i2c1 { 137 142 pinctrl-names = "default"; 138 143 pinctrl-0 = <&i2c1_pins>; ··· 215 86 interrupt-controller; 216 87 #interrupt-cells = <1>; 217 88 system-power-controller; 89 + 90 + charger { 91 + compatible = "ti,twl6032-charger", "ti,twl6030-charger"; 92 + interrupts = <2>, <5>; 93 + io-channels = <&gpadc 10>; 94 + io-channel-names = "vusb"; 95 + monitored-battery = <&battery>; 96 + }; 218 97 219 98 rtc { 220 99 compatible = "ti,twl4030-rtc"; ··· 303 166 #pwm-cells = <2>; 304 167 }; 305 168 306 - gpadc { 169 + gpadc: gpadc { 307 170 compatible = "ti,twl6032-gpadc"; 308 171 interrupts = <3>; 309 172 #io-channel-cells = <1>; ··· 324 187 pinctrl-0 = <&i2c2_pins>; 325 188 326 189 clock-frequency = <200000>; 190 + 191 + /* is sometimes not available, research needed */ 192 + gpio_head: gpio@20 { 193 + compatible = "ti,tca6408"; 194 + reg = <0x20>; 195 + gpio-controller; 196 + #gpio-cells = <2>; 197 + }; 198 + 199 + /* 200 + * camera chip at 0x3c, available if <&gpio_head 1> high 201 + * and <&gpio_head 5> low 202 + */ 327 203 328 204 /* at head/glasses */ 329 205 mpu9150h: imu@68 { ··· 409 259 pinctrl-0 = <&mpu9150_pins>; 410 260 interrupt-parent = <&gpio2>; 411 261 interrupt = <7 IRQ_TYPE_LEVEL_HIGH>; 262 + vddio-supply = <&cb_v18>; 263 + vdd-supply = <&cb_v33>; 412 264 invensense,level-shifter; 413 265 }; 414 266 }; ··· 488 336 >; 489 337 }; 490 338 339 + cb_v18_pins: pinmux-cb-v18-pins { 340 + pinctrl-single,pins = < 341 + OMAP4_IOPAD(0x1d0, PIN_OUTPUT | MUX_MODE3) /* gpio28 */ 342 + >; 343 + }; 344 + 345 + cb_v33_pins: pinmux-cb-v33-pins { 346 + pinctrl-single,pins = < 347 + OMAP4_IOPAD(0x1d2, PIN_OUTPUT | MUX_MODE3) /* gpio190 */ 348 + >; 349 + }; 350 + 351 + cb_v50_pins: pinmux-cb-v50-pins { 352 + pinctrl-single,pins = < 353 + OMAP4_IOPAD(0x1d4, PIN_OUTPUT | MUX_MODE3) /* gpio191 */ 354 + >; 355 + }; 356 + 491 357 gpio_keys_pins: pinmux-gpio-key-pins { 492 358 pinctrl-single,pins = < 493 359 OMAP4_IOPAD(0x56, PIN_INPUT_PULLUP | MUX_MODE3) /* gpio35 */ 360 + >; 361 + }; 362 + 363 + gpio1_hog_pins: pinmux-gpio1-hog-pins { 364 + pinctrl-single,pins = < 365 + OMAP4_IOPAD(0x1b4, PIN_OUTPUT | MUX_MODE3) /* gpio14 */ 366 + OMAP4_IOPAD(0x1b8, PIN_OUTPUT | MUX_MODE3) /* gpio16 */ 367 + OMAP4_IOPAD(0x1ba, PIN_OUTPUT | MUX_MODE3) /* gpio17 */ 368 + 369 + OMAP4_IOPAD(0x1b6, PIN_OUTPUT | MUX_MODE3) /* gpio15 */ 370 + OMAP4_IOPAD(0x1bc, PIN_OUTPUT | MUX_MODE3) /* gpio18 */ 371 + OMAP4_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE3) /* gpio19 */ 372 + OMAP4_IOPAD(0x1c0, PIN_OUTPUT | MUX_MODE3) /* gpio20 */ 373 + OMAP4_IOPAD(0x1c2, PIN_OUTPUT | MUX_MODE3) /* gpio21 */ 374 + OMAP4_IOPAD(0x1c4, PIN_OUTPUT | MUX_MODE3) /* gpio22 */ 375 + OMAP4_IOPAD(0x1cc, PIN_OUTPUT | MUX_MODE3) /* gpio26 */ 494 376 >; 495 377 }; 496 378 ··· 570 384 OMAP4_IOPAD(0x005a, PIN_OUTPUT | MUX_MODE1) 571 385 /* kpd_col2 */ 572 386 OMAP4_IOPAD(0x005c, PIN_OUTPUT | MUX_MODE1) 387 + >; 388 + }; 389 + 390 + lb_v50_pins: pinmux-lb-v50-pins { 391 + pinctrl-single,pins = < 392 + OMAP4_IOPAD(0x1ce, PIN_OUTPUT | MUX_MODE3) /* gpio27 */ 573 393 >; 574 394 }; 575 395 ··· 645 453 wl12xx_gpio: pinmux-wl12xx-gpio-pins { 646 454 pinctrl-single,pins = < 647 455 OMAP4_IOPAD(0x1c8, PIN_OUTPUT | MUX_MODE3) /* gpio_24 / WLAN_EN */ 456 + >; 457 + }; 458 + }; 459 + 460 + &omap4_pmx_wkup { 461 + gpio1wk_hog_pins: pinmux-gpio1wk-hog-pins { 462 + pinctrl-single,pins = < 463 + OMAP4_IOPAD(0x68, PIN_INPUT_PULLDOWN | MUX_MODE3) /* gpio9 */ 464 + OMAP4_IOPAD(0x6a, PIN_INPUT | MUX_MODE3) /* gpio10 */ 648 465 >; 649 466 }; 650 467 };
+1 -5
arch/arm/boot/dts/ti/omap/omap4-kc1.dts
··· 112 112 reg = <0x48>; 113 113 /* IRQ# = 7 */ 114 114 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */ 115 - 116 - twl_power: power { 117 - compatible = "ti,twl6030-power"; 118 - ti,system-power-controller; 119 - }; 115 + system-power-controller; 120 116 }; 121 117 }; 122 118
+1 -1
arch/arm/boot/dts/ti/omap/omap5-cm-t54.dts
··· 413 413 414 414 clock-frequency = <400000>; 415 415 416 - at24@50 { 416 + eeprom@50 { 417 417 compatible = "atmel,24c02"; 418 418 pagesize = <16>; 419 419 reg = <0x50>;
+1 -1
arch/arm/boot/dts/ti/omap/omap5-sbc-t54.dts
··· 44 44 45 45 clock-frequency = <400000>; 46 46 47 - at24@50 { 47 + eeprom@50 { 48 48 compatible = "atmel,24c02"; 49 49 pagesize = <16>; 50 50 reg = <0x50>;
+1 -1
arch/arm/boot/dts/ti/omap/twl4030.dtsi
··· 16 16 interrupts = <11>; 17 17 }; 18 18 19 - charger: bci { 19 + charger: charger { 20 20 compatible = "ti,twl4030-bci"; 21 21 interrupts = <9>, <2>; 22 22 bci3v1-supply = <&vusb3v1>;