Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'samsung-dt-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM changes for v6.4
1. Several cleanups and improvements as a result of dtbs_checks: align
node names with bindings, drop incorrect properties, fix clock-names,
add missing "ports" node.
2. Move DP and MIPI phys to PMU node (DTS with binding change).
3. Drop old MSHC aliases (while adding proper mmc-ddr-1_8v which was
selected by the driver based on the MSHC alias) and add generic MMC
aliases in each board. The aliases match known numbering in
the schematics.
* tag 'samsung-dt-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
dt-bindings: soc: samsung: exynos-pmu: allow phys as child on Exynos3 and Exynos4
ARM: dts: exynos: add mmc aliases
ARM: dts: exynos: replace mshc0 alias with mmc-ddr-1_8v property
ARM: dts: exynos: fix MCT compatible in Universal C210
ARM: dts: exynos: move DP and MIPI phys to PMU node in Exynos5250
ARM: dts: exynos: move DP and MIPI phys to PMU node in Exynos5420
ARM: dts: exynos: move MIPI phy to PMU node in Exynos4
ARM: dts: exynos: move MIPI phy to PMU node in Exynos3250
ARM: dts: exynos: drop unused samsung,camclk-out property in Midas
ARM: dts: s5pv210: correct MIPI CSIS clock name
ARM: dts: exynos: correct whitespace in Midas
ARM: dts: exynos: fix WM8960 clock name in Itop Elite
ARM: dts: exynos: add ports to TC358764 bridge on Arndale
ARM: dts: exynos: drop fake align STMPE properties in P4 Note
ARM: dts: exynos: align STMPE ADC node name with bindings in P4 Note
Link: https://lore.kernel.org/r/20230405080438.156805-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+225
-68
+21
-2
Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml
+21
-2
Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml
···
48
48
- const: syscon
49
49
- items:
50
50
- enum:
51
+
- samsung,exynos3250-pmu
52
+
- samsung,exynos4210-pmu
53
+
- samsung,exynos4412-pmu
51
54
- samsung,exynos5250-pmu
52
55
- samsung,exynos5420-pmu
53
56
- samsung,exynos5433-pmu
···
141
138
compatible:
142
139
contains:
143
140
enum:
141
+
- samsung,exynos3250-pmu
142
+
- samsung,exynos4210-pmu
143
+
- samsung,exynos4412-pmu
144
+
- samsung,exynos5250-pmu
145
+
- samsung,exynos5420-pmu
146
+
- samsung,exynos5433-pmu
147
+
then:
148
+
properties:
149
+
mipi-phy: true
150
+
else:
151
+
properties:
152
+
mipi-phy: false
153
+
154
+
- if:
155
+
properties:
156
+
compatible:
157
+
contains:
158
+
enum:
144
159
- samsung,exynos5250-pmu
145
160
- samsung,exynos5420-pmu
146
161
- samsung,exynos5433-pmu
147
162
then:
148
163
properties:
149
164
dp-phy: true
150
-
mipi-phy: true
151
165
else:
152
166
properties:
153
167
dp-phy: false
154
-
mipi-phy: false
155
168
156
169
examples:
157
170
- |
+4
arch/arm/boot/dts/exynos3250-artik5-eval.dts
+4
arch/arm/boot/dts/exynos3250-artik5-eval.dts
+6
arch/arm/boot/dts/exynos3250-artik5.dtsi
+6
arch/arm/boot/dts/exynos3250-artik5.dtsi
···
17
17
/ {
18
18
compatible = "samsung,artik5", "samsung,exynos3250", "samsung,exynos3";
19
19
20
+
aliases {
21
+
mmc0 = &mshc_0;
22
+
mmc1 = &mshc_1;
23
+
};
24
+
20
25
chosen {
21
26
stdout-path = &serial_2;
22
27
};
···
326
321
vmmc-supply = <&ldo12_reg>;
327
322
clock-frequency = <100000000>;
328
323
max-frequency = <100000000>;
324
+
mmc-ddr-1_8v;
329
325
samsung,dw-mshc-ciu-div = <1>;
330
326
samsung,dw-mshc-sdr-timing = <0 1>;
331
327
samsung,dw-mshc-ddr-timing = <1 2>;
+2
arch/arm/boot/dts/exynos3250-monk.dts
+2
arch/arm/boot/dts/exynos3250-monk.dts
···
22
22
23
23
aliases {
24
24
i2c7 = &i2c_max77836;
25
+
mmc0 = &mshc_0;
25
26
};
26
27
27
28
memory@40000000 {
···
444
443
vmmc-supply = <&vemmc_reg>;
445
444
clock-frequency = <100000000>;
446
445
max-frequency = <100000000>;
446
+
mmc-ddr-1_8v;
447
447
samsung,dw-mshc-ciu-div = <1>;
448
448
samsung,dw-mshc-sdr-timing = <0 1>;
449
449
samsung,dw-mshc-ddr-timing = <1 2>;
+3
arch/arm/boot/dts/exynos3250-rinato.dts
+3
arch/arm/boot/dts/exynos3250-rinato.dts
···
23
23
24
24
aliases {
25
25
i2c7 = &i2c_max77836;
26
+
mmc0 = &mshc_0;
27
+
mmc1 = &mshc_1;
26
28
};
27
29
28
30
chosen {
···
626
624
vmmc-supply = <&ldo12_reg>;
627
625
clock-frequency = <100000000>;
628
626
max-frequency = <100000000>;
627
+
mmc-ddr-1_8v;
629
628
samsung,dw-mshc-ciu-div = <1>;
630
629
samsung,dw-mshc-sdr-timing = <0 1>;
631
630
samsung,dw-mshc-ddr-timing = <1 2>;
+5
-9
arch/arm/boot/dts/exynos3250.dtsi
+5
-9
arch/arm/boot/dts/exynos3250.dtsi
···
28
28
aliases {
29
29
pinctrl0 = &pinctrl_0;
30
30
pinctrl1 = &pinctrl_1;
31
-
mshc0 = &mshc_0;
32
-
mshc1 = &mshc_1;
33
-
mshc2 = &mshc_2;
34
31
spi0 = &spi_0;
35
32
spi1 = &spi_1;
36
33
i2c0 = &i2c_0;
···
343
346
};
344
347
345
348
pmu_system_controller: system-controller@10020000 {
346
-
compatible = "samsung,exynos3250-pmu", "syscon";
349
+
compatible = "samsung,exynos3250-pmu", "simple-mfd", "syscon";
347
350
reg = <0x10020000 0x4000>;
348
351
interrupt-controller;
349
352
#interrupt-cells = <3>;
···
351
354
clock-names = "clkout8";
352
355
clocks = <&cmu CLK_FIN_PLL>;
353
356
#clock-cells = <1>;
354
-
};
355
357
356
-
mipi_phy: video-phy {
357
-
compatible = "samsung,s5pv210-mipi-video-phy";
358
-
#phy-cells = <1>;
359
-
syscon = <&pmu_system_controller>;
358
+
mipi_phy: mipi-phy {
359
+
compatible = "samsung,s5pv210-mipi-video-phy";
360
+
#phy-cells = <1>;
361
+
};
360
362
};
361
363
362
364
pd_cam: power-domain@10023c00 {
+6
-7
arch/arm/boot/dts/exynos4.dtsi
+6
-7
arch/arm/boot/dts/exynos4.dtsi
···
105
105
reg = <0x12570000 0x14>;
106
106
};
107
107
108
-
mipi_phy: video-phy {
109
-
compatible = "samsung,s5pv210-mipi-video-phy";
110
-
#phy-cells = <1>;
111
-
syscon = <&pmu_system_controller>;
112
-
};
113
-
114
108
pd_mfc: power-domain@10023c40 {
115
109
compatible = "samsung,exynos4210-pd";
116
110
reg = <0x10023c40 0x20>;
···
175
181
};
176
182
177
183
pmu_system_controller: system-controller@10020000 {
178
-
compatible = "samsung,exynos4210-pmu", "syscon";
184
+
compatible = "samsung,exynos4210-pmu", "simple-mfd", "syscon";
179
185
reg = <0x10020000 0x4000>;
180
186
interrupt-controller;
181
187
#interrupt-cells = <3>;
182
188
interrupt-parent = <&gic>;
189
+
190
+
mipi_phy: mipi-phy {
191
+
compatible = "samsung,s5pv210-mipi-video-phy";
192
+
#phy-cells = <1>;
193
+
};
183
194
};
184
195
185
196
dsi_0: dsi@11c80000 {
+6
arch/arm/boot/dts/exynos4210-i9100.dts
+6
arch/arm/boot/dts/exynos4210-i9100.dts
+5
arch/arm/boot/dts/exynos4210-origen.dts
+5
arch/arm/boot/dts/exynos4210-origen.dts
+4
arch/arm/boot/dts/exynos4210-smdkv310.dts
+4
arch/arm/boot/dts/exynos4210-smdkv310.dts
+6
arch/arm/boot/dts/exynos4210-trats.dts
+6
arch/arm/boot/dts/exynos4210-trats.dts
+7
-1
arch/arm/boot/dts/exynos4210-universal_c210.dts
+7
-1
arch/arm/boot/dts/exynos4210-universal_c210.dts
···
24
24
0x50000000 0x10000000>;
25
25
};
26
26
27
+
aliases {
28
+
mmc0 = &sdhci_0;
29
+
mmc1 = &sdhci_2;
30
+
mmc2 = &sdhci_3;
31
+
};
32
+
27
33
chosen {
28
34
bootargs = "root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1";
29
35
stdout-path = "serial2:115200n8";
···
522
516
};
523
517
524
518
&mct {
525
-
compatible = "none";
519
+
status = "disabled";
526
520
};
527
521
528
522
&mdma1 {
+5
-1
arch/arm/boot/dts/exynos4412-itop-elite.dts
+5
-1
arch/arm/boot/dts/exynos4412-itop-elite.dts
···
20
20
model = "TOPEET iTop 4412 Elite board based on Exynos4412";
21
21
compatible = "topeet,itop4412-elite", "samsung,exynos4412", "samsung,exynos4";
22
22
23
+
aliases {
24
+
mmc1 = &sdhci_2;
25
+
};
26
+
23
27
chosen {
24
28
bootargs = "root=/dev/mmcblk0p2 rw rootfstype=ext4 rootdelay=1 rootwait";
25
29
stdout-path = "serial2:115200n8";
···
186
182
compatible = "wlf,wm8960";
187
183
reg = <0x1a>;
188
184
clocks = <&pmu_system_controller 0>;
189
-
clock-names = "MCLK1";
185
+
clock-names = "mclk";
190
186
wlf,shared-lrclk;
191
187
#sound-dai-cells = <0>;
192
188
};
+5
arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi
+5
arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi
···
23
23
reg = <0x40000000 0x40000000>;
24
24
};
25
25
26
+
aliases {
27
+
mmc0 = &mshc_0;
28
+
};
29
+
26
30
firmware@203f000 {
27
31
compatible = "samsung,secure-firmware";
28
32
reg = <0x0203f000 0x1000>;
···
480
476
vmmc-supply = <&buck9_reg>;
481
477
broken-cd;
482
478
card-detect-delay = <200>;
479
+
mmc-ddr-1_8v;
483
480
samsung,dw-mshc-ciu-div = <3>;
484
481
samsung,dw-mshc-sdr-timing = <2 3>;
485
482
samsung,dw-mshc-ddr-timing = <1 2>;
+5
-3
arch/arm/boot/dts/exynos4412-midas.dtsi
+5
-3
arch/arm/boot/dts/exynos4412-midas.dtsi
···
25
25
aliases {
26
26
i2c11 = &i2c_max77693;
27
27
i2c12 = &i2c_max77693_fuel;
28
+
mmc0 = &mshc_0;
29
+
mmc2 = &sdhci_2;
30
+
mmc3 = &sdhci_3;
28
31
};
29
32
30
33
chosen {
···
500
497
pinctrl-0 = <&fimc_is_uart>;
501
498
pinctrl-names = "default";
502
499
status = "okay";
503
-
504
-
};
500
+
};
505
501
506
502
&fimc_lite_0 {
507
503
status = "okay";
···
594
592
/* CAM_B_CLKOUT */
595
593
clocks = <&camera 1>;
596
594
clock-names = "extclk";
597
-
samsung,camclk-out = <1>;
598
595
gpios = <&gpm1 6 GPIO_ACTIVE_LOW>;
599
596
600
597
port {
···
980
979
samsung,dw-mshc-ciu-div = <0>;
981
980
samsung,dw-mshc-sdr-timing = <2 3>;
982
981
samsung,dw-mshc-ddr-timing = <1 2>;
982
+
mmc-ddr-1_8v;
983
983
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
984
984
pinctrl-names = "default";
985
985
status = "okay";
+6
arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+6
arch/arm/boot/dts/exynos4412-odroid-common.dtsi
···
13
13
#include "exynos-mfc-reserved-memory.dtsi"
14
14
15
15
/ {
16
+
aliases {
17
+
mmc0 = &mshc_0;
18
+
mmc2 = &sdhci_2;
19
+
};
20
+
16
21
chosen {
17
22
stdout-path = &serial_1;
18
23
};
···
538
533
539
534
broken-cd;
540
535
card-detect-delay = <200>;
536
+
mmc-ddr-1_8v;
541
537
samsung,dw-mshc-ciu-div = <3>;
542
538
samsung,dw-mshc-sdr-timing = <2 3>;
543
539
samsung,dw-mshc-ddr-timing = <1 2>;
+6
arch/arm/boot/dts/exynos4412-origen.dts
+6
arch/arm/boot/dts/exynos4412-origen.dts
···
25
25
reg = <0x40000000 0x40000000>;
26
26
};
27
27
28
+
aliases {
29
+
mmc0 = &mshc_0;
30
+
mmc1 = &sdhci_2;
31
+
};
32
+
28
33
chosen {
29
34
stdout-path = "serial2:115200n8";
30
35
};
···
503
498
504
499
broken-cd;
505
500
card-detect-delay = <200>;
501
+
mmc-ddr-1_8v;
506
502
samsung,dw-mshc-ciu-div = <3>;
507
503
samsung,dw-mshc-sdr-timing = <2 3>;
508
504
samsung,dw-mshc-ddr-timing = <1 2>;
+8
-3
arch/arm/boot/dts/exynos4412-p4note.dtsi
+8
-3
arch/arm/boot/dts/exynos4412-p4note.dtsi
···
26
26
reg = <0x40000000 0x80000000>;
27
27
};
28
28
29
+
aliases {
30
+
mmc0 = &mshc_0;
31
+
mmc2 = &sdhci_2;
32
+
mmc3 = &sdhci_3;
33
+
};
34
+
29
35
chosen {
30
36
stdout-path = &serial_2;
31
37
};
···
194
188
pinctrl-names = "default";
195
189
interrupt-parent = <&gpx0>;
196
190
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
197
-
interrupt-controller;
198
-
irq-trigger = <0x1>;
199
191
st,adc-freq = <3>;
200
192
st,mod-12b = <1>;
201
193
st,ref-sel = <0>;
202
194
st,sample-time = <3>;
203
195
204
-
stmpe_adc {
196
+
adc {
205
197
compatible = "st,stmpe-adc";
206
198
#io-channel-cells = <1>;
207
199
st,norequest-mask = <0x2f>;
···
699
695
samsung,dw-mshc-ciu-div = <0>;
700
696
samsung,dw-mshc-sdr-timing = <2 3>;
701
697
samsung,dw-mshc-ddr-timing = <1 2>;
698
+
mmc-ddr-1_8v;
702
699
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
703
700
pinctrl-names = "default";
704
701
bus-width = <4>;
+4
arch/arm/boot/dts/exynos4412-smdk4412.dts
+4
arch/arm/boot/dts/exynos4412-smdk4412.dts
+4
arch/arm/boot/dts/exynos4412-tiny4412.dts
+4
arch/arm/boot/dts/exynos4412-tiny4412.dts
+1
-2
arch/arm/boot/dts/exynos4412.dtsi
+1
-2
arch/arm/boot/dts/exynos4412.dtsi
···
28
28
pinctrl3 = &pinctrl_3;
29
29
fimc-lite0 = &fimc_lite_0;
30
30
fimc-lite1 = &fimc_lite_1;
31
-
mshc0 = &mshc_0;
32
31
};
33
32
34
33
bus_acp: bus-acp {
···
797
798
};
798
799
799
800
&pmu_system_controller {
800
-
compatible = "samsung,exynos4412-pmu", "syscon";
801
+
compatible = "samsung,exynos4412-pmu", "simple-mfd", "syscon";
801
802
clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
802
803
"clkout4", "clkout8", "clkout9";
803
804
clocks = <&clock CLK_OUT_DMC>, <&clock CLK_OUT_TOP>,
+15
-6
arch/arm/boot/dts/exynos5250-arndale.dts
+15
-6
arch/arm/boot/dts/exynos5250-arndale.dts
···
23
23
reg = <0x40000000 0x80000000>;
24
24
};
25
25
26
+
aliases {
27
+
mmc0 = &mmc_0;
28
+
mmc1 = &mmc_2;
29
+
};
30
+
26
31
chosen {
27
32
stdout-path = "serial2:115200n8";
28
33
};
···
197
192
vddio-supply = <&vcc_1v8_reg>;
198
193
vddlvds-supply = <&vcc_3v3_reg>;
199
194
reset-gpios = <&gpd1 6 GPIO_ACTIVE_LOW>;
200
-
#address-cells = <1>;
201
-
#size-cells = <0>;
202
-
port@1 {
203
-
reg = <1>;
204
-
bridge_out_ep: endpoint {
205
-
remote-endpoint = <&panel_ep>;
195
+
196
+
ports {
197
+
#address-cells = <1>;
198
+
#size-cells = <0>;
199
+
port@1 {
200
+
reg = <1>;
201
+
bridge_out_ep: endpoint {
202
+
remote-endpoint = <&panel_ep>;
203
+
};
206
204
};
207
205
};
208
206
};
···
594
586
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
595
587
bus-width = <8>;
596
588
cap-mmc-highspeed;
589
+
mmc-ddr-1_8v;
597
590
};
598
591
599
592
&mmc_2 {
+3
arch/arm/boot/dts/exynos5250-smdk5250.dts
+3
arch/arm/boot/dts/exynos5250-smdk5250.dts
···
17
17
compatible = "samsung,smdk5250", "samsung,exynos5250", "samsung,exynos5";
18
18
19
19
aliases {
20
+
mmc0 = &mmc_0;
21
+
mmc1 = &mmc_2;
20
22
};
21
23
22
24
memory@40000000 {
···
352
350
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
353
351
bus-width = <8>;
354
352
cap-mmc-highspeed;
353
+
mmc-ddr-1_8v;
355
354
};
356
355
357
356
&mmc_2 {
+4
arch/arm/boot/dts/exynos5250-snow-common.dtsi
+4
arch/arm/boot/dts/exynos5250-snow-common.dtsi
···
15
15
/ {
16
16
aliases {
17
17
i2c104 = &i2c_104;
18
+
mmc0 = &mmc_0; /* eMMC */
19
+
mmc1 = &mmc_2; /* SD */
20
+
mmc2 = &mmc_3; /* WiFi */
18
21
};
19
22
20
23
memory@40000000 {
···
552
549
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4 &sd0_bus8>;
553
550
bus-width = <8>;
554
551
cap-mmc-highspeed;
552
+
mmc-ddr-1_8v;
555
553
};
556
554
557
555
/* uSD card */
+6
arch/arm/boot/dts/exynos5250-spring.dts
+6
arch/arm/boot/dts/exynos5250-spring.dts
···
23
23
reg = <0x40000000 0x80000000>;
24
24
};
25
25
26
+
aliases {
27
+
mmc0 = &mmc_0;
28
+
mmc1 = &mmc_1;
29
+
};
30
+
26
31
chosen {
27
32
bootargs = "console=tty1";
28
33
stdout-path = "serial3:115200n8";
···
436
431
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4 &sd0_bus8>;
437
432
bus-width = <8>;
438
433
cap-mmc-highspeed;
434
+
mmc-ddr-1_8v;
439
435
};
440
436
441
437
/*
+11
-17
arch/arm/boot/dts/exynos5250.dtsi
+11
-17
arch/arm/boot/dts/exynos5250.dtsi
···
30
30
gsc1 = &gsc_1;
31
31
gsc2 = &gsc_2;
32
32
gsc3 = &gsc_3;
33
-
mshc0 = &mmc_0;
34
-
mshc1 = &mmc_1;
35
-
mshc2 = &mmc_2;
36
-
mshc3 = &mmc_3;
37
33
i2c4 = &i2c_4;
38
34
i2c5 = &i2c_5;
39
35
i2c6 = &i2c_6;
···
286
290
};
287
291
288
292
pmu_system_controller: system-controller@10040000 {
289
-
compatible = "samsung,exynos5250-pmu", "syscon";
293
+
compatible = "samsung,exynos5250-pmu", "simple-mfd", "syscon";
290
294
reg = <0x10040000 0x5000>;
291
295
clock-names = "clkout16";
292
296
clocks = <&clock CLK_FIN_PLL>;
···
294
298
interrupt-controller;
295
299
#interrupt-cells = <3>;
296
300
interrupt-parent = <&gic>;
301
+
302
+
dp_phy: dp-phy {
303
+
compatible = "samsung,exynos5250-dp-video-phy";
304
+
#phy-cells = <0>;
305
+
};
306
+
307
+
mipi_phy: mipi-phy {
308
+
compatible = "samsung,s5pv210-mipi-video-phy";
309
+
#phy-cells = <1>;
310
+
};
297
311
};
298
312
299
313
watchdog@101d0000 {
···
814
808
clock-names = "mixer", "hdmi", "sclk_hdmi";
815
809
iommus = <&sysmmu_tv>;
816
810
status = "disabled";
817
-
};
818
-
819
-
dp_phy: video-phy-0 {
820
-
compatible = "samsung,exynos5250-dp-video-phy";
821
-
samsung,pmu-syscon = <&pmu_system_controller>;
822
-
#phy-cells = <0>;
823
-
};
824
-
825
-
mipi_phy: video-phy-1 {
826
-
compatible = "samsung,s5pv210-mipi-video-phy";
827
-
#phy-cells = <1>;
828
-
syscon = <&pmu_system_controller>;
829
811
};
830
812
831
813
dsi_0: dsi@14500000 {
+6
arch/arm/boot/dts/exynos5260-xyref5260.dts
+6
arch/arm/boot/dts/exynos5260-xyref5260.dts
···
18
18
reg = <0x20000000 0x80000000>;
19
19
};
20
20
21
+
aliases {
22
+
mmc0 = &mmc_0;
23
+
mmc1 = &mmc_2;
24
+
};
25
+
21
26
chosen {
22
27
stdout-path = "serial2:115200n8";
23
28
};
···
94
89
cap-mmc-highspeed;
95
90
mmc-hs200-1_8v;
96
91
card-detect-delay = <200>;
92
+
mmc-ddr-1_8v;
97
93
samsung,dw-mshc-ciu-div = <3>;
98
94
samsung,dw-mshc-sdr-timing = <0 4>;
99
95
samsung,dw-mshc-ddr-timing = <0 2>;
+3
arch/arm/boot/dts/exynos5410-odroidxu.dts
+3
arch/arm/boot/dts/exynos5410-odroidxu.dts
···
21
21
22
22
aliases {
23
23
ethernet = ðernet;
24
+
mmc0 = &mmc_0;
25
+
mmc1 = &mmc_2;
24
26
};
25
27
26
28
memory@40000000 {
···
515
513
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd>;
516
514
bus-width = <8>;
517
515
cap-mmc-highspeed;
516
+
mmc-ddr-1_8v;
518
517
mmc-hs200-1_8v;
519
518
vmmc-supply = <&ldo20_reg>;
520
519
vqmmc-supply = <&ldo11_reg>;
+6
arch/arm/boot/dts/exynos5410-smdk5410.dts
+6
arch/arm/boot/dts/exynos5410-smdk5410.dts
···
18
18
reg = <0x40000000 0x80000000>;
19
19
};
20
20
21
+
aliases {
22
+
mmc0 = &mmc_0;
23
+
mmc1 = &mmc_2;
24
+
};
25
+
21
26
chosen {
22
27
stdout-path = "serial2:115200n8";
23
28
};
···
66
61
cap-mmc-highspeed;
67
62
broken-cd;
68
63
card-detect-delay = <200>;
64
+
mmc-ddr-1_8v;
69
65
samsung,dw-mshc-ciu-div = <3>;
70
66
samsung,dw-mshc-sdr-timing = <2 3>;
71
67
samsung,dw-mshc-ddr-timing = <1 2>;
+6
arch/arm/boot/dts/exynos5420-arndale-octa.dts
+6
arch/arm/boot/dts/exynos5420-arndale-octa.dts
···
23
23
reg = <0x20000000 0x80000000>;
24
24
};
25
25
26
+
aliases {
27
+
mmc0 = &mmc_0;
28
+
mmc1 = &mmc_2;
29
+
};
30
+
26
31
chosen {
27
32
stdout-path = "serial3:115200n8";
28
33
};
···
783
778
status = "okay";
784
779
non-removable;
785
780
card-detect-delay = <200>;
781
+
mmc-ddr-1_8v;
786
782
samsung,dw-mshc-ciu-div = <3>;
787
783
samsung,dw-mshc-sdr-timing = <0 4>;
788
784
samsung,dw-mshc-ddr-timing = <0 2>;
+6
arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
+6
arch/arm/boot/dts/exynos5420-galaxy-tab-common.dtsi
···
28
28
* for more details.
29
29
*/
30
30
31
+
aliases {
32
+
mmc0 = &mmc_0;
33
+
mmc2 = &mmc_2;
34
+
};
35
+
31
36
chosen {
32
37
stdout-path = "serial2:115200n8";
33
38
};
···
609
604
bus-width = <8>;
610
605
cap-mmc-highspeed;
611
606
card-detect-delay = <200>;
607
+
mmc-ddr-1_8v;
612
608
mmc-hs200-1_8v;
613
609
non-removable;
614
610
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
+4
arch/arm/boot/dts/exynos5420-peach-pit.dts
+4
arch/arm/boot/dts/exynos5420-peach-pit.dts
···
31
31
aliases {
32
32
/* Assign 20 so we don't get confused w/ builtin ones */
33
33
i2c20 = &i2c_tunnel;
34
+
mmc0 = &mmc_0; /* eMMC */
35
+
mmc1 = &mmc_2; /* uSD */
36
+
mmc2 = &mmc_1; /* WiFi */
34
37
};
35
38
36
39
backlight: backlight {
···
725
722
/* eMMC flash */
726
723
&mmc_0 {
727
724
status = "okay";
725
+
mmc-ddr-1_8v;
728
726
mmc-hs200-1_8v;
729
727
cap-mmc-highspeed;
730
728
non-removable;
+6
arch/arm/boot/dts/exynos5420-smdk5420.dts
+6
arch/arm/boot/dts/exynos5420-smdk5420.dts
···
21
21
reg = <0x20000000 0x80000000>;
22
22
};
23
23
24
+
aliases {
25
+
mmc0 = &mmc_0;
26
+
mmc1 = &mmc_2;
27
+
};
28
+
24
29
chosen {
25
30
bootargs = "init=/linuxrc";
26
31
stdout-path = "serial2:115200n8";
···
360
355
status = "okay";
361
356
broken-cd;
362
357
card-detect-delay = <200>;
358
+
mmc-ddr-1_8v;
363
359
samsung,dw-mshc-ciu-div = <3>;
364
360
samsung,dw-mshc-sdr-timing = <0 4>;
365
361
samsung,dw-mshc-ddr-timing = <0 2>;
+11
-16
arch/arm/boot/dts/exynos5420.dtsi
+11
-16
arch/arm/boot/dts/exynos5420.dtsi
···
19
19
compatible = "samsung,exynos5420", "samsung,exynos5";
20
20
21
21
aliases {
22
-
mshc0 = &mmc_0;
23
-
mshc1 = &mmc_1;
24
-
mshc2 = &mmc_2;
25
22
pinctrl0 = &pinctrl_0;
26
23
pinctrl1 = &pinctrl_1;
27
24
pinctrl2 = &pinctrl_2;
···
693
696
status = "disabled";
694
697
};
695
698
696
-
dp_phy: dp-video-phy {
697
-
compatible = "samsung,exynos5420-dp-video-phy";
698
-
samsung,pmu-syscon = <&pmu_system_controller>;
699
-
#phy-cells = <0>;
700
-
};
701
-
702
-
mipi_phy: mipi-video-phy {
703
-
compatible = "samsung,exynos5420-mipi-video-phy";
704
-
syscon = <&pmu_system_controller>;
705
-
#phy-cells = <1>;
706
-
};
707
-
708
699
dsi: dsi@14500000 {
709
700
compatible = "samsung,exynos5410-mipi-dsi";
710
701
reg = <0x14500000 0x10000>;
···
918
933
};
919
934
920
935
pmu_system_controller: system-controller@10040000 {
921
-
compatible = "samsung,exynos5420-pmu", "syscon";
936
+
compatible = "samsung,exynos5420-pmu", "simple-mfd", "syscon";
922
937
reg = <0x10040000 0x5000>;
923
938
clock-names = "clkout16";
924
939
clocks = <&clock CLK_FIN_PLL>;
···
926
941
interrupt-controller;
927
942
#interrupt-cells = <3>;
928
943
interrupt-parent = <&gic>;
944
+
945
+
dp_phy: dp-phy {
946
+
compatible = "samsung,exynos5420-dp-video-phy";
947
+
#phy-cells = <0>;
948
+
};
949
+
950
+
mipi_phy: mipi-phy {
951
+
compatible = "samsung,exynos5420-mipi-video-phy";
952
+
#phy-cells = <1>;
953
+
};
929
954
};
930
955
931
956
tmu_cpu0: tmu@10060000 {
+4
arch/arm/boot/dts/exynos5422-odroid-core.dtsi
+4
arch/arm/boot/dts/exynos5422-odroid-core.dtsi
+5
arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
+5
arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
···
13
13
#include "exynos5422-odroid-core.dtsi"
14
14
15
15
/ {
16
+
aliases {
17
+
mmc0 = &mmc_0;
18
+
};
19
+
16
20
gpio-keys {
17
21
compatible = "gpio-keys";
18
22
pinctrl-names = "default";
···
476
472
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd &sd0_rclk>;
477
473
bus-width = <8>;
478
474
cap-mmc-highspeed;
475
+
mmc-ddr-1_8v;
479
476
mmc-hs200-1_8v;
480
477
mmc-hs400-1_8v;
481
478
max-frequency = <200000000>;
+5
arch/arm/boot/dts/exynos5422-samsung-k3g.dts
+5
arch/arm/boot/dts/exynos5422-samsung-k3g.dts
···
19
19
20
20
chassis-type = "handset";
21
21
22
+
aliases {
23
+
mmc0 = &mmc_0;
24
+
};
25
+
22
26
memory@20000000 {
23
27
device_type = "memory";
24
28
reg = <0x20000000 0x80000000>; /* 2 GiB */
···
601
597
/* eMMC flash */
602
598
&mmc_0 {
603
599
status = "okay";
600
+
mmc-ddr-1_8v;
604
601
mmc-hs200-1_8v;
605
602
cap-mmc-highspeed;
606
603
non-removable;
+4
arch/arm/boot/dts/exynos5800-peach-pi.dts
+4
arch/arm/boot/dts/exynos5800-peach-pi.dts
···
29
29
aliases {
30
30
/* Assign 20 so we don't get confused w/ builtin ones */
31
31
i2c20 = &i2c_tunnel;
32
+
mmc0 = &mmc_0; /* eMMC */
33
+
mmc1 = &mmc_2; /* SD */
34
+
mmc2 = &mmc_1; /* WiFi */
32
35
};
33
36
34
37
backlight: backlight {
···
706
703
/* eMMC flash */
707
704
&mmc_0 {
708
705
status = "okay";
706
+
mmc-ddr-1_8v;
709
707
mmc-hs200-1_8v;
710
708
mmc-hs400-1_8v;
711
709
cap-mmc-highspeed;