Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
ASoC: codecs: tx-macro: correct TX SMIC MUXn widgets on SM8350+
Starting with Qualcomm SM8350 SoC, so Low Power Audio SubSystem (LPASS)
block version v9.2, the register responsible for TX SMIC MUXn muxes is
different. In earlier LPASS versions this mux had bit fields for
analogue (ADCn) and digital (SWR_DMICn) MICs. Choice of ADCn was
selecting the analogue path in CDC_TX_TOP_CSR_SWR_DMICn_CTL register.
With LPASS v9.2 and newer, the bit fields are integrated into just
SWR_MICn and there is no distinction for analogue or digital MIC in the
register.
Fix support for LPASS v9.2+:
1. Add new set of widgets and audio routes for LPASS v9.2.
2. Do not choose analogue or digital in CDC_TX_TOP_CSR_SWR_DMICn_CTL
based on value of the mux.
3. Replace all the input widgets (TX SWR_ADCn, TX SWR_DMICn) with TX
SWR_INPUTn ones.
The change is not backwards compatible with older DTBs and existing
mixer settings, therefore it does not change handling of older platforms
with working micrphones (SC8280xp) but only the ones with issues
(SM8450, SM8550) which need the fix.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://msgid.link/r/20240226115925.53953-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
authored by
Krzysztof Kozlowski
and committed by
Mark Brown
d34f0c8e
051e8872
+292
-31
+1
sound/soc/codecs/lpass-macro-common.h
+1
sound/soc/codecs/lpass-macro-common.h
+291
-31
sound/soc/codecs/lpass-tx-macro.c
+291
-31
sound/soc/codecs/lpass-tx-macro.c
···
648
648
return 0;
649
649
}
650
650
651
-
static bool is_amic_enabled(struct snd_soc_component *component, u8 decimator)
651
+
static bool is_amic_enabled(struct snd_soc_component *component,
652
+
struct tx_macro *tx, u8 decimator)
652
653
{
653
654
u16 adc_mux_reg, adc_reg, adc_n;
654
655
655
656
adc_mux_reg = CDC_TX_INP_MUX_ADC_MUXn_CFG1(decimator);
656
657
657
658
if (snd_soc_component_read(component, adc_mux_reg) & SWR_MIC) {
659
+
if (tx->data->ver > LPASS_VER_9_0_0)
660
+
return true;
661
+
662
+
/* else: LPASS <= v9.0.0 */
658
663
adc_reg = CDC_TX_INP_MUX_ADC_MUXn_CFG0(decimator);
659
664
adc_n = snd_soc_component_read_field(component, adc_reg,
660
665
CDC_TX_MACRO_SWR_MIC_MUX_SEL_MASK);
···
688
683
dec_cfg_reg = CDC_TXn_TX_PATH_CFG0(hpf_work->decimator);
689
684
hpf_gate_reg = CDC_TXn_TX_PATH_SEC2(hpf_work->decimator);
690
685
691
-
if (is_amic_enabled(component, hpf_work->decimator)) {
686
+
if (is_amic_enabled(component, tx, hpf_work->decimator)) {
692
687
snd_soc_component_write_field(component,
693
688
dec_cfg_reg,
694
689
CDC_TXn_HPF_CUT_FREQ_MASK,
···
752
747
return 0;
753
748
}
754
749
750
+
static void tx_macro_update_smic_sel_v9(struct snd_soc_component *component,
751
+
struct snd_soc_dapm_widget *widget,
752
+
struct tx_macro *tx, u16 mic_sel_reg,
753
+
unsigned int val)
754
+
{
755
+
unsigned int dmic;
756
+
u16 dmic_clk_reg;
757
+
758
+
if (val < 5) {
759
+
snd_soc_component_write_field(component, mic_sel_reg,
760
+
CDC_TXn_ADC_DMIC_SEL_MASK, 0);
761
+
} else {
762
+
snd_soc_component_write_field(component, mic_sel_reg,
763
+
CDC_TXn_ADC_DMIC_SEL_MASK, 1);
764
+
dmic = TX_ADC_TO_DMIC(val);
765
+
dmic_clk_reg = CDC_TX_TOP_CSR_SWR_DMICn_CTL(dmic);
766
+
snd_soc_component_write_field(component, dmic_clk_reg,
767
+
CDC_TX_SWR_DMIC_CLK_SEL_MASK,
768
+
CDC_TX_SWR_MIC_CLK_DEFAULT);
769
+
}
770
+
}
771
+
772
+
static void tx_macro_update_smic_sel_v9_2(struct snd_soc_component *component,
773
+
struct snd_soc_dapm_widget *widget,
774
+
struct tx_macro *tx, u16 mic_sel_reg,
775
+
unsigned int val)
776
+
{
777
+
unsigned int dmic;
778
+
u16 dmic_clk_reg;
779
+
780
+
if (widget->shift) {
781
+
/* MSM DMIC */
782
+
snd_soc_component_write_field(component, mic_sel_reg,
783
+
CDC_TXn_ADC_DMIC_SEL_MASK, 1);
784
+
785
+
dmic = TX_ADC_TO_DMIC(val);
786
+
dmic_clk_reg = CDC_TX_TOP_CSR_SWR_DMICn_CTL(dmic);
787
+
snd_soc_component_write_field(component, dmic_clk_reg,
788
+
CDC_TX_SWR_DMIC_CLK_SEL_MASK,
789
+
CDC_TX_SWR_MIC_CLK_DEFAULT);
790
+
} else {
791
+
snd_soc_component_write_field(component, mic_sel_reg,
792
+
CDC_TXn_ADC_DMIC_SEL_MASK, 0);
793
+
}
794
+
}
795
+
755
796
static int tx_macro_put_dec_enum(struct snd_kcontrol *kcontrol,
756
797
struct snd_ctl_elem_value *ucontrol)
757
798
{
758
799
struct snd_soc_dapm_widget *widget = snd_soc_dapm_kcontrol_widget(kcontrol);
759
800
struct snd_soc_component *component = snd_soc_dapm_to_component(widget->dapm);
760
801
struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
761
-
unsigned int val, dmic;
802
+
struct tx_macro *tx = snd_soc_component_get_drvdata(component);
803
+
unsigned int val;
762
804
u16 mic_sel_reg;
763
-
u16 dmic_clk_reg;
764
805
765
806
val = ucontrol->value.enumerated.item[0];
766
807
if (val >= e->items)
···
843
792
}
844
793
845
794
if (val != 0) {
846
-
if (widget->shift) { /* MSM DMIC */
795
+
if (widget->shift) /* MSM DMIC */
847
796
snd_soc_component_write_field(component, mic_sel_reg,
848
797
CDC_TXn_ADC_DMIC_SEL_MASK, 1);
849
-
} else if (val < 5) {
850
-
snd_soc_component_write_field(component, mic_sel_reg,
851
-
CDC_TXn_ADC_DMIC_SEL_MASK, 0);
852
-
} else {
853
-
snd_soc_component_write_field(component, mic_sel_reg,
854
-
CDC_TXn_ADC_DMIC_SEL_MASK, 1);
855
-
dmic = TX_ADC_TO_DMIC(val);
856
-
dmic_clk_reg = CDC_TX_TOP_CSR_SWR_DMICn_CTL(dmic);
857
-
snd_soc_component_write_field(component, dmic_clk_reg,
858
-
CDC_TX_SWR_DMIC_CLK_SEL_MASK,
859
-
CDC_TX_SWR_MIC_CLK_DEFAULT);
860
-
}
798
+
else if (tx->data->ver <= LPASS_VER_9_0_0)
799
+
tx_macro_update_smic_sel_v9(component, widget, tx,
800
+
mic_sel_reg, val);
801
+
else
802
+
tx_macro_update_smic_sel_v9_2(component, widget, tx,
803
+
mic_sel_reg, val);
861
804
}
862
805
863
806
return snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
···
952
907
case SND_SOC_DAPM_POST_PMU:
953
908
snd_soc_component_write_field(component, tx_vol_ctl_reg,
954
909
CDC_TXn_CLK_EN_MASK, 0x1);
955
-
if (!is_amic_enabled(component, decimator)) {
910
+
if (!is_amic_enabled(component, tx, decimator)) {
956
911
snd_soc_component_update_bits(component, hpf_gate_reg, 0x01, 0x00);
957
912
/* Minimum 1 clk cycle delay is required as per HW spec */
958
913
usleep_range(1000, 1010);
···
968
923
CDC_TXn_HPF_CUT_FREQ_MASK,
969
924
CF_MIN_3DB_150HZ);
970
925
971
-
if (is_amic_enabled(component, decimator)) {
926
+
if (is_amic_enabled(component, tx, decimator)) {
972
927
hpf_delay = TX_MACRO_AMIC_HPF_DELAY_MS;
973
928
unmute_delay = TX_MACRO_AMIC_UNMUTE_DELAY_MS;
974
929
}
···
984
939
CDC_TXn_HPF_F_CHANGE_MASK |
985
940
CDC_TXn_HPF_ZERO_GATE_MASK,
986
941
0x02);
987
-
if (!is_amic_enabled(component, decimator))
942
+
if (!is_amic_enabled(component, tx, decimator))
988
943
snd_soc_component_update_bits(component, hpf_gate_reg,
989
944
CDC_TXn_HPF_F_CHANGE_MASK |
990
945
CDC_TXn_HPF_ZERO_GATE_MASK,
···
1021
976
component, dec_cfg_reg,
1022
977
CDC_TXn_HPF_CUT_FREQ_MASK,
1023
978
hpf_cut_off_freq);
1024
-
if (is_amic_enabled(component, decimator))
979
+
if (is_amic_enabled(component, tx, decimator))
1025
980
snd_soc_component_update_bits(component,
1026
981
hpf_gate_reg,
1027
982
CDC_TXn_HPF_F_CHANGE_MASK |
···
1832
1787
{"TX SMIC MUX7", "SWR_DMIC7", "TX SWR_DMIC7"},
1833
1788
};
1834
1789
1790
+
/* Controls and routes specific to LPASS >= v9.2.0 */
1791
+
static const char * const smic_mux_text_v9_2[] = {
1792
+
"ZERO", "SWR_MIC0", "SWR_MIC1", "SWR_MIC2", "SWR_MIC3",
1793
+
"SWR_MIC4", "SWR_MIC5", "SWR_MIC6", "SWR_MIC7",
1794
+
"SWR_MIC8", "SWR_MIC9", "SWR_MIC10", "SWR_MIC11"
1795
+
};
1796
+
1797
+
static SOC_ENUM_SINGLE_DECL(tx_smic0_enum_v9_2, CDC_TX_INP_MUX_ADC_MUX0_CFG0,
1798
+
0, smic_mux_text_v9_2);
1799
+
1800
+
static SOC_ENUM_SINGLE_DECL(tx_smic1_enum_v9_2, CDC_TX_INP_MUX_ADC_MUX1_CFG0,
1801
+
0, smic_mux_text_v9_2);
1802
+
1803
+
static SOC_ENUM_SINGLE_DECL(tx_smic2_enum_v9_2, CDC_TX_INP_MUX_ADC_MUX2_CFG0,
1804
+
0, smic_mux_text_v9_2);
1805
+
1806
+
static SOC_ENUM_SINGLE_DECL(tx_smic3_enum_v9_2, CDC_TX_INP_MUX_ADC_MUX3_CFG0,
1807
+
0, smic_mux_text_v9_2);
1808
+
1809
+
static SOC_ENUM_SINGLE_DECL(tx_smic4_enum_v9_2, CDC_TX_INP_MUX_ADC_MUX4_CFG0,
1810
+
0, smic_mux_text_v9_2);
1811
+
1812
+
static SOC_ENUM_SINGLE_DECL(tx_smic5_enum_v9_2, CDC_TX_INP_MUX_ADC_MUX5_CFG0,
1813
+
0, smic_mux_text_v9_2);
1814
+
1815
+
static SOC_ENUM_SINGLE_DECL(tx_smic6_enum_v9_2, CDC_TX_INP_MUX_ADC_MUX6_CFG0,
1816
+
0, smic_mux_text_v9_2);
1817
+
1818
+
static SOC_ENUM_SINGLE_DECL(tx_smic7_enum_v9_2, CDC_TX_INP_MUX_ADC_MUX7_CFG0,
1819
+
0, smic_mux_text_v9_2);
1820
+
1821
+
static const struct snd_kcontrol_new tx_smic0_mux_v9_2 = SOC_DAPM_ENUM_EXT("tx_smic0", tx_smic0_enum_v9_2,
1822
+
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1823
+
static const struct snd_kcontrol_new tx_smic1_mux_v9_2 = SOC_DAPM_ENUM_EXT("tx_smic1", tx_smic1_enum_v9_2,
1824
+
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1825
+
static const struct snd_kcontrol_new tx_smic2_mux_v9_2 = SOC_DAPM_ENUM_EXT("tx_smic2", tx_smic2_enum_v9_2,
1826
+
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1827
+
static const struct snd_kcontrol_new tx_smic3_mux_v9_2 = SOC_DAPM_ENUM_EXT("tx_smic3", tx_smic3_enum_v9_2,
1828
+
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1829
+
static const struct snd_kcontrol_new tx_smic4_mux_v9_2 = SOC_DAPM_ENUM_EXT("tx_smic4", tx_smic4_enum_v9_2,
1830
+
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1831
+
static const struct snd_kcontrol_new tx_smic5_mux_v9_2 = SOC_DAPM_ENUM_EXT("tx_smic5", tx_smic5_enum_v9_2,
1832
+
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1833
+
static const struct snd_kcontrol_new tx_smic6_mux_v9_2 = SOC_DAPM_ENUM_EXT("tx_smic6", tx_smic6_enum_v9_2,
1834
+
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1835
+
static const struct snd_kcontrol_new tx_smic7_mux_v9_2 = SOC_DAPM_ENUM_EXT("tx_smic7", tx_smic7_enum_v9_2,
1836
+
snd_soc_dapm_get_enum_double, tx_macro_put_dec_enum);
1837
+
1838
+
static const struct snd_soc_dapm_widget tx_macro_dapm_widgets_v9_2[] = {
1839
+
SND_SOC_DAPM_MUX("TX SMIC MUX0", SND_SOC_NOPM, 0, 0, &tx_smic0_mux_v9_2),
1840
+
SND_SOC_DAPM_MUX("TX SMIC MUX1", SND_SOC_NOPM, 0, 0, &tx_smic1_mux_v9_2),
1841
+
SND_SOC_DAPM_MUX("TX SMIC MUX2", SND_SOC_NOPM, 0, 0, &tx_smic2_mux_v9_2),
1842
+
SND_SOC_DAPM_MUX("TX SMIC MUX3", SND_SOC_NOPM, 0, 0, &tx_smic3_mux_v9_2),
1843
+
SND_SOC_DAPM_MUX("TX SMIC MUX4", SND_SOC_NOPM, 0, 0, &tx_smic4_mux_v9_2),
1844
+
SND_SOC_DAPM_MUX("TX SMIC MUX5", SND_SOC_NOPM, 0, 0, &tx_smic5_mux_v9_2),
1845
+
SND_SOC_DAPM_MUX("TX SMIC MUX6", SND_SOC_NOPM, 0, 0, &tx_smic6_mux_v9_2),
1846
+
SND_SOC_DAPM_MUX("TX SMIC MUX7", SND_SOC_NOPM, 0, 0, &tx_smic7_mux_v9_2),
1847
+
1848
+
SND_SOC_DAPM_INPUT("TX SWR_INPUT0"),
1849
+
SND_SOC_DAPM_INPUT("TX SWR_INPUT1"),
1850
+
SND_SOC_DAPM_INPUT("TX SWR_INPUT2"),
1851
+
SND_SOC_DAPM_INPUT("TX SWR_INPUT3"),
1852
+
SND_SOC_DAPM_INPUT("TX SWR_INPUT4"),
1853
+
SND_SOC_DAPM_INPUT("TX SWR_INPUT5"),
1854
+
SND_SOC_DAPM_INPUT("TX SWR_INPUT6"),
1855
+
SND_SOC_DAPM_INPUT("TX SWR_INPUT7"),
1856
+
SND_SOC_DAPM_INPUT("TX SWR_INPUT8"),
1857
+
SND_SOC_DAPM_INPUT("TX SWR_INPUT9"),
1858
+
SND_SOC_DAPM_INPUT("TX SWR_INPUT10"),
1859
+
SND_SOC_DAPM_INPUT("TX SWR_INPUT11"),
1860
+
};
1861
+
1862
+
static const struct snd_soc_dapm_route tx_audio_map_v9_2[] = {
1863
+
{"TX DEC0 MUX", "SWR_MIC", "TX SMIC MUX0"},
1864
+
{"TX SMIC MUX0", NULL, "TX_SWR_CLK"},
1865
+
{"TX SMIC MUX0", "SWR_MIC0", "TX SWR_INPUT0"},
1866
+
{"TX SMIC MUX0", "SWR_MIC1", "TX SWR_INPUT1"},
1867
+
{"TX SMIC MUX0", "SWR_MIC2", "TX SWR_INPUT2"},
1868
+
{"TX SMIC MUX0", "SWR_MIC3", "TX SWR_INPUT3"},
1869
+
{"TX SMIC MUX0", "SWR_MIC4", "TX SWR_INPUT4"},
1870
+
{"TX SMIC MUX0", "SWR_MIC5", "TX SWR_INPUT5"},
1871
+
{"TX SMIC MUX0", "SWR_MIC6", "TX SWR_INPUT6"},
1872
+
{"TX SMIC MUX0", "SWR_MIC7", "TX SWR_INPUT7"},
1873
+
{"TX SMIC MUX0", "SWR_MIC8", "TX SWR_INPUT8"},
1874
+
{"TX SMIC MUX0", "SWR_MIC9", "TX SWR_INPUT9"},
1875
+
{"TX SMIC MUX0", "SWR_MIC10", "TX SWR_INPUT11"},
1876
+
{"TX SMIC MUX0", "SWR_MIC11", "TX SWR_INPUT10"},
1877
+
1878
+
{"TX DEC1 MUX", "SWR_MIC", "TX SMIC MUX1"},
1879
+
{"TX SMIC MUX1", NULL, "TX_SWR_CLK"},
1880
+
{"TX SMIC MUX1", "SWR_MIC0", "TX SWR_INPUT0"},
1881
+
{"TX SMIC MUX1", "SWR_MIC1", "TX SWR_INPUT1"},
1882
+
{"TX SMIC MUX1", "SWR_MIC2", "TX SWR_INPUT2"},
1883
+
{"TX SMIC MUX1", "SWR_MIC3", "TX SWR_INPUT3"},
1884
+
{"TX SMIC MUX1", "SWR_MIC4", "TX SWR_INPUT4"},
1885
+
{"TX SMIC MUX1", "SWR_MIC5", "TX SWR_INPUT5"},
1886
+
{"TX SMIC MUX1", "SWR_MIC6", "TX SWR_INPUT6"},
1887
+
{"TX SMIC MUX1", "SWR_MIC7", "TX SWR_INPUT7"},
1888
+
{"TX SMIC MUX1", "SWR_MIC8", "TX SWR_INPUT8"},
1889
+
{"TX SMIC MUX1", "SWR_MIC9", "TX SWR_INPUT9"},
1890
+
{"TX SMIC MUX1", "SWR_MIC10", "TX SWR_INPUT10"},
1891
+
{"TX SMIC MUX1", "SWR_MIC11", "TX SWR_INPUT11"},
1892
+
1893
+
{"TX DEC2 MUX", "SWR_MIC", "TX SMIC MUX2"},
1894
+
{"TX SMIC MUX2", NULL, "TX_SWR_CLK"},
1895
+
{"TX SMIC MUX2", "SWR_MIC0", "TX SWR_INPUT0"},
1896
+
{"TX SMIC MUX2", "SWR_MIC1", "TX SWR_INPUT1"},
1897
+
{"TX SMIC MUX2", "SWR_MIC2", "TX SWR_INPUT2"},
1898
+
{"TX SMIC MUX2", "SWR_MIC3", "TX SWR_INPUT3"},
1899
+
{"TX SMIC MUX2", "SWR_MIC4", "TX SWR_INPUT4"},
1900
+
{"TX SMIC MUX2", "SWR_MIC5", "TX SWR_INPUT5"},
1901
+
{"TX SMIC MUX2", "SWR_MIC6", "TX SWR_INPUT6"},
1902
+
{"TX SMIC MUX2", "SWR_MIC7", "TX SWR_INPUT7"},
1903
+
{"TX SMIC MUX2", "SWR_MIC8", "TX SWR_INPUT8"},
1904
+
{"TX SMIC MUX2", "SWR_MIC9", "TX SWR_INPUT9"},
1905
+
{"TX SMIC MUX2", "SWR_MIC10", "TX SWR_INPUT10"},
1906
+
{"TX SMIC MUX2", "SWR_MIC11", "TX SWR_INPUT11"},
1907
+
1908
+
{"TX DEC3 MUX", "SWR_MIC", "TX SMIC MUX3"},
1909
+
{"TX SMIC MUX3", NULL, "TX_SWR_CLK"},
1910
+
{"TX SMIC MUX3", "SWR_MIC0", "TX SWR_INPUT0"},
1911
+
{"TX SMIC MUX3", "SWR_MIC1", "TX SWR_INPUT1"},
1912
+
{"TX SMIC MUX3", "SWR_MIC2", "TX SWR_INPUT2"},
1913
+
{"TX SMIC MUX3", "SWR_MIC3", "TX SWR_INPUT3"},
1914
+
{"TX SMIC MUX3", "SWR_MIC4", "TX SWR_INPUT4"},
1915
+
{"TX SMIC MUX3", "SWR_MIC5", "TX SWR_INPUT5"},
1916
+
{"TX SMIC MUX3", "SWR_MIC6", "TX SWR_INPUT6"},
1917
+
{"TX SMIC MUX3", "SWR_MIC7", "TX SWR_INPUT7"},
1918
+
{"TX SMIC MUX3", "SWR_MIC8", "TX SWR_INPUT8"},
1919
+
{"TX SMIC MUX3", "SWR_MIC9", "TX SWR_INPUT9"},
1920
+
{"TX SMIC MUX3", "SWR_MIC10", "TX SWR_INPUT10"},
1921
+
{"TX SMIC MUX3", "SWR_MIC11", "TX SWR_INPUT11"},
1922
+
1923
+
{"TX DEC4 MUX", "SWR_MIC", "TX SMIC MUX4"},
1924
+
{"TX SMIC MUX4", NULL, "TX_SWR_CLK"},
1925
+
{"TX SMIC MUX4", "SWR_MIC0", "TX SWR_INPUT0"},
1926
+
{"TX SMIC MUX4", "SWR_MIC1", "TX SWR_INPUT1"},
1927
+
{"TX SMIC MUX4", "SWR_MIC2", "TX SWR_INPUT2"},
1928
+
{"TX SMIC MUX4", "SWR_MIC3", "TX SWR_INPUT3"},
1929
+
{"TX SMIC MUX4", "SWR_MIC4", "TX SWR_INPUT4"},
1930
+
{"TX SMIC MUX4", "SWR_MIC5", "TX SWR_INPUT5"},
1931
+
{"TX SMIC MUX4", "SWR_MIC6", "TX SWR_INPUT6"},
1932
+
{"TX SMIC MUX4", "SWR_MIC7", "TX SWR_INPUT7"},
1933
+
{"TX SMIC MUX4", "SWR_MIC8", "TX SWR_INPUT8"},
1934
+
{"TX SMIC MUX4", "SWR_MIC9", "TX SWR_INPUT9"},
1935
+
{"TX SMIC MUX4", "SWR_MIC10", "TX SWR_INPUT10"},
1936
+
{"TX SMIC MUX4", "SWR_MIC11", "TX SWR_INPUT11"},
1937
+
1938
+
{"TX DEC5 MUX", "SWR_MIC", "TX SMIC MUX5"},
1939
+
{"TX SMIC MUX5", NULL, "TX_SWR_CLK"},
1940
+
{"TX SMIC MUX5", "SWR_MIC0", "TX SWR_INPUT0"},
1941
+
{"TX SMIC MUX5", "SWR_MIC1", "TX SWR_INPUT1"},
1942
+
{"TX SMIC MUX5", "SWR_MIC2", "TX SWR_INPUT2"},
1943
+
{"TX SMIC MUX5", "SWR_MIC3", "TX SWR_INPUT3"},
1944
+
{"TX SMIC MUX5", "SWR_MIC4", "TX SWR_INPUT4"},
1945
+
{"TX SMIC MUX5", "SWR_MIC5", "TX SWR_INPUT5"},
1946
+
{"TX SMIC MUX5", "SWR_MIC6", "TX SWR_INPUT6"},
1947
+
{"TX SMIC MUX5", "SWR_MIC7", "TX SWR_INPUT7"},
1948
+
{"TX SMIC MUX5", "SWR_MIC8", "TX SWR_INPUT8"},
1949
+
{"TX SMIC MUX5", "SWR_MIC9", "TX SWR_INPUT9"},
1950
+
{"TX SMIC MUX5", "SWR_MIC10", "TX SWR_INPUT10"},
1951
+
{"TX SMIC MUX5", "SWR_MIC11", "TX SWR_INPUT11"},
1952
+
1953
+
{"TX DEC6 MUX", "SWR_MIC", "TX SMIC MUX6"},
1954
+
{"TX SMIC MUX6", NULL, "TX_SWR_CLK"},
1955
+
{"TX SMIC MUX6", "SWR_MIC0", "TX SWR_INPUT0"},
1956
+
{"TX SMIC MUX6", "SWR_MIC1", "TX SWR_INPUT1"},
1957
+
{"TX SMIC MUX6", "SWR_MIC2", "TX SWR_INPUT2"},
1958
+
{"TX SMIC MUX6", "SWR_MIC3", "TX SWR_INPUT3"},
1959
+
{"TX SMIC MUX6", "SWR_MIC4", "TX SWR_INPUT4"},
1960
+
{"TX SMIC MUX6", "SWR_MIC5", "TX SWR_INPUT5"},
1961
+
{"TX SMIC MUX6", "SWR_MIC6", "TX SWR_INPUT6"},
1962
+
{"TX SMIC MUX6", "SWR_MIC7", "TX SWR_INPUT7"},
1963
+
{"TX SMIC MUX6", "SWR_MIC8", "TX SWR_INPUT8"},
1964
+
{"TX SMIC MUX6", "SWR_MIC9", "TX SWR_INPUT9"},
1965
+
{"TX SMIC MUX6", "SWR_MIC10", "TX SWR_INPUT10"},
1966
+
{"TX SMIC MUX6", "SWR_MIC11", "TX SWR_INPUT11"},
1967
+
1968
+
{"TX DEC7 MUX", "SWR_MIC", "TX SMIC MUX7"},
1969
+
{"TX SMIC MUX7", NULL, "TX_SWR_CLK"},
1970
+
{"TX SMIC MUX7", "SWR_MIC0", "TX SWR_INPUT0"},
1971
+
{"TX SMIC MUX7", "SWR_MIC1", "TX SWR_INPUT1"},
1972
+
{"TX SMIC MUX7", "SWR_MIC2", "TX SWR_INPUT2"},
1973
+
{"TX SMIC MUX7", "SWR_MIC3", "TX SWR_INPUT3"},
1974
+
{"TX SMIC MUX7", "SWR_MIC4", "TX SWR_INPUT4"},
1975
+
{"TX SMIC MUX7", "SWR_MIC5", "TX SWR_INPUT5"},
1976
+
{"TX SMIC MUX7", "SWR_MIC6", "TX SWR_INPUT6"},
1977
+
{"TX SMIC MUX7", "SWR_MIC7", "TX SWR_INPUT7"},
1978
+
{"TX SMIC MUX7", "SWR_MIC8", "TX SWR_INPUT8"},
1979
+
{"TX SMIC MUX7", "SWR_MIC9", "TX SWR_INPUT9"},
1980
+
{"TX SMIC MUX7", "SWR_MIC10", "TX SWR_INPUT10"},
1981
+
{"TX SMIC MUX7", "SWR_MIC11", "TX SWR_INPUT11"},
1982
+
};
1983
+
1835
1984
static const struct snd_kcontrol_new tx_macro_snd_controls[] = {
1836
1985
SOC_SINGLE_S8_TLV("TX_DEC0 Volume",
1837
1986
CDC_TX0_TX_VOL_CTL,
···
2463
2224
.extra_routes_num = ARRAY_SIZE(tx_audio_map_v9),
2464
2225
};
2465
2226
2227
+
static const struct tx_macro_data lpass_ver_9_2 = {
2228
+
.flags = LPASS_MACRO_FLAG_HAS_NPL_CLOCK |
2229
+
LPASS_MACRO_FLAG_RESET_SWR,
2230
+
.ver = LPASS_VER_9_2_0,
2231
+
.extra_widgets = tx_macro_dapm_widgets_v9_2,
2232
+
.extra_widgets_num = ARRAY_SIZE(tx_macro_dapm_widgets_v9_2),
2233
+
.extra_routes = tx_audio_map_v9_2,
2234
+
.extra_routes_num = ARRAY_SIZE(tx_audio_map_v9_2),
2235
+
};
2236
+
2466
2237
static const struct tx_macro_data lpass_ver_10_sm6115 = {
2467
2238
.flags = LPASS_MACRO_FLAG_HAS_NPL_CLOCK,
2468
2239
.ver = LPASS_VER_10_0_0,
2469
-
.extra_widgets = tx_macro_dapm_widgets_v9,
2470
-
.extra_widgets_num = ARRAY_SIZE(tx_macro_dapm_widgets_v9),
2471
-
.extra_routes = tx_audio_map_v9,
2472
-
.extra_routes_num = ARRAY_SIZE(tx_audio_map_v9),
2240
+
.extra_widgets = tx_macro_dapm_widgets_v9_2,
2241
+
.extra_widgets_num = ARRAY_SIZE(tx_macro_dapm_widgets_v9_2),
2242
+
.extra_routes = tx_audio_map_v9_2,
2243
+
.extra_routes_num = ARRAY_SIZE(tx_audio_map_v9_2),
2473
2244
};
2474
-
2475
2245
2476
2246
static const struct tx_macro_data lpass_ver_11 = {
2477
2247
.flags = LPASS_MACRO_FLAG_RESET_SWR,
2478
2248
.ver = LPASS_VER_11_0_0,
2479
-
.extra_widgets = tx_macro_dapm_widgets_v9,
2480
-
.extra_widgets_num = ARRAY_SIZE(tx_macro_dapm_widgets_v9),
2481
-
.extra_routes = tx_audio_map_v9,
2482
-
.extra_routes_num = ARRAY_SIZE(tx_audio_map_v9),
2249
+
.extra_widgets = tx_macro_dapm_widgets_v9_2,
2250
+
.extra_widgets_num = ARRAY_SIZE(tx_macro_dapm_widgets_v9_2),
2251
+
.extra_routes = tx_audio_map_v9_2,
2252
+
.extra_routes_num = ARRAY_SIZE(tx_audio_map_v9_2),
2483
2253
};
2484
2254
2485
2255
static const struct of_device_id tx_macro_dt_match[] = {
2486
2256
{
2257
+
/*
2258
+
* The block is actually LPASS v9.4, but keep LPASS v9 match
2259
+
* data and audio widgets, due to compatibility reasons.
2260
+
* Microphones are working on SC7280 fine, so apparently the fix
2261
+
* is not necessary.
2262
+
*/
2487
2263
.compatible = "qcom,sc7280-lpass-tx-macro",
2488
2264
.data = &lpass_ver_9,
2489
2265
}, {
···
2509
2255
.data = &lpass_ver_9,
2510
2256
}, {
2511
2257
.compatible = "qcom,sm8450-lpass-tx-macro",
2512
-
.data = &lpass_ver_9,
2258
+
.data = &lpass_ver_9_2,
2513
2259
}, {
2514
2260
.compatible = "qcom,sm8550-lpass-tx-macro",
2515
2261
.data = &lpass_ver_11,
2516
2262
}, {
2517
2263
.compatible = "qcom,sc8280xp-lpass-tx-macro",
2264
+
/*
2265
+
* The block is actually LPASS v9.3, but keep LPASS v9 match
2266
+
* data and audio widgets, due to compatibility reasons.
2267
+
* Microphones are working on SC8280xp fine, so apparently the
2268
+
* fix is not necessary.
2269
+
*/
2518
2270
.data = &lpass_ver_9,
2519
2271
},
2520
2272
{ }