Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
clk: mediatek: mt8183: use mtk_clk_simple_probe to simplify driver
mtk_clk_simple_probe was added by Chun-Jie to simply common flow
of MediaTek clock drivers and ChenYu enhanced the error path of
mtk_clk_simple_probe and added mtk_clk_simple_remove.
Let's use mtk_clk_simple_probe and mtk_clk_simple_probe in other
MediaTek clock drivers as well.
Signed-off-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220922091841.4099-7-miles.chen@mediatek.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
authored by
Miles Chen
and committed by
Chen-Yu Tsai
d36d697a
a481c6c7
+108
-137
+12
-15
drivers/clk/mediatek/clk-mt8183-cam.c
+12
-15
drivers/clk/mediatek/clk-mt8183-cam.c
···
34
34
GATE_CAM(CLK_CAM_CCU, "cam_ccu", "cam_sel", 12),
35
35
};
36
36
37
-
static int clk_mt8183_cam_probe(struct platform_device *pdev)
38
-
{
39
-
struct clk_hw_onecell_data *clk_data;
40
-
struct device_node *node = pdev->dev.of_node;
41
-
42
-
clk_data = mtk_alloc_clk_data(CLK_CAM_NR_CLK);
43
-
44
-
mtk_clk_register_gates(node, cam_clks, ARRAY_SIZE(cam_clks),
45
-
clk_data);
46
-
47
-
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
48
-
}
37
+
static const struct mtk_clk_desc cam_desc = {
38
+
.clks = cam_clks,
39
+
.num_clks = ARRAY_SIZE(cam_clks),
40
+
};
49
41
50
42
static const struct of_device_id of_match_clk_mt8183_cam[] = {
51
-
{ .compatible = "mediatek,mt8183-camsys", },
52
-
{}
43
+
{
44
+
.compatible = "mediatek,mt8183-camsys",
45
+
.data = &cam_desc,
46
+
}, {
47
+
/* sentinel */
48
+
}
53
49
};
54
50
55
51
static struct platform_driver clk_mt8183_cam_drv = {
56
-
.probe = clk_mt8183_cam_probe,
52
+
.probe = mtk_clk_simple_probe,
53
+
.remove = mtk_clk_simple_remove,
57
54
.driver = {
58
55
.name = "clk-mt8183-cam",
59
56
.of_match_table = of_match_clk_mt8183_cam,
+12
-15
drivers/clk/mediatek/clk-mt8183-img.c
+12
-15
drivers/clk/mediatek/clk-mt8183-img.c
···
34
34
GATE_IMG(CLK_IMG_OWE, "img_owe", "img_sel", 9),
35
35
};
36
36
37
-
static int clk_mt8183_img_probe(struct platform_device *pdev)
38
-
{
39
-
struct clk_hw_onecell_data *clk_data;
40
-
struct device_node *node = pdev->dev.of_node;
41
-
42
-
clk_data = mtk_alloc_clk_data(CLK_IMG_NR_CLK);
43
-
44
-
mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks),
45
-
clk_data);
46
-
47
-
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
48
-
}
37
+
static const struct mtk_clk_desc img_desc = {
38
+
.clks = img_clks,
39
+
.num_clks = ARRAY_SIZE(img_clks),
40
+
};
49
41
50
42
static const struct of_device_id of_match_clk_mt8183_img[] = {
51
-
{ .compatible = "mediatek,mt8183-imgsys", },
52
-
{}
43
+
{
44
+
.compatible = "mediatek,mt8183-imgsys",
45
+
.data = &img_desc,
46
+
}, {
47
+
/* sentinel */
48
+
}
53
49
};
54
50
55
51
static struct platform_driver clk_mt8183_img_drv = {
56
-
.probe = clk_mt8183_img_probe,
52
+
.probe = mtk_clk_simple_probe,
53
+
.remove = mtk_clk_simple_remove,
57
54
.driver = {
58
55
.name = "clk-mt8183-img",
59
56
.of_match_table = of_match_clk_mt8183_img,
+12
-15
drivers/clk/mediatek/clk-mt8183-ipu0.c
+12
-15
drivers/clk/mediatek/clk-mt8183-ipu0.c
···
27
27
GATE_IPU_CORE0(CLK_IPU_CORE0_IPU, "ipu_core0_ipu", "dsp_sel", 2),
28
28
};
29
29
30
-
static int clk_mt8183_ipu_core0_probe(struct platform_device *pdev)
31
-
{
32
-
struct clk_hw_onecell_data *clk_data;
33
-
struct device_node *node = pdev->dev.of_node;
34
-
35
-
clk_data = mtk_alloc_clk_data(CLK_IPU_CORE0_NR_CLK);
36
-
37
-
mtk_clk_register_gates(node, ipu_core0_clks, ARRAY_SIZE(ipu_core0_clks),
38
-
clk_data);
39
-
40
-
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
41
-
}
30
+
static const struct mtk_clk_desc ipu_core0_desc = {
31
+
.clks = ipu_core0_clks,
32
+
.num_clks = ARRAY_SIZE(ipu_core0_clks),
33
+
};
42
34
43
35
static const struct of_device_id of_match_clk_mt8183_ipu_core0[] = {
44
-
{ .compatible = "mediatek,mt8183-ipu_core0", },
45
-
{}
36
+
{
37
+
.compatible = "mediatek,mt8183-ipu_core0",
38
+
.data = &ipu_core0_desc,
39
+
}, {
40
+
/* sentinel */
41
+
}
46
42
};
47
43
48
44
static struct platform_driver clk_mt8183_ipu_core0_drv = {
49
-
.probe = clk_mt8183_ipu_core0_probe,
45
+
.probe = mtk_clk_simple_probe,
46
+
.remove = mtk_clk_simple_remove,
50
47
.driver = {
51
48
.name = "clk-mt8183-ipu_core0",
52
49
.of_match_table = of_match_clk_mt8183_ipu_core0,
+12
-15
drivers/clk/mediatek/clk-mt8183-ipu1.c
+12
-15
drivers/clk/mediatek/clk-mt8183-ipu1.c
···
27
27
GATE_IPU_CORE1(CLK_IPU_CORE1_IPU, "ipu_core1_ipu", "dsp_sel", 2),
28
28
};
29
29
30
-
static int clk_mt8183_ipu_core1_probe(struct platform_device *pdev)
31
-
{
32
-
struct clk_hw_onecell_data *clk_data;
33
-
struct device_node *node = pdev->dev.of_node;
34
-
35
-
clk_data = mtk_alloc_clk_data(CLK_IPU_CORE1_NR_CLK);
36
-
37
-
mtk_clk_register_gates(node, ipu_core1_clks, ARRAY_SIZE(ipu_core1_clks),
38
-
clk_data);
39
-
40
-
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
41
-
}
30
+
static const struct mtk_clk_desc ipu_core1_desc = {
31
+
.clks = ipu_core1_clks,
32
+
.num_clks = ARRAY_SIZE(ipu_core1_clks),
33
+
};
42
34
43
35
static const struct of_device_id of_match_clk_mt8183_ipu_core1[] = {
44
-
{ .compatible = "mediatek,mt8183-ipu_core1", },
45
-
{}
36
+
{
37
+
.compatible = "mediatek,mt8183-ipu_core1",
38
+
.data = &ipu_core1_desc,
39
+
}, {
40
+
/* sentinel */
41
+
}
46
42
};
47
43
48
44
static struct platform_driver clk_mt8183_ipu_core1_drv = {
49
-
.probe = clk_mt8183_ipu_core1_probe,
45
+
.probe = mtk_clk_simple_probe,
46
+
.remove = mtk_clk_simple_remove,
50
47
.driver = {
51
48
.name = "clk-mt8183-ipu_core1",
52
49
.of_match_table = of_match_clk_mt8183_ipu_core1,
+12
-15
drivers/clk/mediatek/clk-mt8183-ipu_adl.c
+12
-15
drivers/clk/mediatek/clk-mt8183-ipu_adl.c
···
25
25
GATE_IPU_ADL_I(CLK_IPU_ADL_CABGEN, "ipu_adl_cabgen", "dsp_sel", 24),
26
26
};
27
27
28
-
static int clk_mt8183_ipu_adl_probe(struct platform_device *pdev)
29
-
{
30
-
struct clk_hw_onecell_data *clk_data;
31
-
struct device_node *node = pdev->dev.of_node;
32
-
33
-
clk_data = mtk_alloc_clk_data(CLK_IPU_ADL_NR_CLK);
34
-
35
-
mtk_clk_register_gates(node, ipu_adl_clks, ARRAY_SIZE(ipu_adl_clks),
36
-
clk_data);
37
-
38
-
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
39
-
}
28
+
static const struct mtk_clk_desc ipu_adl_desc = {
29
+
.clks = ipu_adl_clks,
30
+
.num_clks = ARRAY_SIZE(ipu_adl_clks),
31
+
};
40
32
41
33
static const struct of_device_id of_match_clk_mt8183_ipu_adl[] = {
42
-
{ .compatible = "mediatek,mt8183-ipu_adl", },
43
-
{}
34
+
{
35
+
.compatible = "mediatek,mt8183-ipu_adl",
36
+
.data = &ipu_adl_desc,
37
+
}, {
38
+
/* sentinel */
39
+
}
44
40
};
45
41
46
42
static struct platform_driver clk_mt8183_ipu_adl_drv = {
47
-
.probe = clk_mt8183_ipu_adl_probe,
43
+
.probe = mtk_clk_simple_probe,
44
+
.remove = mtk_clk_simple_remove,
48
45
.driver = {
49
46
.name = "clk-mt8183-ipu_adl",
50
47
.of_match_table = of_match_clk_mt8183_ipu_adl,
+12
-15
drivers/clk/mediatek/clk-mt8183-ipu_conn.c
+12
-15
drivers/clk/mediatek/clk-mt8183-ipu_conn.c
···
94
94
"ipu_conn_cab3to1_slice", "dsp1_sel", 17),
95
95
};
96
96
97
-
static int clk_mt8183_ipu_conn_probe(struct platform_device *pdev)
98
-
{
99
-
struct clk_hw_onecell_data *clk_data;
100
-
struct device_node *node = pdev->dev.of_node;
101
-
102
-
clk_data = mtk_alloc_clk_data(CLK_IPU_CONN_NR_CLK);
103
-
104
-
mtk_clk_register_gates(node, ipu_conn_clks, ARRAY_SIZE(ipu_conn_clks),
105
-
clk_data);
106
-
107
-
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
108
-
}
97
+
static const struct mtk_clk_desc ipu_conn_desc = {
98
+
.clks = ipu_conn_clks,
99
+
.num_clks = ARRAY_SIZE(ipu_conn_clks),
100
+
};
109
101
110
102
static const struct of_device_id of_match_clk_mt8183_ipu_conn[] = {
111
-
{ .compatible = "mediatek,mt8183-ipu_conn", },
112
-
{}
103
+
{
104
+
.compatible = "mediatek,mt8183-ipu_conn",
105
+
.data = &ipu_conn_desc,
106
+
}, {
107
+
/* sentinel */
108
+
}
113
109
};
114
110
115
111
static struct platform_driver clk_mt8183_ipu_conn_drv = {
116
-
.probe = clk_mt8183_ipu_conn_probe,
112
+
.probe = mtk_clk_simple_probe,
113
+
.remove = mtk_clk_simple_remove,
117
114
.driver = {
118
115
.name = "clk-mt8183-ipu_conn",
119
116
.of_match_table = of_match_clk_mt8183_ipu_conn,
+12
-17
drivers/clk/mediatek/clk-mt8183-mfgcfg.c
+12
-17
drivers/clk/mediatek/clk-mt8183-mfgcfg.c
···
26
26
GATE_MFG(CLK_MFG_BG3D, "mfg_bg3d", "mfg_sel", 0)
27
27
};
28
28
29
-
static int clk_mt8183_mfg_probe(struct platform_device *pdev)
30
-
{
31
-
struct clk_hw_onecell_data *clk_data;
32
-
struct device_node *node = pdev->dev.of_node;
33
-
34
-
pm_runtime_enable(&pdev->dev);
35
-
36
-
clk_data = mtk_alloc_clk_data(CLK_MFG_NR_CLK);
37
-
38
-
mtk_clk_register_gates_with_dev(node, mfg_clks, ARRAY_SIZE(mfg_clks),
39
-
clk_data, &pdev->dev);
40
-
41
-
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
42
-
}
29
+
static const struct mtk_clk_desc mfg_desc = {
30
+
.clks = mfg_clks,
31
+
.num_clks = ARRAY_SIZE(mfg_clks),
32
+
};
43
33
44
34
static const struct of_device_id of_match_clk_mt8183_mfg[] = {
45
-
{ .compatible = "mediatek,mt8183-mfgcfg", },
46
-
{}
35
+
{
36
+
.compatible = "mediatek,mt8183-mfgcfg",
37
+
.data = &mfg_desc,
38
+
}, {
39
+
/* sentinel */
40
+
}
47
41
};
48
42
49
43
static struct platform_driver clk_mt8183_mfg_drv = {
50
-
.probe = clk_mt8183_mfg_probe,
44
+
.probe = mtk_clk_simple_probe,
45
+
.remove = mtk_clk_simple_remove,
51
46
.driver = {
52
47
.name = "clk-mt8183-mfg",
53
48
.of_match_table = of_match_clk_mt8183_mfg,
+12
-15
drivers/clk/mediatek/clk-mt8183-vdec.c
+12
-15
drivers/clk/mediatek/clk-mt8183-vdec.c
···
38
38
GATE_VDEC1_I(CLK_VDEC_LARB1, "vdec_larb1", "mm_sel", 0),
39
39
};
40
40
41
-
static int clk_mt8183_vdec_probe(struct platform_device *pdev)
42
-
{
43
-
struct clk_hw_onecell_data *clk_data;
44
-
struct device_node *node = pdev->dev.of_node;
45
-
46
-
clk_data = mtk_alloc_clk_data(CLK_VDEC_NR_CLK);
47
-
48
-
mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks),
49
-
clk_data);
50
-
51
-
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
52
-
}
41
+
static const struct mtk_clk_desc vdec_desc = {
42
+
.clks = vdec_clks,
43
+
.num_clks = ARRAY_SIZE(vdec_clks),
44
+
};
53
45
54
46
static const struct of_device_id of_match_clk_mt8183_vdec[] = {
55
-
{ .compatible = "mediatek,mt8183-vdecsys", },
56
-
{}
47
+
{
48
+
.compatible = "mediatek,mt8183-vdecsys",
49
+
.data = &vdec_desc,
50
+
}, {
51
+
/* sentinel */
52
+
}
57
53
};
58
54
59
55
static struct platform_driver clk_mt8183_vdec_drv = {
60
-
.probe = clk_mt8183_vdec_probe,
56
+
.probe = mtk_clk_simple_probe,
57
+
.remove = mtk_clk_simple_remove,
61
58
.driver = {
62
59
.name = "clk-mt8183-vdec",
63
60
.of_match_table = of_match_clk_mt8183_vdec,
+12
-15
drivers/clk/mediatek/clk-mt8183-venc.c
+12
-15
drivers/clk/mediatek/clk-mt8183-venc.c
···
30
30
"mm_sel", 8),
31
31
};
32
32
33
-
static int clk_mt8183_venc_probe(struct platform_device *pdev)
34
-
{
35
-
struct clk_hw_onecell_data *clk_data;
36
-
struct device_node *node = pdev->dev.of_node;
37
-
38
-
clk_data = mtk_alloc_clk_data(CLK_VENC_NR_CLK);
39
-
40
-
mtk_clk_register_gates(node, venc_clks, ARRAY_SIZE(venc_clks),
41
-
clk_data);
42
-
43
-
return of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
44
-
}
33
+
static const struct mtk_clk_desc venc_desc = {
34
+
.clks = venc_clks,
35
+
.num_clks = ARRAY_SIZE(venc_clks),
36
+
};
45
37
46
38
static const struct of_device_id of_match_clk_mt8183_venc[] = {
47
-
{ .compatible = "mediatek,mt8183-vencsys", },
48
-
{}
39
+
{
40
+
.compatible = "mediatek,mt8183-vencsys",
41
+
.data = &venc_desc,
42
+
}, {
43
+
/* sentinel */
44
+
}
49
45
};
50
46
51
47
static struct platform_driver clk_mt8183_venc_drv = {
52
-
.probe = clk_mt8183_venc_probe,
48
+
.probe = mtk_clk_simple_probe,
49
+
.remove = mtk_clk_simple_remove,
53
50
.driver = {
54
51
.name = "clk-mt8183-venc",
55
52
.of_match_table = of_match_clk_mt8183_venc,