tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc

* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (34 commits)
powerpc/mpic: Fix mask/unmask timeout message
powerpc/pseries: Add BNX2=m to defconfig
powerpc: Enable 64kB pages and 1024 threads in pseries config
powerpc: Disable mcount tracers in pseries defconfig
powerpc/boot/dts: Install dts from the right directory
powerpc: machine_check_generic is wrong on 64bit
powerpc: Check RTAS extended log flag before checking length
powerpc: Fix corruption when grabbing FWNMI data
powerpc: Rework pseries machine check handler
powerpc: Don't silently handle machine checks from userspace
powerpc: Remove duplicate debugger hook in machine_check_exception
powerpc: Never halt RTAS error logging after receiving an unrecoverable machine check
powerpc: Don't force MSR_RI in machine_check_exception
powerpc: Print 32 bits of DSISR in show_regs
powerpc/kdump: Disable ftrace during kexec
powerpc/kdump: Move crash_kexec_stop_spus to kdump crash handler
powerpc/kexec: Remove empty ppc_md.machine_kexec_prepare
powerpc/kexec: Don't initialise kexec hooks to default handlers
powerpc/kdump: Remove ppc_md.machine_crash_shutdown
powerpc/kexec: Remove ppc_md.machine_kexec
...

Linus Torvalds d41ad6df 3dece370

+335 -347
+1 -1
arch/powerpc/boot/Makefile
··· 368 368 extra-installed := $(patsubst $(obj)/%, $(DESTDIR)$(WRAPPER_OBJDIR)/%, $(extra-y)) 369 369 hostprogs-installed := $(patsubst %, $(DESTDIR)$(WRAPPER_BINDIR)/%, $(hostprogs-y)) 370 370 wrapper-installed := $(DESTDIR)$(WRAPPER_BINDIR)/wrapper 371 - dts-installed := $(patsubst $(obj)/dts/%, $(DESTDIR)$(WRAPPER_DTSDIR)/%, $(wildcard $(obj)/dts/*.dts)) 371 + dts-installed := $(patsubst $(dtstree)/%, $(DESTDIR)$(WRAPPER_DTSDIR)/%, $(wildcard $(dtstree)/*.dts)) 372 372 373 373 all-installed := $(extra-installed) $(hostprogs-installed) $(wrapper-installed) $(dts-installed) 374 374
+1 -1
arch/powerpc/boot/dts/mpc8308rdb.dts
··· 109 109 #address-cells = <1>; 110 110 #size-cells = <1>; 111 111 device_type = "soc"; 112 - compatible = "fsl,mpc8315-immr", "simple-bus"; 112 + compatible = "fsl,mpc8308-immr", "simple-bus"; 113 113 ranges = <0 0xe0000000 0x00100000>; 114 114 reg = <0xe0000000 0x00000200>; 115 115 bus-frequency = <0>;
+2 -2
arch/powerpc/boot/dts/p1022ds.dts
··· 291 291 ranges = <0x0 0xc100 0x200>; 292 292 cell-index = <1>; 293 293 dma00: dma-channel@0 { 294 - compatible = "fsl,eloplus-dma-channel"; 294 + compatible = "fsl,ssi-dma-channel"; 295 295 reg = <0x0 0x80>; 296 296 cell-index = <0>; 297 297 interrupts = <76 2>; 298 298 }; 299 299 dma01: dma-channel@80 { 300 - compatible = "fsl,eloplus-dma-channel"; 300 + compatible = "fsl,ssi-dma-channel"; 301 301 reg = <0x80 0x80>; 302 302 cell-index = <1>; 303 303 interrupts = <77 2>;
+4 -3
arch/powerpc/configs/pseries_defconfig
··· 2 2 CONFIG_ALTIVEC=y 3 3 CONFIG_VSX=y 4 4 CONFIG_SMP=y 5 - CONFIG_NR_CPUS=128 5 + CONFIG_NR_CPUS=1024 6 6 CONFIG_EXPERIMENTAL=y 7 7 CONFIG_SYSVIPC=y 8 8 CONFIG_POSIX_MQUEUE=y ··· 45 45 CONFIG_IRQ_ALL_CPUS=y 46 46 CONFIG_MEMORY_HOTPLUG=y 47 47 CONFIG_MEMORY_HOTREMOVE=y 48 + CONFIG_PPC_64K_PAGES=y 49 + CONFIG_PPC_SUBPAGE_PROT=y 48 50 CONFIG_SCHED_SMT=y 49 51 CONFIG_HOTPLUG_PCI=m 50 52 CONFIG_HOTPLUG_PCI_RPA=m ··· 186 184 CONFIG_E1000=y 187 185 CONFIG_E1000E=y 188 186 CONFIG_TIGON3=y 187 + CONFIG_BNX2=m 189 188 CONFIG_CHELSIO_T1=m 190 189 CONFIG_CHELSIO_T3=m 191 190 CONFIG_EHEA=y ··· 314 311 # CONFIG_RCU_CPU_STALL_DETECTOR is not set 315 312 CONFIG_LATENCYTOP=y 316 313 CONFIG_SYSCTL_SYSCALL_CHECK=y 317 - CONFIG_IRQSOFF_TRACER=y 318 314 CONFIG_SCHED_TRACER=y 319 - CONFIG_STACK_TRACER=y 320 315 CONFIG_BLK_DEV_IO_TRACE=y 321 316 CONFIG_DEBUG_STACKOVERFLOW=y 322 317 CONFIG_DEBUG_STACK_USAGE=y
+15 -12
arch/powerpc/include/asm/feature-fixups.h
··· 37 37 .align 2; \ 38 38 label##3: 39 39 40 - #define MAKE_FTR_SECTION_ENTRY(msk, val, label, sect) \ 41 - label##4: \ 42 - .popsection; \ 43 - .pushsection sect,"a"; \ 44 - .align 3; \ 45 - label##5: \ 46 - FTR_ENTRY_LONG msk; \ 47 - FTR_ENTRY_LONG val; \ 48 - FTR_ENTRY_OFFSET label##1b-label##5b; \ 49 - FTR_ENTRY_OFFSET label##2b-label##5b; \ 50 - FTR_ENTRY_OFFSET label##3b-label##5b; \ 51 - FTR_ENTRY_OFFSET label##4b-label##5b; \ 40 + #define MAKE_FTR_SECTION_ENTRY(msk, val, label, sect) \ 41 + label##4: \ 42 + .popsection; \ 43 + .pushsection sect,"a"; \ 44 + .align 3; \ 45 + label##5: \ 46 + FTR_ENTRY_LONG msk; \ 47 + FTR_ENTRY_LONG val; \ 48 + FTR_ENTRY_OFFSET label##1b-label##5b; \ 49 + FTR_ENTRY_OFFSET label##2b-label##5b; \ 50 + FTR_ENTRY_OFFSET label##3b-label##5b; \ 51 + FTR_ENTRY_OFFSET label##4b-label##5b; \ 52 + .ifgt (label##4b-label##3b)-(label##2b-label##1b); \ 53 + .error "Feature section else case larger than body"; \ 54 + .endif; \ 52 55 .popsection; 53 56 54 57
+15 -6
arch/powerpc/include/asm/immap_qe.h
··· 467 467 extern struct qe_immap __iomem *qe_immr; 468 468 extern phys_addr_t get_qe_base(void); 469 469 470 - static inline unsigned long immrbar_virt_to_phys(void *address) 470 + /* 471 + * Returns the offset within the QE address space of the given pointer. 472 + * 473 + * Note that the QE does not support 36-bit physical addresses, so if 474 + * get_qe_base() returns a number above 4GB, the caller will probably fail. 475 + */ 476 + static inline phys_addr_t immrbar_virt_to_phys(void *address) 471 477 { 472 - if ( ((u32)address >= (u32)qe_immr) && 473 - ((u32)address < ((u32)qe_immr + QE_IMMAP_SIZE)) ) 474 - return (unsigned long)(address - (u32)qe_immr + 475 - (u32)get_qe_base()); 476 - return (unsigned long)virt_to_phys(address); 478 + void *q = (void *)qe_immr; 479 + 480 + /* Is it a MURAM address? */ 481 + if ((address >= q) && (address < (q + QE_IMMAP_SIZE))) 482 + return get_qe_base() + (address - q); 483 + 484 + /* It's an address returned by kmalloc */ 485 + return virt_to_phys(address); 477 486 } 478 487 479 488 #endif /* __KERNEL__ */
+30 -10
arch/powerpc/include/asm/irqflags.h
··· 12 12 13 13 #else 14 14 #ifdef CONFIG_TRACE_IRQFLAGS 15 + #ifdef CONFIG_IRQSOFF_TRACER 16 + /* 17 + * Since the ftrace irqsoff latency trace checks CALLER_ADDR1, 18 + * which is the stack frame here, we need to force a stack frame 19 + * in case we came from user space. 20 + */ 21 + #define TRACE_WITH_FRAME_BUFFER(func) \ 22 + mflr r0; \ 23 + stdu r1, -32(r1); \ 24 + std r0, 16(r1); \ 25 + stdu r1, -32(r1); \ 26 + bl func; \ 27 + ld r1, 0(r1); \ 28 + ld r1, 0(r1); 29 + #else 30 + #define TRACE_WITH_FRAME_BUFFER(func) \ 31 + bl func; 32 + #endif 33 + 15 34 /* 16 35 * Most of the CPU's IRQ-state tracing is done from assembly code; we 17 36 * have to call a C function so call a wrapper that saves all the 18 37 * C-clobbered registers. 19 38 */ 20 - #define TRACE_ENABLE_INTS bl .trace_hardirqs_on 21 - #define TRACE_DISABLE_INTS bl .trace_hardirqs_off 22 - #define TRACE_AND_RESTORE_IRQ_PARTIAL(en,skip) \ 23 - cmpdi en,0; \ 24 - bne 95f; \ 25 - stb en,PACASOFTIRQEN(r13); \ 26 - bl .trace_hardirqs_off; \ 27 - b skip; \ 28 - 95: bl .trace_hardirqs_on; \ 39 + #define TRACE_ENABLE_INTS TRACE_WITH_FRAME_BUFFER(.trace_hardirqs_on) 40 + #define TRACE_DISABLE_INTS TRACE_WITH_FRAME_BUFFER(.trace_hardirqs_off) 41 + 42 + #define TRACE_AND_RESTORE_IRQ_PARTIAL(en,skip) \ 43 + cmpdi en,0; \ 44 + bne 95f; \ 45 + stb en,PACASOFTIRQEN(r13); \ 46 + TRACE_WITH_FRAME_BUFFER(.trace_hardirqs_off) \ 47 + b skip; \ 48 + 95: TRACE_WITH_FRAME_BUFFER(.trace_hardirqs_on) \ 29 49 li en,1; 30 50 #define TRACE_AND_RESTORE_IRQ(en) \ 31 51 TRACE_AND_RESTORE_IRQ_PARTIAL(en,96f); \ 32 - stb en,PACASOFTIRQEN(r13); \ 52 + stb en,PACASOFTIRQEN(r13); \ 33 53 96: 34 54 #else 35 55 #define TRACE_ENABLE_INTS
+1 -17
arch/powerpc/include/asm/machdep.h
··· 116 116 * If for some reason there is no irq, but the interrupt 117 117 * shouldn't be counted as spurious, return NO_IRQ_IGNORE. */ 118 118 unsigned int (*get_irq)(void); 119 - #ifdef CONFIG_KEXEC 120 - void (*kexec_cpu_down)(int crash_shutdown, int secondary); 121 - #endif 122 119 123 120 /* PCI stuff */ 124 121 /* Called after scanning the bus, before allocating resources */ ··· 232 235 void (*machine_shutdown)(void); 233 236 234 237 #ifdef CONFIG_KEXEC 235 - /* Called to do the minimal shutdown needed to run a kexec'd kernel 236 - * to run successfully. 237 - * XXX Should we move this one out of kexec scope? 238 - */ 239 - void (*machine_crash_shutdown)(struct pt_regs *regs); 238 + void (*kexec_cpu_down)(int crash_shutdown, int secondary); 240 239 241 240 /* Called to do what every setup is needed on image and the 242 241 * reboot code buffer. Returns 0 on success. ··· 240 247 * claims to support kexec. 241 248 */ 242 249 int (*machine_kexec_prepare)(struct kimage *image); 243 - 244 - /* Called to handle any machine specific cleanup on image */ 245 - void (*machine_kexec_cleanup)(struct kimage *image); 246 - 247 - /* Called to perform the _real_ kexec. 248 - * Do NOT allocate memory or fail here. We are past the point of 249 - * no return. 250 - */ 251 - void (*machine_kexec)(struct kimage *image); 252 250 #endif /* CONFIG_KEXEC */ 253 251 254 252 #ifdef CONFIG_SUSPEND
+2
arch/powerpc/include/asm/reg.h
··· 283 283 #define HID0_NOPTI (1<<0) /* No-op dcbt and dcbst instr. */ 284 284 285 285 #define SPRN_HID1 0x3F1 /* Hardware Implementation Register 1 */ 286 + #ifdef CONFIG_6xx 286 287 #define HID1_EMCP (1<<31) /* 7450 Machine Check Pin Enable */ 287 288 #define HID1_DFS (1<<22) /* 7447A Dynamic Frequency Scaling */ 288 289 #define HID1_PC0 (1<<16) /* 7450 PLL_CFG[0] */ ··· 293 292 #define HID1_SYNCBE (1<<11) /* 7450 ABE for sync, eieio */ 294 293 #define HID1_ABE (1<<10) /* 7450 Address Broadcast Enable */ 295 294 #define HID1_PS (1<<16) /* 750FX PLL selection */ 295 + #endif 296 296 #define SPRN_HID2 0x3F8 /* Hardware Implementation Register 2 */ 297 297 #define SPRN_HID2_GEKKO 0x398 /* Gekko HID2 Register */ 298 298 #define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */
+14
arch/powerpc/include/asm/reg_booke.h
··· 246 246 store or cache line push */ 247 247 #endif 248 248 249 + /* Bit definitions for the HID1 */ 250 + #ifdef CONFIG_E500 251 + /* e500v1/v2 */ 252 + #define HID1_PLL_CFG_MASK 0xfc000000 /* PLL_CFG input pins */ 253 + #define HID1_RFXE 0x00020000 /* Read fault exception enable */ 254 + #define HID1_R1DPE 0x00008000 /* R1 data bus parity enable */ 255 + #define HID1_R2DPE 0x00004000 /* R2 data bus parity enable */ 256 + #define HID1_ASTME 0x00002000 /* Address bus streaming mode enable */ 257 + #define HID1_ABE 0x00001000 /* Address broadcast enable */ 258 + #define HID1_MPXTT 0x00000400 /* MPX re-map transfer type */ 259 + #define HID1_ATS 0x00000080 /* Atomic status */ 260 + #define HID1_MID_MASK 0x0000000f /* MID input pins */ 261 + #endif 262 + 249 263 /* Bit definitions for the DBSR. */ 250 264 /* 251 265 * DBSR bits which have conflicting definitions on true Book E versus IBM 40x.
-8
arch/powerpc/include/asm/spu.h
··· 203 203 void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa, 204 204 void *code, int code_size); 205 205 206 - #ifdef CONFIG_KEXEC 207 - void crash_register_spus(struct list_head *list); 208 - #else 209 - static inline void crash_register_spus(struct list_head *list) 210 - { 211 - } 212 - #endif 213 - 214 206 extern void spu_invalidate_slbs(struct spu *spu); 215 207 extern void spu_associate_mm(struct spu *spu, struct mm_struct *mm); 216 208 int spu_64k_pages_available(void);
+6
arch/powerpc/kernel/cpu_setup_fsl_booke.S
··· 64 64 bl __e500_icache_setup 65 65 bl __e500_dcache_setup 66 66 bl __setup_e500_ivors 67 + #ifdef CONFIG_RAPIDIO 68 + /* Ensure that RFXE is set */ 69 + mfspr r3,SPRN_HID1 70 + oris r3,r3,HID1_RFXE@h 71 + mtspr SPRN_HID1,r3 72 + #endif 67 73 mtlr r4 68 74 blr 69 75 _GLOBAL(__setup_cpu_e500mc)
-23
arch/powerpc/kernel/cputable.c
··· 116 116 .pmc_type = PPC_PMC_IBM, 117 117 .oprofile_cpu_type = "ppc64/power3", 118 118 .oprofile_type = PPC_OPROFILE_RS64, 119 - .machine_check = machine_check_generic, 120 119 .platform = "power3", 121 120 }, 122 121 { /* Power3+ */ ··· 131 132 .pmc_type = PPC_PMC_IBM, 132 133 .oprofile_cpu_type = "ppc64/power3", 133 134 .oprofile_type = PPC_OPROFILE_RS64, 134 - .machine_check = machine_check_generic, 135 135 .platform = "power3", 136 136 }, 137 137 { /* Northstar */ ··· 146 148 .pmc_type = PPC_PMC_IBM, 147 149 .oprofile_cpu_type = "ppc64/rs64", 148 150 .oprofile_type = PPC_OPROFILE_RS64, 149 - .machine_check = machine_check_generic, 150 151 .platform = "rs64", 151 152 }, 152 153 { /* Pulsar */ ··· 161 164 .pmc_type = PPC_PMC_IBM, 162 165 .oprofile_cpu_type = "ppc64/rs64", 163 166 .oprofile_type = PPC_OPROFILE_RS64, 164 - .machine_check = machine_check_generic, 165 167 .platform = "rs64", 166 168 }, 167 169 { /* I-star */ ··· 176 180 .pmc_type = PPC_PMC_IBM, 177 181 .oprofile_cpu_type = "ppc64/rs64", 178 182 .oprofile_type = PPC_OPROFILE_RS64, 179 - .machine_check = machine_check_generic, 180 183 .platform = "rs64", 181 184 }, 182 185 { /* S-star */ ··· 191 196 .pmc_type = PPC_PMC_IBM, 192 197 .oprofile_cpu_type = "ppc64/rs64", 193 198 .oprofile_type = PPC_OPROFILE_RS64, 194 - .machine_check = machine_check_generic, 195 199 .platform = "rs64", 196 200 }, 197 201 { /* Power4 */ ··· 206 212 .pmc_type = PPC_PMC_IBM, 207 213 .oprofile_cpu_type = "ppc64/power4", 208 214 .oprofile_type = PPC_OPROFILE_POWER4, 209 - .machine_check = machine_check_generic, 210 215 .platform = "power4", 211 216 }, 212 217 { /* Power4+ */ ··· 221 228 .pmc_type = PPC_PMC_IBM, 222 229 .oprofile_cpu_type = "ppc64/power4", 223 230 .oprofile_type = PPC_OPROFILE_POWER4, 224 - .machine_check = machine_check_generic, 225 231 .platform = "power4", 226 232 }, 227 233 { /* PPC970 */ ··· 239 247 .cpu_restore = __restore_cpu_ppc970, 240 248 .oprofile_cpu_type = "ppc64/970", 241 249 .oprofile_type = PPC_OPROFILE_POWER4, 242 - .machine_check = machine_check_generic, 243 250 .platform = "ppc970", 244 251 }, 245 252 { /* PPC970FX */ ··· 257 266 .cpu_restore = __restore_cpu_ppc970, 258 267 .oprofile_cpu_type = "ppc64/970", 259 268 .oprofile_type = PPC_OPROFILE_POWER4, 260 - .machine_check = machine_check_generic, 261 269 .platform = "ppc970", 262 270 }, 263 271 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ ··· 275 285 .cpu_restore = __restore_cpu_ppc970, 276 286 .oprofile_cpu_type = "ppc64/970MP", 277 287 .oprofile_type = PPC_OPROFILE_POWER4, 278 - .machine_check = machine_check_generic, 279 288 .platform = "ppc970", 280 289 }, 281 290 { /* PPC970MP */ ··· 293 304 .cpu_restore = __restore_cpu_ppc970, 294 305 .oprofile_cpu_type = "ppc64/970MP", 295 306 .oprofile_type = PPC_OPROFILE_POWER4, 296 - .machine_check = machine_check_generic, 297 307 .platform = "ppc970", 298 308 }, 299 309 { /* PPC970GX */ ··· 310 322 .cpu_setup = __setup_cpu_ppc970, 311 323 .oprofile_cpu_type = "ppc64/970", 312 324 .oprofile_type = PPC_OPROFILE_POWER4, 313 - .machine_check = machine_check_generic, 314 325 .platform = "ppc970", 315 326 }, 316 327 { /* Power5 GR */ ··· 330 343 */ 331 344 .oprofile_mmcra_sihv = MMCRA_SIHV, 332 345 .oprofile_mmcra_sipr = MMCRA_SIPR, 333 - .machine_check = machine_check_generic, 334 346 .platform = "power5", 335 347 }, 336 348 { /* Power5++ */ ··· 346 360 .oprofile_type = PPC_OPROFILE_POWER4, 347 361 .oprofile_mmcra_sihv = MMCRA_SIHV, 348 362 .oprofile_mmcra_sipr = MMCRA_SIPR, 349 - .machine_check = machine_check_generic, 350 363 .platform = "power5+", 351 364 }, 352 365 { /* Power5 GS */ ··· 363 378 .oprofile_type = PPC_OPROFILE_POWER4, 364 379 .oprofile_mmcra_sihv = MMCRA_SIHV, 365 380 .oprofile_mmcra_sipr = MMCRA_SIPR, 366 - .machine_check = machine_check_generic, 367 381 .platform = "power5+", 368 382 }, 369 383 { /* POWER6 in P5+ mode; 2.04-compliant processor */ ··· 374 390 .mmu_features = MMU_FTR_HPTE_TABLE, 375 391 .icache_bsize = 128, 376 392 .dcache_bsize = 128, 377 - .machine_check = machine_check_generic, 378 393 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 379 394 .oprofile_type = PPC_OPROFILE_POWER4, 380 395 .platform = "power5+", ··· 396 413 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, 397 414 .oprofile_mmcra_clear = POWER6_MMCRA_THRM | 398 415 POWER6_MMCRA_OTHER, 399 - .machine_check = machine_check_generic, 400 416 .platform = "power6x", 401 417 }, 402 418 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ ··· 407 425 .mmu_features = MMU_FTR_HPTE_TABLE, 408 426 .icache_bsize = 128, 409 427 .dcache_bsize = 128, 410 - .machine_check = machine_check_generic, 411 428 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 412 429 .oprofile_type = PPC_OPROFILE_POWER4, 413 430 .platform = "power6", ··· 421 440 MMU_FTR_TLBIE_206, 422 441 .icache_bsize = 128, 423 442 .dcache_bsize = 128, 424 - .machine_check = machine_check_generic, 425 443 .oprofile_type = PPC_OPROFILE_POWER4, 426 444 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 427 445 .platform = "power7", ··· 472 492 .pmc_type = PPC_PMC_IBM, 473 493 .oprofile_cpu_type = "ppc64/cell-be", 474 494 .oprofile_type = PPC_OPROFILE_CELL, 475 - .machine_check = machine_check_generic, 476 495 .platform = "ppc-cell-be", 477 496 }, 478 497 { /* PA Semi PA6T */ ··· 489 510 .cpu_restore = __restore_cpu_pa6t, 490 511 .oprofile_cpu_type = "ppc64/pa6t", 491 512 .oprofile_type = PPC_OPROFILE_PA6T, 492 - .machine_check = machine_check_generic, 493 513 .platform = "pa6t", 494 514 }, 495 515 { /* default match */ ··· 502 524 .dcache_bsize = 128, 503 525 .num_pmcs = 6, 504 526 .pmc_type = PPC_PMC_IBM, 505 - .machine_check = machine_check_generic, 506 527 .platform = "power4", 507 528 } 508 529 #endif /* CONFIG_PPC_BOOK3S_64 */
+2 -70
arch/powerpc/kernel/crash.c
··· 48 48 static cpumask_t cpus_in_crash = CPU_MASK_NONE; 49 49 cpumask_t cpus_in_sr = CPU_MASK_NONE; 50 50 51 - #define CRASH_HANDLER_MAX 2 51 + #define CRASH_HANDLER_MAX 3 52 52 /* NULL terminated list of shutdown handles */ 53 53 static crash_shutdown_t crash_shutdown_handles[CRASH_HANDLER_MAX+1]; 54 54 static DEFINE_SPINLOCK(crash_handlers_lock); ··· 125 125 smp_wmb(); 126 126 127 127 /* 128 - * FIXME: Until we will have the way to stop other CPUSs reliabally, 128 + * FIXME: Until we will have the way to stop other CPUs reliably, 129 129 * the crash CPU will send an IPI and wait for other CPUs to 130 130 * respond. 131 131 * Delay of at least 10 seconds. ··· 254 254 cpus_in_sr = CPU_MASK_NONE; 255 255 } 256 256 #endif 257 - #ifdef CONFIG_SPU_BASE 258 - 259 - #include <asm/spu.h> 260 - #include <asm/spu_priv1.h> 261 - 262 - struct crash_spu_info { 263 - struct spu *spu; 264 - u32 saved_spu_runcntl_RW; 265 - u32 saved_spu_status_R; 266 - u32 saved_spu_npc_RW; 267 - u64 saved_mfc_sr1_RW; 268 - u64 saved_mfc_dar; 269 - u64 saved_mfc_dsisr; 270 - }; 271 - 272 - #define CRASH_NUM_SPUS 16 /* Enough for current hardware */ 273 - static struct crash_spu_info crash_spu_info[CRASH_NUM_SPUS]; 274 - 275 - static void crash_kexec_stop_spus(void) 276 - { 277 - struct spu *spu; 278 - int i; 279 - u64 tmp; 280 - 281 - for (i = 0; i < CRASH_NUM_SPUS; i++) { 282 - if (!crash_spu_info[i].spu) 283 - continue; 284 - 285 - spu = crash_spu_info[i].spu; 286 - 287 - crash_spu_info[i].saved_spu_runcntl_RW = 288 - in_be32(&spu->problem->spu_runcntl_RW); 289 - crash_spu_info[i].saved_spu_status_R = 290 - in_be32(&spu->problem->spu_status_R); 291 - crash_spu_info[i].saved_spu_npc_RW = 292 - in_be32(&spu->problem->spu_npc_RW); 293 - 294 - crash_spu_info[i].saved_mfc_dar = spu_mfc_dar_get(spu); 295 - crash_spu_info[i].saved_mfc_dsisr = spu_mfc_dsisr_get(spu); 296 - tmp = spu_mfc_sr1_get(spu); 297 - crash_spu_info[i].saved_mfc_sr1_RW = tmp; 298 - 299 - tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; 300 - spu_mfc_sr1_set(spu, tmp); 301 - 302 - __delay(200); 303 - } 304 - } 305 - 306 - void crash_register_spus(struct list_head *list) 307 - { 308 - struct spu *spu; 309 - 310 - list_for_each_entry(spu, list, full_list) { 311 - if (WARN_ON(spu->number >= CRASH_NUM_SPUS)) 312 - continue; 313 - 314 - crash_spu_info[spu->number].spu = spu; 315 - } 316 - } 317 - 318 - #else 319 - static inline void crash_kexec_stop_spus(void) 320 - { 321 - } 322 - #endif /* CONFIG_SPU_BASE */ 323 257 324 258 /* 325 259 * Register a function to be called on shutdown. Only use this if you ··· 372 438 } 373 439 crash_shutdown_cpu = -1; 374 440 __debugger_fault_handler = old_handler; 375 - 376 - crash_kexec_stop_spus(); 377 441 378 442 if (ppc_md.kexec_cpu_down) 379 443 ppc_md.kexec_cpu_down(1, 0);
+11
arch/powerpc/kernel/entry_32.S
··· 880 880 */ 881 881 andi. r10,r9,MSR_EE 882 882 beq 1f 883 + /* 884 + * Since the ftrace irqsoff latency trace checks CALLER_ADDR1, 885 + * which is the stack frame here, we need to force a stack frame 886 + * in case we came from user space. 887 + */ 888 + stwu r1,-32(r1) 889 + mflr r0 890 + stw r0,4(r1) 891 + stwu r1,-32(r1) 883 892 bl trace_hardirqs_on 893 + lwz r1,0(r1) 894 + lwz r1,0(r1) 884 895 lwz r9,_MSR(r1) 885 896 1: 886 897 #endif /* CONFIG_TRACE_IRQFLAGS */
+9 -10
arch/powerpc/kernel/machine_kexec.c
··· 15 15 #include <linux/memblock.h> 16 16 #include <linux/of.h> 17 17 #include <linux/irq.h> 18 + #include <linux/ftrace.h> 18 19 19 20 #include <asm/machdep.h> 20 21 #include <asm/prom.h> ··· 45 44 46 45 void machine_crash_shutdown(struct pt_regs *regs) 47 46 { 48 - if (ppc_md.machine_crash_shutdown) 49 - ppc_md.machine_crash_shutdown(regs); 50 - else 51 - default_machine_crash_shutdown(regs); 47 + default_machine_crash_shutdown(regs); 52 48 } 53 49 54 50 /* ··· 63 65 64 66 void machine_kexec_cleanup(struct kimage *image) 65 67 { 66 - if (ppc_md.machine_kexec_cleanup) 67 - ppc_md.machine_kexec_cleanup(image); 68 68 } 69 69 70 70 void arch_crash_save_vmcoreinfo(void) ··· 83 87 */ 84 88 void machine_kexec(struct kimage *image) 85 89 { 86 - if (ppc_md.machine_kexec) 87 - ppc_md.machine_kexec(image); 88 - else 89 - default_machine_kexec(image); 90 + int save_ftrace_enabled; 91 + 92 + save_ftrace_enabled = __ftrace_enabled_save(); 93 + 94 + default_machine_kexec(image); 95 + 96 + __ftrace_enabled_restore(save_ftrace_enabled); 90 97 91 98 /* Fall back to normal restart if we're still alive. */ 92 99 machine_restart(NULL);
+1 -1
arch/powerpc/kernel/process.c
··· 631 631 #ifdef CONFIG_PPC_ADV_DEBUG_REGS 632 632 printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr); 633 633 #else 634 - printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr); 634 + printk("DAR: "REG", DSISR: %08lx\n", regs->dar, regs->dsisr); 635 635 #endif 636 636 printk("TASK = %p[%d] '%s' THREAD: %p", 637 637 current, task_pid_nr(current), current->comm, task_thread_info(current));
+6 -47
arch/powerpc/kernel/rtas_flash.c
··· 256 256 struct proc_dir_entry *dp = PDE(file->f_path.dentry->d_inode); 257 257 struct rtas_update_flash_t *uf; 258 258 char msg[RTAS_MSG_MAXLEN]; 259 - int msglen; 260 259 261 - uf = (struct rtas_update_flash_t *) dp->data; 260 + uf = dp->data; 262 261 263 262 if (!strcmp(dp->name, FIRMWARE_FLASH_NAME)) { 264 263 get_flash_status_msg(uf->status, msg); 265 264 } else { /* FIRMWARE_UPDATE_NAME */ 266 265 sprintf(msg, "%d\n", uf->status); 267 266 } 268 - msglen = strlen(msg); 269 - if (msglen > count) 270 - msglen = count; 271 267 272 - if (ppos && *ppos != 0) 273 - return 0; /* be cheap */ 274 - 275 - if (!access_ok(VERIFY_WRITE, buf, msglen)) 276 - return -EINVAL; 277 - 278 - if (copy_to_user(buf, msg, msglen)) 279 - return -EFAULT; 280 - 281 - if (ppos) 282 - *ppos = msglen; 283 - return msglen; 268 + return simple_read_from_buffer(buf, count, ppos, msg, strlen(msg)); 284 269 } 285 270 286 271 /* constructor for flash_block_cache */ ··· 379 394 char msg[RTAS_MSG_MAXLEN]; 380 395 int msglen; 381 396 382 - args_buf = (struct rtas_manage_flash_t *) dp->data; 397 + args_buf = dp->data; 383 398 if (args_buf == NULL) 384 399 return 0; 385 400 386 401 msglen = sprintf(msg, "%d\n", args_buf->status); 387 - if (msglen > count) 388 - msglen = count; 389 402 390 - if (ppos && *ppos != 0) 391 - return 0; /* be cheap */ 392 - 393 - if (!access_ok(VERIFY_WRITE, buf, msglen)) 394 - return -EINVAL; 395 - 396 - if (copy_to_user(buf, msg, msglen)) 397 - return -EFAULT; 398 - 399 - if (ppos) 400 - *ppos = msglen; 401 - return msglen; 403 + return simple_read_from_buffer(buf, count, ppos, msg, msglen); 402 404 } 403 405 404 406 static ssize_t manage_flash_write(struct file *file, const char __user *buf, ··· 467 495 char msg[RTAS_MSG_MAXLEN]; 468 496 int msglen; 469 497 470 - args_buf = (struct rtas_validate_flash_t *) dp->data; 498 + args_buf = dp->data; 471 499 472 - if (ppos && *ppos != 0) 473 - return 0; /* be cheap */ 474 - 475 500 msglen = get_validate_flash_msg(args_buf, msg); 476 - if (msglen > count) 477 - msglen = count; 478 501 479 - if (!access_ok(VERIFY_WRITE, buf, msglen)) 480 - return -EINVAL; 481 - 482 - if (copy_to_user(buf, msg, msglen)) 483 - return -EFAULT; 484 - 485 - if (ppos) 486 - *ppos = msglen; 487 - return msglen; 502 + return simple_read_from_buffer(buf, count, ppos, msg, msglen); 488 503 } 489 504 490 505 static ssize_t validate_flash_write(struct file *file, const char __user *buf,
+1 -1
arch/powerpc/kernel/rtasd.c
··· 160 160 /* rtas fixed header */ 161 161 len = 8; 162 162 err = (struct rtas_error_log *)buf; 163 - if (err->extended_log_length) { 163 + if (err->extended && err->extended_log_length) { 164 164 165 165 /* extended header */ 166 166 len += err->extended_log_length;
+20 -5
arch/powerpc/kernel/time.c
··· 265 265 { 266 266 u64 sst, ust; 267 267 268 - sst = scan_dispatch_log(get_paca()->starttime_user); 269 - ust = scan_dispatch_log(get_paca()->starttime); 270 - get_paca()->system_time -= sst; 271 - get_paca()->user_time -= ust; 272 - get_paca()->stolen_time += ust + sst; 268 + u8 save_soft_enabled = local_paca->soft_enabled; 269 + u8 save_hard_enabled = local_paca->hard_enabled; 270 + 271 + /* We are called early in the exception entry, before 272 + * soft/hard_enabled are sync'ed to the expected state 273 + * for the exception. We are hard disabled but the PACA 274 + * needs to reflect that so various debug stuff doesn't 275 + * complain 276 + */ 277 + local_paca->soft_enabled = 0; 278 + local_paca->hard_enabled = 0; 279 + 280 + sst = scan_dispatch_log(local_paca->starttime_user); 281 + ust = scan_dispatch_log(local_paca->starttime); 282 + local_paca->system_time -= sst; 283 + local_paca->user_time -= ust; 284 + local_paca->stolen_time += ust + sst; 285 + 286 + local_paca->soft_enabled = save_soft_enabled; 287 + local_paca->hard_enabled = save_hard_enabled; 273 288 } 274 289 275 290 static inline u64 calculate_stolen_time(u64 stop_tb)
+1 -11
arch/powerpc/kernel/traps.c
··· 626 626 if (recover > 0) 627 627 return; 628 628 629 - if (user_mode(regs)) { 630 - regs->msr |= MSR_RI; 631 - _exception(SIGBUS, regs, BUS_ADRERR, regs->nip); 632 - return; 633 - } 634 - 635 629 #if defined(CONFIG_8xx) && defined(CONFIG_PCI) 636 630 /* the qspan pci read routines can cause machine checks -- Cort 637 631 * ··· 637 643 return; 638 644 #endif 639 645 640 - if (debugger_fault_handler(regs)) { 641 - regs->msr |= MSR_RI; 646 + if (debugger_fault_handler(regs)) 642 647 return; 643 - } 644 648 645 649 if (check_io_access(regs)) 646 650 return; 647 651 648 - if (debugger_fault_handler(regs)) 649 - return; 650 652 die("Machine check", regs, SIGBUS); 651 653 652 654 /* Must die if the interrupt is not recoverable */
+19
arch/powerpc/lib/feature-fixups-test.S
··· 172 172 3: or 3,3,3 173 173 174 174 175 + #if 0 176 + /* Test that if we have a larger else case the assembler spots it and 177 + * reports an error. #if 0'ed so as not to break the build normally. 178 + */ 179 + ftr_fixup_test7: 180 + or 1,1,1 181 + BEGIN_FTR_SECTION 182 + or 2,2,2 183 + or 2,2,2 184 + or 2,2,2 185 + FTR_SECTION_ELSE 186 + or 3,3,3 187 + or 3,3,3 188 + or 3,3,3 189 + or 3,3,3 190 + ALT_FTR_SECTION_END(0, 1) 191 + or 1,1,1 192 + #endif 193 + 175 194 #define MAKE_MACRO_TEST(TYPE) \ 176 195 globl(ftr_fixup_test_ ##TYPE##_macros) \ 177 196 or 1,1,1; \
+2
arch/powerpc/platforms/83xx/mpc83xx.h
··· 35 35 36 36 /* system i/o configuration register high */ 37 37 #define MPC83XX_SICRH_OFFS 0x118 38 + #define MPC8308_SICRH_USB_MASK 0x000c0000 39 + #define MPC8308_SICRH_USB_ULPI 0x00040000 38 40 #define MPC834X_SICRH_USB_UTMI 0x00020000 39 41 #define MPC831X_SICRH_USB_MASK 0x000000e0 40 42 #define MPC831X_SICRH_USB_ULPI 0x000000a0
+16 -5
arch/powerpc/platforms/83xx/usb.c
··· 127 127 128 128 /* Configure clock */ 129 129 immr_node = of_get_parent(np); 130 - if (immr_node && of_device_is_compatible(immr_node, "fsl,mpc8315-immr")) 130 + if (immr_node && (of_device_is_compatible(immr_node, "fsl,mpc8315-immr") || 131 + of_device_is_compatible(immr_node, "fsl,mpc8308-immr"))) 131 132 clrsetbits_be32(immap + MPC83XX_SCCR_OFFS, 132 133 MPC8315_SCCR_USB_MASK, 133 134 MPC8315_SCCR_USB_DRCM_01); ··· 139 138 140 139 /* Configure pin mux for ULPI. There is no pin mux for UTMI */ 141 140 if (prop && !strcmp(prop, "ulpi")) { 142 - if (of_device_is_compatible(immr_node, "fsl,mpc8315-immr")) { 141 + if (of_device_is_compatible(immr_node, "fsl,mpc8308-immr")) { 142 + clrsetbits_be32(immap + MPC83XX_SICRH_OFFS, 143 + MPC8308_SICRH_USB_MASK, 144 + MPC8308_SICRH_USB_ULPI); 145 + } else if (of_device_is_compatible(immr_node, "fsl,mpc8315-immr")) { 143 146 clrsetbits_be32(immap + MPC83XX_SICRL_OFFS, 144 147 MPC8315_SICRL_USB_MASK, 145 148 MPC8315_SICRL_USB_ULPI); ··· 178 173 !strcmp(prop, "utmi"))) { 179 174 u32 refsel; 180 175 176 + if (of_device_is_compatible(immr_node, "fsl,mpc8308-immr")) 177 + goto out; 178 + 181 179 if (of_device_is_compatible(immr_node, "fsl,mpc8315-immr")) 182 180 refsel = CONTROL_REFSEL_24MHZ; 183 181 else ··· 194 186 temp = CONTROL_PHY_CLK_SEL_ULPI; 195 187 #ifdef CONFIG_USB_OTG 196 188 /* Set OTG_PORT */ 197 - dr_mode = of_get_property(np, "dr_mode", NULL); 198 - if (dr_mode && !strcmp(dr_mode, "otg")) 199 - temp |= CONTROL_OTG_PORT; 189 + if (!of_device_is_compatible(immr_node, "fsl,mpc8308-immr")) { 190 + dr_mode = of_get_property(np, "dr_mode", NULL); 191 + if (dr_mode && !strcmp(dr_mode, "otg")) 192 + temp |= CONTROL_OTG_PORT; 193 + } 200 194 #endif /* CONFIG_USB_OTG */ 201 195 out_be32(usb_regs + FSL_USB2_CONTROL_OFFS, temp); 202 196 } else { ··· 206 196 ret = -EINVAL; 207 197 } 208 198 199 + out: 209 200 iounmap(usb_regs); 210 201 of_node_put(np); 211 202 return ret;
+3 -17
arch/powerpc/platforms/cell/cpufreq_spudemand.c
··· 39 39 }; 40 40 static DEFINE_PER_CPU(struct spu_gov_info_struct, spu_gov_info); 41 41 42 - static struct workqueue_struct *kspugov_wq; 43 - 44 42 static int calc_freq(struct spu_gov_info_struct *info) 45 43 { 46 44 int cpu; ··· 69 71 __cpufreq_driver_target(info->policy, target_freq, CPUFREQ_RELATION_H); 70 72 71 73 delay = usecs_to_jiffies(info->poll_int); 72 - queue_delayed_work_on(info->policy->cpu, kspugov_wq, &info->work, delay); 74 + schedule_delayed_work_on(info->policy->cpu, &info->work, delay); 73 75 } 74 76 75 77 static void spu_gov_init_work(struct spu_gov_info_struct *info) 76 78 { 77 79 int delay = usecs_to_jiffies(info->poll_int); 78 80 INIT_DELAYED_WORK_DEFERRABLE(&info->work, spu_gov_work); 79 - queue_delayed_work_on(info->policy->cpu, kspugov_wq, &info->work, delay); 81 + schedule_delayed_work_on(info->policy->cpu, &info->work, delay); 80 82 } 81 83 82 84 static void spu_gov_cancel_work(struct spu_gov_info_struct *info) ··· 150 152 { 151 153 int ret; 152 154 153 - kspugov_wq = create_workqueue("kspugov"); 154 - if (!kspugov_wq) { 155 - printk(KERN_ERR "creation of kspugov failed\n"); 156 - ret = -EFAULT; 157 - goto out; 158 - } 159 - 160 155 ret = cpufreq_register_governor(&spu_governor); 161 - if (ret) { 156 + if (ret) 162 157 printk(KERN_ERR "registration of governor failed\n"); 163 - destroy_workqueue(kspugov_wq); 164 - goto out; 165 - } 166 - out: 167 158 return ret; 168 159 } 169 160 170 161 static void __exit spu_gov_exit(void) 171 162 { 172 163 cpufreq_unregister_governor(&spu_governor); 173 - destroy_workqueue(kspugov_wq); 174 164 } 175 165 176 166
-5
arch/powerpc/platforms/cell/qpace_setup.c
··· 145 145 .calibrate_decr = generic_calibrate_decr, 146 146 .progress = qpace_progress, 147 147 .init_IRQ = iic_init_IRQ, 148 - #ifdef CONFIG_KEXEC 149 - .machine_kexec = default_machine_kexec, 150 - .machine_kexec_prepare = default_machine_kexec_prepare, 151 - .machine_crash_shutdown = default_machine_crash_shutdown, 152 - #endif 153 148 };
+70
arch/powerpc/platforms/cell/spu_base.c
··· 37 37 #include <asm/spu_csa.h> 38 38 #include <asm/xmon.h> 39 39 #include <asm/prom.h> 40 + #include <asm/kexec.h> 40 41 41 42 const struct spu_management_ops *spu_management_ops; 42 43 EXPORT_SYMBOL_GPL(spu_management_ops); ··· 727 726 } 728 727 729 728 static SYSDEV_ATTR(stat, 0644, spu_stat_show, NULL); 729 + 730 + #ifdef CONFIG_KEXEC 731 + 732 + struct crash_spu_info { 733 + struct spu *spu; 734 + u32 saved_spu_runcntl_RW; 735 + u32 saved_spu_status_R; 736 + u32 saved_spu_npc_RW; 737 + u64 saved_mfc_sr1_RW; 738 + u64 saved_mfc_dar; 739 + u64 saved_mfc_dsisr; 740 + }; 741 + 742 + #define CRASH_NUM_SPUS 16 /* Enough for current hardware */ 743 + static struct crash_spu_info crash_spu_info[CRASH_NUM_SPUS]; 744 + 745 + static void crash_kexec_stop_spus(void) 746 + { 747 + struct spu *spu; 748 + int i; 749 + u64 tmp; 750 + 751 + for (i = 0; i < CRASH_NUM_SPUS; i++) { 752 + if (!crash_spu_info[i].spu) 753 + continue; 754 + 755 + spu = crash_spu_info[i].spu; 756 + 757 + crash_spu_info[i].saved_spu_runcntl_RW = 758 + in_be32(&spu->problem->spu_runcntl_RW); 759 + crash_spu_info[i].saved_spu_status_R = 760 + in_be32(&spu->problem->spu_status_R); 761 + crash_spu_info[i].saved_spu_npc_RW = 762 + in_be32(&spu->problem->spu_npc_RW); 763 + 764 + crash_spu_info[i].saved_mfc_dar = spu_mfc_dar_get(spu); 765 + crash_spu_info[i].saved_mfc_dsisr = spu_mfc_dsisr_get(spu); 766 + tmp = spu_mfc_sr1_get(spu); 767 + crash_spu_info[i].saved_mfc_sr1_RW = tmp; 768 + 769 + tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; 770 + spu_mfc_sr1_set(spu, tmp); 771 + 772 + __delay(200); 773 + } 774 + } 775 + 776 + static void crash_register_spus(struct list_head *list) 777 + { 778 + struct spu *spu; 779 + int ret; 780 + 781 + list_for_each_entry(spu, list, full_list) { 782 + if (WARN_ON(spu->number >= CRASH_NUM_SPUS)) 783 + continue; 784 + 785 + crash_spu_info[spu->number].spu = spu; 786 + } 787 + 788 + ret = crash_shutdown_register(&crash_kexec_stop_spus); 789 + if (ret) 790 + printk(KERN_ERR "Could not register SPU crash handler"); 791 + } 792 + 793 + #else 794 + static inline void crash_register_spus(struct list_head *list) 795 + { 796 + } 797 + #endif 730 798 731 799 static int __init init_spu_base(void) 732 800 {
+7 -20
arch/powerpc/platforms/cell/spufs/file.c
··· 219 219 loff_t pos = *ppos; 220 220 int ret; 221 221 222 - if (pos < 0) 223 - return -EINVAL; 224 222 if (pos > LS_SIZE) 225 223 return -EFBIG; 226 - if (size > LS_SIZE - pos) 227 - size = LS_SIZE - pos; 228 224 229 225 ret = spu_acquire(ctx); 230 226 if (ret) 231 227 return ret; 232 228 233 229 local_store = ctx->ops->get_ls(ctx); 234 - ret = copy_from_user(local_store + pos, buffer, size); 230 + size = simple_write_to_buffer(local_store, LS_SIZE, ppos, buffer, size); 235 231 spu_release(ctx); 236 232 237 - if (ret) 238 - return -EFAULT; 239 - *ppos = pos + size; 240 233 return size; 241 234 } 242 235 ··· 567 574 if (*pos >= sizeof(lscsa->gprs)) 568 575 return -EFBIG; 569 576 570 - size = min_t(ssize_t, sizeof(lscsa->gprs) - *pos, size); 571 - *pos += size; 572 - 573 577 ret = spu_acquire_saved(ctx); 574 578 if (ret) 575 579 return ret; 576 580 577 - ret = copy_from_user((char *)lscsa->gprs + *pos - size, 578 - buffer, size) ? -EFAULT : size; 581 + size = simple_write_to_buffer(lscsa->gprs, sizeof(lscsa->gprs), pos, 582 + buffer, size); 579 583 580 584 spu_release_saved(ctx); 581 - return ret; 585 + return size; 582 586 } 583 587 584 588 static const struct file_operations spufs_regs_fops = { ··· 620 630 if (*pos >= sizeof(lscsa->fpcr)) 621 631 return -EFBIG; 622 632 623 - size = min_t(ssize_t, sizeof(lscsa->fpcr) - *pos, size); 624 - 625 633 ret = spu_acquire_saved(ctx); 626 634 if (ret) 627 635 return ret; 628 636 629 - *pos += size; 630 - ret = copy_from_user((char *)&lscsa->fpcr + *pos - size, 631 - buffer, size) ? -EFAULT : size; 637 + size = simple_write_to_buffer(&lscsa->fpcr, sizeof(lscsa->fpcr), pos, 638 + buffer, size); 632 639 633 640 spu_release_saved(ctx); 634 - return ret; 641 + return size; 635 642 } 636 643 637 644 static const struct file_operations spufs_fpcr_fops = {
-11
arch/powerpc/platforms/embedded6xx/gamecube.c
··· 75 75 flipper_quiesce(); 76 76 } 77 77 78 - #ifdef CONFIG_KEXEC 79 - static int gamecube_kexec_prepare(struct kimage *image) 80 - { 81 - return 0; 82 - } 83 - #endif /* CONFIG_KEXEC */ 84 - 85 - 86 78 define_machine(gamecube) { 87 79 .name = "gamecube", 88 80 .probe = gamecube_probe, ··· 87 95 .calibrate_decr = generic_calibrate_decr, 88 96 .progress = udbg_progress, 89 97 .machine_shutdown = gamecube_shutdown, 90 - #ifdef CONFIG_KEXEC 91 - .machine_kexec_prepare = gamecube_kexec_prepare, 92 - #endif 93 98 }; 94 99 95 100
-11
arch/powerpc/platforms/embedded6xx/wii.c
··· 18 18 #include <linux/init.h> 19 19 #include <linux/irq.h> 20 20 #include <linux/seq_file.h> 21 - #include <linux/kexec.h> 22 21 #include <linux/of_platform.h> 23 22 #include <linux/memblock.h> 24 23 #include <mm/mmu_decl.h> ··· 225 226 flipper_quiesce(); 226 227 } 227 228 228 - #ifdef CONFIG_KEXEC 229 - static int wii_machine_kexec_prepare(struct kimage *image) 230 - { 231 - return 0; 232 - } 233 - #endif /* CONFIG_KEXEC */ 234 - 235 229 define_machine(wii) { 236 230 .name = "wii", 237 231 .probe = wii_probe, ··· 238 246 .calibrate_decr = generic_calibrate_decr, 239 247 .progress = udbg_progress, 240 248 .machine_shutdown = wii_shutdown, 241 - #ifdef CONFIG_KEXEC 242 - .machine_kexec_prepare = wii_machine_kexec_prepare, 243 - #endif 244 249 }; 245 250 246 251 static struct of_device_id wii_of_bus[] = {
-10
arch/powerpc/platforms/pseries/kexec.c
··· 61 61 { 62 62 ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_xics; 63 63 } 64 - 65 - static int __init pseries_kexec_setup(void) 66 - { 67 - ppc_md.machine_kexec = default_machine_kexec; 68 - ppc_md.machine_kexec_prepare = default_machine_kexec_prepare; 69 - ppc_md.machine_crash_shutdown = default_machine_crash_shutdown; 70 - 71 - return 0; 72 - } 73 - machine_device_initcall(pseries, pseries_kexec_setup);
+70 -34
arch/powerpc/platforms/pseries/ras.c
··· 54 54 static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX]; 55 55 static DEFINE_SPINLOCK(ras_log_buf_lock); 56 56 57 - static char mce_data_buf[RTAS_ERROR_LOG_MAX]; 57 + static char global_mce_data_buf[RTAS_ERROR_LOG_MAX]; 58 + static DEFINE_PER_CPU(__u64, mce_data_buf); 58 59 59 60 static int ras_get_sensor_state_token; 60 61 static int ras_check_exception_token; ··· 197 196 return IRQ_HANDLED; 198 197 } 199 198 200 - /* Get the error information for errors coming through the 199 + /* 200 + * Some versions of FWNMI place the buffer inside the 4kB page starting at 201 + * 0x7000. Other versions place it inside the rtas buffer. We check both. 202 + */ 203 + #define VALID_FWNMI_BUFFER(A) \ 204 + ((((A) >= 0x7000) && ((A) < 0x7ff0)) || \ 205 + (((A) >= rtas.base) && ((A) < (rtas.base + rtas.size - 16)))) 206 + 207 + /* 208 + * Get the error information for errors coming through the 201 209 * FWNMI vectors. The pt_regs' r3 will be updated to reflect 202 210 * the actual r3 if possible, and a ptr to the error log entry 203 211 * will be returned if found. 204 212 * 205 - * The mce_data_buf does not have any locks or protection around it, 213 + * If the RTAS error is not of the extended type, then we put it in a per 214 + * cpu 64bit buffer. If it is the extended type we use global_mce_data_buf. 215 + * 216 + * The global_mce_data_buf does not have any locks or protection around it, 206 217 * if a second machine check comes in, or a system reset is done 207 218 * before we have logged the error, then we will get corruption in the 208 219 * error log. This is preferable over holding off on calling ··· 223 210 */ 224 211 static struct rtas_error_log *fwnmi_get_errinfo(struct pt_regs *regs) 225 212 { 226 - unsigned long errdata = regs->gpr[3]; 227 - struct rtas_error_log *errhdr = NULL; 228 213 unsigned long *savep; 214 + struct rtas_error_log *h, *errhdr = NULL; 229 215 230 - if ((errdata >= 0x7000 && errdata < 0x7fff0) || 231 - (errdata >= rtas.base && errdata < rtas.base + rtas.size - 16)) { 232 - savep = __va(errdata); 233 - regs->gpr[3] = savep[0]; /* restore original r3 */ 234 - memset(mce_data_buf, 0, RTAS_ERROR_LOG_MAX); 235 - memcpy(mce_data_buf, (char *)(savep + 1), RTAS_ERROR_LOG_MAX); 236 - errhdr = (struct rtas_error_log *)mce_data_buf; 237 - } else { 238 - printk("FWNMI: corrupt r3\n"); 216 + if (!VALID_FWNMI_BUFFER(regs->gpr[3])) { 217 + printk(KERN_ERR "FWNMI: corrupt r3\n"); 218 + return NULL; 239 219 } 220 + 221 + savep = __va(regs->gpr[3]); 222 + regs->gpr[3] = savep[0]; /* restore original r3 */ 223 + 224 + /* If it isn't an extended log we can use the per cpu 64bit buffer */ 225 + h = (struct rtas_error_log *)&savep[1]; 226 + if (!h->extended) { 227 + memcpy(&__get_cpu_var(mce_data_buf), h, sizeof(__u64)); 228 + errhdr = (struct rtas_error_log *)&__get_cpu_var(mce_data_buf); 229 + } else { 230 + int len; 231 + 232 + len = max_t(int, 8+h->extended_log_length, RTAS_ERROR_LOG_MAX); 233 + memset(global_mce_data_buf, 0, RTAS_ERROR_LOG_MAX); 234 + memcpy(global_mce_data_buf, h, len); 235 + errhdr = (struct rtas_error_log *)global_mce_data_buf; 236 + } 237 + 240 238 return errhdr; 241 239 } 242 240 ··· 259 235 { 260 236 int ret = rtas_call(rtas_token("ibm,nmi-interlock"), 0, 1, NULL); 261 237 if (ret != 0) 262 - printk("FWNMI: nmi-interlock failed: %d\n", ret); 238 + printk(KERN_ERR "FWNMI: nmi-interlock failed: %d\n", ret); 263 239 } 264 240 265 241 int pSeries_system_reset_exception(struct pt_regs *regs) ··· 283 259 * Return 1 if corrected (or delivered a signal). 284 260 * Return 0 if there is nothing we can do. 285 261 */ 286 - static int recover_mce(struct pt_regs *regs, struct rtas_error_log * err) 262 + static int recover_mce(struct pt_regs *regs, struct rtas_error_log *err) 287 263 { 288 - int nonfatal = 0; 264 + int recovered = 0; 289 265 290 - if (err->disposition == RTAS_DISP_FULLY_RECOVERED) { 266 + if (!(regs->msr & MSR_RI)) { 267 + /* If MSR_RI isn't set, we cannot recover */ 268 + recovered = 0; 269 + 270 + } else if (err->disposition == RTAS_DISP_FULLY_RECOVERED) { 291 271 /* Platform corrected itself */ 292 - nonfatal = 1; 293 - } else if ((regs->msr & MSR_RI) && 294 - user_mode(regs) && 295 - err->severity == RTAS_SEVERITY_ERROR_SYNC && 296 - err->disposition == RTAS_DISP_NOT_RECOVERED && 297 - err->target == RTAS_TARGET_MEMORY && 298 - err->type == RTAS_TYPE_ECC_UNCORR && 299 - !(current->pid == 0 || is_global_init(current))) { 300 - /* Kill off a user process with an ECC error */ 301 - printk(KERN_ERR "MCE: uncorrectable ecc error for pid %d\n", 302 - current->pid); 303 - /* XXX something better for ECC error? */ 304 - _exception(SIGBUS, regs, BUS_ADRERR, regs->nip); 305 - nonfatal = 1; 272 + recovered = 1; 273 + 274 + } else if (err->disposition == RTAS_DISP_LIMITED_RECOVERY) { 275 + /* Platform corrected itself but could be degraded */ 276 + printk(KERN_ERR "MCE: limited recovery, system may " 277 + "be degraded\n"); 278 + recovered = 1; 279 + 280 + } else if (user_mode(regs) && !is_global_init(current) && 281 + err->severity == RTAS_SEVERITY_ERROR_SYNC) { 282 + 283 + /* 284 + * If we received a synchronous error when in userspace 285 + * kill the task. Firmware may report details of the fail 286 + * asynchronously, so we can't rely on the target and type 287 + * fields being valid here. 288 + */ 289 + printk(KERN_ERR "MCE: uncorrectable error, killing task " 290 + "%s:%d\n", current->comm, current->pid); 291 + 292 + _exception(SIGBUS, regs, BUS_MCEERR_AR, regs->nip); 293 + recovered = 1; 306 294 } 307 295 308 - log_error((char *)err, ERR_TYPE_RTAS_LOG, !nonfatal); 296 + log_error((char *)err, ERR_TYPE_RTAS_LOG, 0); 309 297 310 - return nonfatal; 298 + return recovered; 311 299 } 312 300 313 301 /*
-2
arch/powerpc/sysdev/fsl_rio.c
··· 1555 1555 saved_mcheck_exception = ppc_md.machine_check_exception; 1556 1556 ppc_md.machine_check_exception = fsl_rio_mcheck_exception; 1557 1557 #endif 1558 - /* Ensure that RFXE is set */ 1559 - mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000)); 1560 1558 1561 1559 return 0; 1562 1560 err:
+4 -2
arch/powerpc/sysdev/mpic.c
··· 674 674 /* make sure mask gets to controller before we return to user */ 675 675 do { 676 676 if (!loops--) { 677 - printk(KERN_ERR "mpic_enable_irq timeout\n"); 677 + printk(KERN_ERR "%s: timeout on hwirq %u\n", 678 + __func__, src); 678 679 break; 679 680 } 680 681 } while(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK); ··· 696 695 /* make sure mask gets to controller before we return to user */ 697 696 do { 698 697 if (!loops--) { 699 - printk(KERN_ERR "mpic_enable_irq timeout\n"); 698 + printk(KERN_ERR "%s: timeout on hwirq %u\n", 699 + __func__, src); 700 700 break; 701 701 } 702 702 } while(!(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK));
+2 -2
drivers/macintosh/therm_pm72.c
··· 443 443 tries = 0; 444 444 for (;;) { 445 445 nr = i2c_master_recv(fcu, buf, nb); 446 - if (nr > 0 || (nr < 0 && nr != ENODEV) || tries >= 100) 446 + if (nr > 0 || (nr < 0 && nr != -ENODEV) || tries >= 100) 447 447 break; 448 448 msleep(10); 449 449 ++tries; ··· 464 464 tries = 0; 465 465 for (;;) { 466 466 nw = i2c_master_send(fcu, buf, nb); 467 - if (nw > 0 || (nw < 0 && nw != EIO) || tries >= 100) 467 + if (nw > 0 || (nw < 0 && nw != -EIO) || tries >= 100) 468 468 break; 469 469 msleep(10); 470 470 ++tries;