tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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cxl/pci: Remove duplicate host_bridge->native_aer checking

cxl_dport_init_ras_reporting() already checks host_bridge->native_aer
before invoking cxl_disable_rch_root_ints(), so
cxl_disable_rch_root_ints() does not need to check it again.

Signed-off-by: Li Ming <ming4.li@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://patch.msgid.link/20240830061308.2327065-3-ming4.li@intel.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>

authored by

Li Ming and committed by
Dave Jiang d75ccd4f c8706cc1

+6 -11
+6 -11
drivers/cxl/core/pci.c
··· 800 800 static void cxl_disable_rch_root_ints(struct cxl_dport *dport) 801 801 { 802 802 void __iomem *aer_base = dport->regs.dport_aer; 803 - struct pci_host_bridge *bridge; 804 803 u32 aer_cmd_mask, aer_cmd; 805 804 806 805 if (!aer_base) 807 806 return; 808 - 809 - bridge = to_pci_host_bridge(dport->dport_dev); 810 807 811 808 /* 812 809 * Disable RCH root port command interrupts. ··· 813 816 * the root cmd register's interrupts is required. But, PCI spec 814 817 * shows these are disabled by default on reset. 815 818 */ 816 - if (bridge->native_aer) { 817 - aer_cmd_mask = (PCI_ERR_ROOT_CMD_COR_EN | 818 - PCI_ERR_ROOT_CMD_NONFATAL_EN | 819 - PCI_ERR_ROOT_CMD_FATAL_EN); 820 - aer_cmd = readl(aer_base + PCI_ERR_ROOT_COMMAND); 821 - aer_cmd &= ~aer_cmd_mask; 822 - writel(aer_cmd, aer_base + PCI_ERR_ROOT_COMMAND); 823 - } 819 + aer_cmd_mask = (PCI_ERR_ROOT_CMD_COR_EN | 820 + PCI_ERR_ROOT_CMD_NONFATAL_EN | 821 + PCI_ERR_ROOT_CMD_FATAL_EN); 822 + aer_cmd = readl(aer_base + PCI_ERR_ROOT_COMMAND); 823 + aer_cmd &= ~aer_cmd_mask; 824 + writel(aer_cmd, aer_base + PCI_ERR_ROOT_COMMAND); 824 825 } 825 826 826 827 /**