tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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ASoC: es8328: error handling and resume fixes

Merge series from Hsieh Hung-En <hungen3108@gmail.com>:

This series fixes some issues and improves robustness in the es8328
driver.

Mark Brown d83039b5 0f625fc2

+73 -43
+73 -43
sound/soc/codecs/es8328.c
··· 163 163 if (es8328->deemph == deemph) 164 164 return 0; 165 165 166 + es8328->deemph = deemph; 166 167 ret = es8328_set_deemph(component); 167 168 if (ret < 0) 168 169 return ret; 169 - 170 - es8328->deemph = deemph; 171 170 172 171 return 1; 173 172 } ··· 529 530 return ret; 530 531 531 532 es8328->playback_fs = params_rate(params); 532 - es8328_set_deemph(component); 533 + ret = es8328_set_deemph(component); 534 + if (ret < 0) 535 + return ret; 533 536 } else { 534 537 ret = snd_soc_component_update_bits(component, ES8328_ADCCONTROL4, 535 538 ES8328_ADCCONTROL4_ADCWL_MASK, ··· 592 591 { 593 592 struct snd_soc_component *component = codec_dai->component; 594 593 struct es8328_priv *es8328 = snd_soc_component_get_drvdata(component); 594 + int ret; 595 595 u8 dac_mode = 0; 596 596 u8 adc_mode = 0; 597 597 598 598 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) { 599 599 case SND_SOC_DAIFMT_CBP_CFP: 600 600 /* Master serial port mode, with BCLK generated automatically */ 601 - snd_soc_component_update_bits(component, ES8328_MASTERMODE, 602 - ES8328_MASTERMODE_MSC, 603 - ES8328_MASTERMODE_MSC); 601 + ret = snd_soc_component_update_bits(component, ES8328_MASTERMODE, 602 + ES8328_MASTERMODE_MSC, 603 + ES8328_MASTERMODE_MSC); 604 + if (ret < 0) 605 + return ret; 604 606 es8328->provider = true; 605 607 break; 606 608 case SND_SOC_DAIFMT_CBC_CFC: 607 609 /* Slave serial port mode */ 608 - snd_soc_component_update_bits(component, ES8328_MASTERMODE, 609 - ES8328_MASTERMODE_MSC, 0); 610 + ret = snd_soc_component_update_bits(component, ES8328_MASTERMODE, 611 + ES8328_MASTERMODE_MSC, 0); 612 + if (ret < 0) 613 + return ret; 610 614 es8328->provider = false; 611 615 break; 612 616 default: ··· 640 634 if ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_NB_NF) 641 635 return -EINVAL; 642 636 643 - snd_soc_component_update_bits(component, ES8328_DACCONTROL1, 644 - ES8328_DACCONTROL1_DACFORMAT_MASK, dac_mode); 645 - snd_soc_component_update_bits(component, ES8328_ADCCONTROL4, 646 - ES8328_ADCCONTROL4_ADCFORMAT_MASK, adc_mode); 637 + ret = snd_soc_component_update_bits(component, ES8328_DACCONTROL1, 638 + ES8328_DACCONTROL1_DACFORMAT_MASK, 639 + dac_mode); 640 + if (ret < 0) 641 + return ret; 642 + 643 + ret = snd_soc_component_update_bits(component, ES8328_ADCCONTROL4, 644 + ES8328_ADCCONTROL4_ADCFORMAT_MASK, 645 + adc_mode); 646 + if (ret < 0) 647 + return ret; 647 648 648 649 return 0; 649 650 } ··· 659 646 enum snd_soc_bias_level level) 660 647 { 661 648 struct snd_soc_dapm_context *dapm = snd_soc_component_to_dapm(component); 649 + int ret; 662 650 663 651 switch (level) { 664 652 case SND_SOC_BIAS_ON: ··· 667 653 668 654 case SND_SOC_BIAS_PREPARE: 669 655 /* VREF, VMID=2x50k, digital enabled */ 670 - snd_soc_component_write(component, ES8328_CHIPPOWER, 0); 671 - snd_soc_component_update_bits(component, ES8328_CONTROL1, 672 - ES8328_CONTROL1_VMIDSEL_MASK | 673 - ES8328_CONTROL1_ENREF, 674 - ES8328_CONTROL1_VMIDSEL_50k | 675 - ES8328_CONTROL1_ENREF); 656 + ret = snd_soc_component_write(component, ES8328_CHIPPOWER, 0); 657 + if (ret < 0) 658 + return ret; 659 + 660 + ret = snd_soc_component_update_bits(component, ES8328_CONTROL1, 661 + ES8328_CONTROL1_VMIDSEL_MASK | 662 + ES8328_CONTROL1_ENREF, 663 + ES8328_CONTROL1_VMIDSEL_50k | 664 + ES8328_CONTROL1_ENREF); 665 + if (ret < 0) 666 + return ret; 676 667 break; 677 668 678 669 case SND_SOC_BIAS_STANDBY: 679 670 if (snd_soc_dapm_get_bias_level(dapm) == SND_SOC_BIAS_OFF) { 680 - snd_soc_component_update_bits(component, ES8328_CONTROL1, 681 - ES8328_CONTROL1_VMIDSEL_MASK | 682 - ES8328_CONTROL1_ENREF, 683 - ES8328_CONTROL1_VMIDSEL_5k | 684 - ES8328_CONTROL1_ENREF); 671 + ret = snd_soc_component_update_bits(component, ES8328_CONTROL1, 672 + ES8328_CONTROL1_VMIDSEL_MASK | 673 + ES8328_CONTROL1_ENREF, 674 + ES8328_CONTROL1_VMIDSEL_5k | 675 + ES8328_CONTROL1_ENREF); 676 + if (ret < 0) 677 + return ret; 685 678 686 679 /* Charge caps */ 687 680 msleep(100); 688 681 } 689 682 690 - snd_soc_component_write(component, ES8328_CONTROL2, 691 - ES8328_CONTROL2_OVERCURRENT_ON | 692 - ES8328_CONTROL2_THERMAL_SHUTDOWN_ON); 683 + ret = snd_soc_component_write(component, ES8328_CONTROL2, 684 + ES8328_CONTROL2_OVERCURRENT_ON | 685 + ES8328_CONTROL2_THERMAL_SHUTDOWN_ON); 686 + if (ret < 0) 687 + return ret; 693 688 694 689 /* VREF, VMID=2*500k, digital stopped */ 695 - snd_soc_component_update_bits(component, ES8328_CONTROL1, 696 - ES8328_CONTROL1_VMIDSEL_MASK | 697 - ES8328_CONTROL1_ENREF, 698 - ES8328_CONTROL1_VMIDSEL_500k | 699 - ES8328_CONTROL1_ENREF); 690 + ret = snd_soc_component_update_bits(component, ES8328_CONTROL1, 691 + ES8328_CONTROL1_VMIDSEL_MASK | 692 + ES8328_CONTROL1_ENREF, 693 + ES8328_CONTROL1_VMIDSEL_500k | 694 + ES8328_CONTROL1_ENREF); 695 + if (ret < 0) 696 + return ret; 700 697 break; 701 698 702 699 case SND_SOC_BIAS_OFF: 703 - snd_soc_component_update_bits(component, ES8328_CONTROL1, 704 - ES8328_CONTROL1_VMIDSEL_MASK | 705 - ES8328_CONTROL1_ENREF, 706 - 0); 700 + ret = snd_soc_component_update_bits(component, ES8328_CONTROL1, 701 + ES8328_CONTROL1_VMIDSEL_MASK | 702 + ES8328_CONTROL1_ENREF, 703 + 0); 704 + if (ret < 0) 705 + return ret; 707 706 break; 708 707 } 709 708 return 0; ··· 771 744 772 745 static int es8328_resume(struct snd_soc_component *component) 773 746 { 774 - struct regmap *regmap = dev_get_regmap(component->dev, NULL); 775 - struct es8328_priv *es8328; 747 + struct es8328_priv *es8328 = snd_soc_component_get_drvdata(component); 776 748 int ret; 777 - 778 - es8328 = snd_soc_component_get_drvdata(component); 779 749 780 750 ret = clk_prepare_enable(es8328->clk); 781 751 if (ret) { ··· 784 760 es8328->supplies); 785 761 if (ret) { 786 762 dev_err(component->dev, "unable to enable regulators\n"); 787 - return ret; 763 + goto err_clk; 788 764 } 789 765 790 - regcache_mark_dirty(regmap); 791 - ret = regcache_sync(regmap); 766 + regcache_mark_dirty(es8328->regmap); 767 + ret = regcache_sync(es8328->regmap); 792 768 if (ret) { 793 769 dev_err(component->dev, "unable to sync regcache\n"); 794 - return ret; 770 + goto err_regulators; 795 771 } 796 772 797 773 return 0; 774 + 775 + err_regulators: 776 + regulator_bulk_disable(ARRAY_SIZE(es8328->supplies), es8328->supplies); 777 + err_clk: 778 + clk_disable_unprepare(es8328->clk); 779 + return ret; 798 780 } 799 781 800 782 static int es8328_component_probe(struct snd_soc_component *component)