Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/msm: move msm_gpummu.c to adreno/a2xx_gpummu.c
The msm_gpummu.c implementation is used only on A2xx and it is tied to
the A2xx registers. Rename the source file accordingly.
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/585846/
Link: https://lore.kernel.org/r/20240401-fd-xml-shipped-v5-4-4bdb277a85a1@linaro.org
+31
-29
+1
-1
drivers/gpu/drm/msm/Makefile
+1
-1
drivers/gpu/drm/msm/Makefile
···
8
8
adreno/adreno_device.o \
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adreno/adreno_gpu.o \
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adreno/a2xx_gpu.o \
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+
adreno/a2xx_gpummu.o \
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adreno/a3xx_gpu.o \
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adreno/a4xx_gpu.o \
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adreno/a5xx_gpu.o \
···
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msm_ringbuffer.o \
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msm_submitqueue.o \
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msm_gpu_tracepoints.o \
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-
msm_gpummu.o
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msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \
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dp/dp_debug.o
+2
-2
drivers/gpu/drm/msm/adreno/a2xx_gpu.c
+2
-2
drivers/gpu/drm/msm/adreno/a2xx_gpu.c
···
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uint32_t *ptr, len;
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int i, ret;
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-
msm_gpummu_params(gpu->aspace->mmu, &pt_base, &tran_error);
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+
a2xx_gpummu_params(gpu->aspace->mmu, &pt_base, &tran_error);
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DBG("%s", gpu->name);
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···
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static struct msm_gem_address_space *
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a2xx_create_address_space(struct msm_gpu *gpu, struct platform_device *pdev)
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{
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-
struct msm_mmu *mmu = msm_gpummu_new(&pdev->dev, gpu);
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+
struct msm_mmu *mmu = a2xx_gpummu_new(&pdev->dev, gpu);
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struct msm_gem_address_space *aspace;
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aspace = msm_gem_address_space_create(mmu, "gpu", SZ_16M,
+4
drivers/gpu/drm/msm/adreno/a2xx_gpu.h
+4
drivers/gpu/drm/msm/adreno/a2xx_gpu.h
···
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};
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#define to_a2xx_gpu(x) container_of(x, struct a2xx_gpu, base)
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+
struct msm_mmu *a2xx_gpummu_new(struct device *dev, struct msm_gpu *gpu);
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void a2xx_gpummu_params(struct msm_mmu *mmu, dma_addr_t *pt_base,
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+
dma_addr_t *tran_error);
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+
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#endif /* __A2XX_GPU_H__ */
+24
-21
drivers/gpu/drm/msm/msm_gpummu.c
drivers/gpu/drm/msm/adreno/a2xx_gpummu.c
+24
-21
drivers/gpu/drm/msm/msm_gpummu.c
drivers/gpu/drm/msm/adreno/a2xx_gpummu.c
···
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6
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#include "msm_drv.h"
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#include "msm_mmu.h"
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-
#include "adreno/adreno_gpu.h"
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-
#include "adreno/a2xx.xml.h"
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8
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-
struct msm_gpummu {
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+
#include "adreno_gpu.h"
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#include "a2xx_gpu.h"
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+
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#include "a2xx.xml.h"
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+
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+
struct a2xx_gpummu {
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struct msm_mmu base;
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struct msm_gpu *gpu;
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dma_addr_t pt_base;
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uint32_t *table;
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};
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-
#define to_msm_gpummu(x) container_of(x, struct msm_gpummu, base)
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+
#define to_a2xx_gpummu(x) container_of(x, struct a2xx_gpummu, base)
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#define GPUMMU_VA_START SZ_16M
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#define GPUMMU_VA_RANGE (0xfff * SZ_64K)
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#define GPUMMU_PAGE_SIZE SZ_4K
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#define TABLE_SIZE (sizeof(uint32_t) * GPUMMU_VA_RANGE / GPUMMU_PAGE_SIZE)
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-
static void msm_gpummu_detach(struct msm_mmu *mmu)
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static void a2xx_gpummu_detach(struct msm_mmu *mmu)
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{
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}
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-
static int msm_gpummu_map(struct msm_mmu *mmu, uint64_t iova,
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+
static int a2xx_gpummu_map(struct msm_mmu *mmu, uint64_t iova,
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struct sg_table *sgt, size_t len, int prot)
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{
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-
struct msm_gpummu *gpummu = to_msm_gpummu(mmu);
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+
struct a2xx_gpummu *gpummu = to_a2xx_gpummu(mmu);
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unsigned idx = (iova - GPUMMU_VA_START) / GPUMMU_PAGE_SIZE;
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struct sg_dma_page_iter dma_iter;
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unsigned prot_bits = 0;
···
56
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return 0;
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}
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-
static int msm_gpummu_unmap(struct msm_mmu *mmu, uint64_t iova, size_t len)
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+
static int a2xx_gpummu_unmap(struct msm_mmu *mmu, uint64_t iova, size_t len)
60
57
{
61
-
struct msm_gpummu *gpummu = to_msm_gpummu(mmu);
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struct a2xx_gpummu *gpummu = to_a2xx_gpummu(mmu);
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unsigned idx = (iova - GPUMMU_VA_START) / GPUMMU_PAGE_SIZE;
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unsigned i;
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···
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return 0;
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}
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-
static void msm_gpummu_resume_translation(struct msm_mmu *mmu)
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static void a2xx_gpummu_resume_translation(struct msm_mmu *mmu)
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{
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}
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-
static void msm_gpummu_destroy(struct msm_mmu *mmu)
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static void a2xx_gpummu_destroy(struct msm_mmu *mmu)
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{
80
-
struct msm_gpummu *gpummu = to_msm_gpummu(mmu);
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struct a2xx_gpummu *gpummu = to_a2xx_gpummu(mmu);
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dma_free_attrs(mmu->dev, TABLE_SIZE, gpummu->table, gpummu->pt_base,
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DMA_ATTR_FORCE_CONTIGUOUS);
···
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}
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static const struct msm_mmu_funcs funcs = {
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.detach = msm_gpummu_detach,
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.map = msm_gpummu_map,
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-
.unmap = msm_gpummu_unmap,
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.destroy = msm_gpummu_destroy,
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.resume_translation = msm_gpummu_resume_translation,
86
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.detach = a2xx_gpummu_detach,
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.map = a2xx_gpummu_map,
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.unmap = a2xx_gpummu_unmap,
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.destroy = a2xx_gpummu_destroy,
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.resume_translation = a2xx_gpummu_resume_translation,
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};
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-
struct msm_mmu *msm_gpummu_new(struct device *dev, struct msm_gpu *gpu)
93
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struct msm_mmu *a2xx_gpummu_new(struct device *dev, struct msm_gpu *gpu)
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{
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-
struct msm_gpummu *gpummu;
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+
struct a2xx_gpummu *gpummu;
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gpummu = kzalloc(sizeof(*gpummu), GFP_KERNEL);
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if (!gpummu)
···
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return &gpummu->base;
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}
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-
void msm_gpummu_params(struct msm_mmu *mmu, dma_addr_t *pt_base,
114
+
void a2xx_gpummu_params(struct msm_mmu *mmu, dma_addr_t *pt_base,
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dma_addr_t *tran_error)
119
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{
120
-
dma_addr_t base = to_msm_gpummu(mmu)->pt_base;
117
+
dma_addr_t base = to_a2xx_gpummu(mmu)->pt_base;
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*pt_base = base;
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*tran_error = base + TABLE_SIZE; /* 32-byte aligned */
-5
drivers/gpu/drm/msm/msm_mmu.h
-5
drivers/gpu/drm/msm/msm_mmu.h
···
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struct msm_mmu *msm_iommu_new(struct device *dev, unsigned long quirks);
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struct msm_mmu *msm_iommu_gpu_new(struct device *dev, struct msm_gpu *gpu, unsigned long quirks);
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-
struct msm_mmu *msm_gpummu_new(struct device *dev, struct msm_gpu *gpu);
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static inline void msm_mmu_set_fault_handler(struct msm_mmu *mmu, void *arg,
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int (*handler)(void *arg, unsigned long iova, int flags, void *data))
···
51
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}
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struct msm_mmu *msm_iommu_pagetable_create(struct msm_mmu *parent);
54
-
55
-
void msm_gpummu_params(struct msm_mmu *mmu, dma_addr_t *pt_base,
56
-
dma_addr_t *tran_error);
57
-
58
55
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56
int msm_iommu_pagetable_params(struct msm_mmu *mmu, phys_addr_t *ttbr,
60
57
int *asid);