Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

Pull clk fixes from Stephen Boyd:
"A few clk driver fixes for the merge window to fix the build and boot
on some SoCs.

- Initialize struct clk_init_data in the TI da8xx-cfgchip driver so
that stack contents aren't used for things like clk flags leading
to unexpected behavior

- Don't leak stack contents in a debug print in the new Sophgo clk
driver

- Disable the new T-Head clk driver on 32-bit targets to fix the
build due to a division

- Fix Samsung Exynos4 fin_pll wreckage from the clkdev rework done
last cycle by using a struct clk_hw directly instead of a struct
clk consumer"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
clk: samsung: fix getting Exynos4 fin_pll rate from external clocks
clk: T-Head: Disable on 32-bit Targets
clk: sophgo: clk-sg2042-pll: Fix uninitialized variable in debug output
clk: davinci: da8xx-cfgchip: Initialize clk_init_data before use

Linus Torvalds 2 years ago de5f4fbe c85e1497

+11 -9

4 changed files

expand all

drivers

clk

davinci

da8xx-cfgchip.c

samsung

clk-exynos4.c

sophgo

clk-sg2042-pll.c

thead

Kconfig

+2 -2

drivers/clk/davinci/da8xx-cfgchip.c

··· 508 508 const char * const parent_names[] = { "usb_refclkin", "pll0_auxclk" }; 509 509 struct clk *fck_clk; 510 510 struct da8xx_usb0_clk48 *usb0; 511 - struct clk_init_data init; 511 + struct clk_init_data init = {}; 512 512 int ret; 513 513 514 514 fck_clk = devm_clk_get(dev, "fck"); ··· 583 583 { 584 584 const char * const parent_names[] = { "usb0_clk48", "usb_refclkin" }; 585 585 struct da8xx_usb1_clk48 *usb1; 586 - struct clk_init_data init; 586 + struct clk_init_data init = {}; 587 587 int ret; 588 588 589 589 usb1 = devm_kzalloc(dev, sizeof(*usb1), GFP_KERNEL);

+7 -6

drivers/clk/samsung/clk-exynos4.c

··· 1040 1040 static void __init exynos4_clk_register_finpll(struct samsung_clk_provider *ctx) 1041 1041 { 1042 1042 struct samsung_fixed_rate_clock fclk; 1043 - struct clk *clk; 1044 - unsigned long finpll_f = 24000000; 1043 + unsigned long finpll_f; 1044 + unsigned int parent; 1045 1045 char *parent_name; 1046 1046 unsigned int xom = exynos4_get_xom(); 1047 1047 1048 1048 parent_name = xom & 1 ? "xusbxti" : "xxti"; 1049 - clk = clk_get(NULL, parent_name); 1050 - if (IS_ERR(clk)) { 1049 + parent = xom & 1 ? CLK_XUSBXTI : CLK_XXTI; 1050 + 1051 + finpll_f = clk_hw_get_rate(ctx->clk_data.hws[parent]); 1052 + if (!finpll_f) { 1051 1053 pr_err("%s: failed to lookup parent clock %s, assuming " 1052 1054 "fin_pll clock frequency is 24MHz\n", __func__, 1053 1055 parent_name); 1054 - } else { 1055 - finpll_f = clk_get_rate(clk); 1056 + finpll_f = 24000000; 1056 1057 } 1057 1058 1058 1059 fclk.id = CLK_FIN_PLL;

+1 -1

drivers/clk/sophgo/clk-sg2042-pll.c

··· 387 387 struct sg2042_pll_clock *pll = to_sg2042_pll_clk(hw); 388 388 struct sg2042_pll_ctrl pctrl_table; 389 389 unsigned long flags; 390 - u32 value; 390 + u32 value = 0; 391 391 int ret; 392 392 393 393 spin_lock_irqsave(pll->lock, flags);

drivers/clk/thead/Kconfig

··· 3 3 config CLK_THEAD_TH1520_AP 4 4 bool "T-HEAD TH1520 AP clock support" 5 5 depends on ARCH_THEAD || COMPILE_TEST 6 + depends on 64BIT 6 7 default ARCH_THEAD 7 8 select REGMAP_MMIO 8 9 help

Configure Feed

Configure Feed