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crypto: starfive - Update hash module irq handling

Hash driver needs to check the value of irq mask register before writing
as it will mask irq of other modules.

Co-developed-by: Huan Feng <huan.feng@starfivetech.com>
Signed-off-by: Huan Feng <huan.feng@starfivetech.com>
Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

authored by

Jia Jie Ho and committed by
Herbert Xu
df12284a 1abc8966

+8 -1
+8 -1
drivers/crypto/starfive/jh7110-hash.c
··· 39 39 #define STARFIVE_HASH_SHAWKLEN (STARFIVE_HASH_REGS_OFFSET + 0x24) 40 40 41 41 #define STARFIVE_HASH_BUFLEN SHA512_BLOCK_SIZE 42 + #define STARFIVE_HASH_RESET 0x2 42 43 43 44 static inline int starfive_hash_wait_busy(struct starfive_cryp_ctx *ctx) 44 45 { ··· 96 95 struct starfive_cryp_dev *cryp = ctx->cryp; 97 96 union starfive_alg_cr alg_cr; 98 97 union starfive_hash_csr csr; 98 + u32 stat; 99 99 100 100 dma_unmap_sg(cryp->dev, rctx->in_sg, rctx->in_sg_len, DMA_TO_DEVICE); 101 101 ··· 109 107 csr.firstb = 0; 110 108 csr.final = 1; 111 109 112 - writel(~STARFIVE_IE_MASK_HASH_DONE, cryp->base + STARFIVE_IE_MASK_OFFSET); 110 + stat = readl(cryp->base + STARFIVE_IE_MASK_OFFSET); 111 + stat &= ~STARFIVE_IE_MASK_HASH_DONE; 112 + writel(stat, cryp->base + STARFIVE_IE_MASK_OFFSET); 113 113 writel(csr.v, cryp->base + STARFIVE_HASH_SHACSR); 114 114 } 115 115 ··· 226 222 227 223 if (!err) 228 224 err = starfive_hash_copy_hash(cryp->req.hreq); 225 + 226 + /* Reset to clear hash_done in irq register*/ 227 + writel(STARFIVE_HASH_RESET, cryp->base + STARFIVE_HASH_SHACSR); 229 228 230 229 crypto_finalize_hash_request(cryp->engine, cryp->req.hreq, err); 231 230 }