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clk: qcom: gpucc-sa8775p: Park RCG's clk source at XO during disable

The RCG's clk src has to be parked at XO while disabling as per the
HW recommendation, hence use clk_rcg2_shared_ops to achieve the same.
Also gpu_cc_cb_clk is recommended to be kept always ON, hence use
clk_branch2_aon_ops to keep the clock always ON.

Fixes: 0afa16afc36d ("clk: qcom: add the GPUCC driver for sa8775p")
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240612-sa8775p-v2-gcc-gpucc-fixes-v2-5-adcc756a23df@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

authored by

Taniya Das and committed by
Bjorn Andersson
dff68b2f e69386d4

+4 -4
+4 -4
drivers/clk/qcom/gpucc-sa8775p.c
··· 161 161 .name = "gpu_cc_ff_clk_src", 162 162 .parent_data = gpu_cc_parent_data_0, 163 163 .num_parents = ARRAY_SIZE(gpu_cc_parent_data_0), 164 - .ops = &clk_rcg2_ops, 164 + .ops = &clk_rcg2_shared_ops, 165 165 }, 166 166 }; 167 167 ··· 181 181 .parent_data = gpu_cc_parent_data_1, 182 182 .num_parents = ARRAY_SIZE(gpu_cc_parent_data_1), 183 183 .flags = CLK_SET_RATE_PARENT, 184 - .ops = &clk_rcg2_ops, 184 + .ops = &clk_rcg2_shared_ops, 185 185 }, 186 186 }; 187 187 ··· 200 200 .name = "gpu_cc_hub_clk_src", 201 201 .parent_data = gpu_cc_parent_data_2, 202 202 .num_parents = ARRAY_SIZE(gpu_cc_parent_data_2), 203 - .ops = &clk_rcg2_ops, 203 + .ops = &clk_rcg2_shared_ops, 204 204 }, 205 205 }; 206 206 ··· 294 294 .enable_mask = BIT(0), 295 295 .hw.init = &(const struct clk_init_data){ 296 296 .name = "gpu_cc_cb_clk", 297 - .ops = &clk_branch2_ops, 297 + .ops = &clk_branch2_aon_ops, 298 298 }, 299 299 }, 300 300 };