Merge tag 'devicetree-for-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

+53

Documentation/devicetree/bindings/arm/arm,vexpress-scc.yaml

··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/arm/arm,vexpress-scc.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: ARM Versatile Express Serial Configuration Controller 8 + 9 + maintainers: 10 + - Liviu Dudau <liviu.dudau@arm.com> 11 + - Sudeep Holla <sudeep.holla@arm.com> 12 + 13 + description: | 14 + Test chips for ARM Versatile Express platform implement SCC (Serial 15 + Configuration Controller) interface, used to set initial conditions 16 + for the test chip. 17 + 18 + In some cases its registers are also mapped in normal address space 19 + and can be used to obtain runtime information about the chip internals 20 + (like silicon temperature sensors) and as interface to other subsystems 21 + like platform configuration control and power management. 22 + 23 + properties: 24 + compatible: 25 + items: 26 + - enum: 27 + - arm,vexpress-scc,v2p-ca15_a7 28 + - const: arm,vexpress-scc 29 + 30 + reg: 31 + maxItems: 1 32 + 33 + interrupts: 34 + maxItems: 1 35 + 36 + required: 37 + - compatible 38 + 39 + additionalProperties: false 40 + 41 + examples: 42 + - | 43 + bus { 44 + #address-cells = <2>; 45 + #size-cells = <2>; 46 + 47 + scc@7fff0000 { 48 + compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc"; 49 + reg = <0 0x7fff0000 0 0x1000>; 50 + interrupts = <0 95 4>; 51 + }; 52 + }; 53 + ...

+156 -150

Documentation/devicetree/bindings/arm/cpus.yaml

··· 79 79 All other bits in the reg cells must be set to 0. 80 80 81 81 compatible: 82 - enum: 83 - - apm,potenza 84 - - apm,strega 85 - - apple,avalanche 86 - - apple,blizzard 87 - - apple,cyclone 88 - - apple,firestorm 89 - - apple,hurricane-zephyr 90 - - apple,icestorm 91 - - apple,mistral 92 - - apple,monsoon 93 - - apple,twister 94 - - apple,typhoon 95 - - arm,arm710t 96 - - arm,arm720t 97 - - arm,arm740t 98 - - arm,arm7ej-s 99 - - arm,arm7tdmi 100 - - arm,arm7tdmi-s 101 - - arm,arm9es 102 - - arm,arm9ej-s 103 - - arm,arm920t 104 - - arm,arm922t 105 - - arm,arm925 106 - - arm,arm926e-s 107 - - arm,arm926ej-s 108 - - arm,arm940t 109 - - arm,arm946e-s 110 - - arm,arm966e-s 111 - - arm,arm968e-s 112 - - arm,arm9tdmi 113 - - arm,arm1020e 114 - - arm,arm1020t 115 - - arm,arm1022e 116 - - arm,arm1026ej-s 117 - - arm,arm1136j-s 118 - - arm,arm1136jf-s 119 - - arm,arm1156t2-s 120 - - arm,arm1156t2f-s 121 - - arm,arm1176jzf 122 - - arm,arm1176jz-s 123 - - arm,arm1176jzf-s 124 - - arm,arm11mpcore 125 - - arm,armv8 # Only for s/w models 126 - - arm,c1-nano 127 - - arm,c1-premium 128 - - arm,c1-pro 129 - - arm,c1-ultra 130 - - arm,cortex-a5 131 - - arm,cortex-a7 132 - - arm,cortex-a8 133 - - arm,cortex-a9 134 - - arm,cortex-a12 135 - - arm,cortex-a15 136 - - arm,cortex-a17 137 - - arm,cortex-a32 138 - - arm,cortex-a34 139 - - arm,cortex-a35 140 - - arm,cortex-a53 141 - - arm,cortex-a55 142 - - arm,cortex-a57 143 - - arm,cortex-a65 144 - - arm,cortex-a72 145 - - arm,cortex-a73 146 - - arm,cortex-a75 147 - - arm,cortex-a76 148 - - arm,cortex-a77 149 - - arm,cortex-a78 150 - - arm,cortex-a78ae 151 - - arm,cortex-a78c 152 - - arm,cortex-a320 153 - - arm,cortex-a510 154 - - arm,cortex-a520 155 - - arm,cortex-a520ae 156 - - arm,cortex-a710 157 - - arm,cortex-a715 158 - - arm,cortex-a720 159 - - arm,cortex-a720ae 160 - - arm,cortex-a725 161 - - arm,cortex-m0 162 - - arm,cortex-m0+ 163 - - arm,cortex-m1 164 - - arm,cortex-m3 165 - - arm,cortex-m4 166 - - arm,cortex-r4 167 - - arm,cortex-r5 168 - - arm,cortex-r7 169 - - arm,cortex-r52 170 - - arm,cortex-x1 171 - - arm,cortex-x1c 172 - - arm,cortex-x2 173 - - arm,cortex-x3 174 - - arm,cortex-x4 175 - - arm,cortex-x925 176 - - arm,neoverse-e1 177 - - arm,neoverse-n1 178 - - arm,neoverse-n2 179 - - arm,neoverse-n3 180 - - arm,neoverse-v1 181 - - arm,neoverse-v2 182 - - arm,neoverse-v3 183 - - arm,neoverse-v3ae 184 - - arm,rainier 185 - - brcm,brahma-b15 186 - - brcm,brahma-b53 187 - - brcm,vulcan 188 - - cavium,thunder 189 - - cavium,thunder2 190 - - faraday,fa526 191 - - intel,sa110 192 - - intel,sa1100 193 - - marvell,feroceon 194 - - marvell,mohawk 195 - - marvell,pj4a 196 - - marvell,pj4b 197 - - marvell,sheeva-v5 198 - - marvell,sheeva-v7 199 - - nvidia,tegra132-denver 200 - - nvidia,tegra186-denver 201 - - nvidia,tegra194-carmel 202 - - qcom,krait 203 - - qcom,kryo 204 - - qcom,kryo240 205 - - qcom,kryo250 206 - - qcom,kryo260 207 - - qcom,kryo280 208 - - qcom,kryo360 209 - - qcom,kryo385 210 - - qcom,kryo465 211 - - qcom,kryo468 212 - - qcom,kryo470 213 - - qcom,kryo485 214 - - qcom,kryo560 215 - - qcom,kryo570 216 - - qcom,kryo660 217 - - qcom,kryo670 218 - - qcom,kryo685 219 - - qcom,kryo780 220 - - qcom,oryon 221 - - qcom,oryon-1-1 222 - - qcom,oryon-1-2 223 - - qcom,oryon-1-3 224 - - qcom,oryon-1-4 225 - - qcom,oryon-2-1 226 - - qcom,oryon-2-2 227 - - qcom,oryon-2-3 228 - - qcom,scorpion 229 - - samsung,mongoose-m2 230 - - samsung,mongoose-m3 231 - - samsung,mongoose-m5 82 + oneOf: 83 + - enum: 84 + - apm,potenza 85 + - apm,strega 86 + - apple,avalanche 87 + - apple,blizzard 88 + - apple,cyclone 89 + - apple,everest 90 + - apple,firestorm 91 + - apple,hurricane-zephyr 92 + - apple,icestorm 93 + - apple,mistral 94 + - apple,monsoon 95 + - apple,sawtooth 96 + - apple,twister 97 + - apple,typhoon 98 + - arm,arm710t 99 + - arm,arm720t 100 + - arm,arm740t 101 + - arm,arm7ej-s 102 + - arm,arm7tdmi 103 + - arm,arm7tdmi-s 104 + - arm,arm9es 105 + - arm,arm9ej-s 106 + - arm,arm920t 107 + - arm,arm922t 108 + - arm,arm925 109 + - arm,arm926e-s 110 + - arm,arm926ej-s 111 + - arm,arm940t 112 + - arm,arm946e-s 113 + - arm,arm966e-s 114 + - arm,arm968e-s 115 + - arm,arm9tdmi 116 + - arm,arm1020e 117 + - arm,arm1020t 118 + - arm,arm1022e 119 + - arm,arm1026ej-s 120 + - arm,arm1136j-s 121 + - arm,arm1136jf-s 122 + - arm,arm1156t2-s 123 + - arm,arm1156t2f-s 124 + - arm,arm1176jzf 125 + - arm,arm1176jz-s 126 + - arm,arm1176jzf-s 127 + - arm,arm11mpcore 128 + - arm,armv8 # Only for s/w models 129 + - arm,c1-nano 130 + - arm,c1-premium 131 + - arm,c1-pro 132 + - arm,c1-ultra 133 + - arm,cortex-a5 134 + - arm,cortex-a7 135 + - arm,cortex-a8 136 + - arm,cortex-a9 137 + - arm,cortex-a12 138 + - arm,cortex-a15 139 + - arm,cortex-a17 140 + - arm,cortex-a32 141 + - arm,cortex-a34 142 + - arm,cortex-a35 143 + - arm,cortex-a53 144 + - arm,cortex-a55 145 + - arm,cortex-a57 146 + - arm,cortex-a65 147 + - arm,cortex-a72 148 + - arm,cortex-a73 149 + - arm,cortex-a75 150 + - arm,cortex-a76 151 + - arm,cortex-a77 152 + - arm,cortex-a78 153 + - arm,cortex-a78ae 154 + - arm,cortex-a78c 155 + - arm,cortex-a320 156 + - arm,cortex-a510 157 + - arm,cortex-a520 158 + - arm,cortex-a520ae 159 + - arm,cortex-a710 160 + - arm,cortex-a715 161 + - arm,cortex-a720 162 + - arm,cortex-a720ae 163 + - arm,cortex-a725 164 + - arm,cortex-m0 165 + - arm,cortex-m0+ 166 + - arm,cortex-m1 167 + - arm,cortex-m3 168 + - arm,cortex-m4 169 + - arm,cortex-r4 170 + - arm,cortex-r5 171 + - arm,cortex-r7 172 + - arm,cortex-r52 173 + - arm,cortex-x1 174 + - arm,cortex-x1c 175 + - arm,cortex-x2 176 + - arm,cortex-x3 177 + - arm,cortex-x4 178 + - arm,cortex-x925 179 + - arm,neoverse-e1 180 + - arm,neoverse-n1 181 + - arm,neoverse-n2 182 + - arm,neoverse-n3 183 + - arm,neoverse-v1 184 + - arm,neoverse-v2 185 + - arm,neoverse-v3 186 + - arm,neoverse-v3ae 187 + - arm,rainier 188 + - brcm,brahma-b15 189 + - brcm,brahma-b53 190 + - brcm,vulcan 191 + - cavium,thunder 192 + - cavium,thunder2 193 + - faraday,fa526 194 + - intel,sa110 195 + - intel,sa1100 196 + - marvell,feroceon 197 + - marvell,mohawk 198 + - marvell,pj4a 199 + - marvell,pj4b 200 + - marvell,sheeva-v5 201 + - marvell,sheeva-v7 202 + - nvidia,tegra132-denver 203 + - nvidia,tegra186-denver 204 + - nvidia,tegra194-carmel 205 + - qcom,krait 206 + - qcom,kryo240 207 + - qcom,kryo250 208 + - qcom,kryo260 209 + - qcom,kryo280 210 + - qcom,kryo360 211 + - qcom,kryo385 212 + - qcom,kryo465 213 + - qcom,kryo468 214 + - qcom,kryo470 215 + - qcom,kryo485 216 + - qcom,kryo560 217 + - qcom,kryo570 218 + - qcom,kryo660 219 + - qcom,kryo670 220 + - qcom,kryo685 221 + - qcom,kryo780 222 + - qcom,oryon-1-1 223 + - qcom,oryon-1-2 224 + - qcom,oryon-1-3 225 + - qcom,oryon-1-4 226 + - qcom,oryon-2-1 227 + - qcom,oryon-2-2 228 + - qcom,oryon-2-3 229 + - qcom,scorpion 230 + - samsung,mongoose-m2 231 + - samsung,mongoose-m3 232 + - samsung,mongoose-m5 233 + - enum: 234 + - qcom,kryo 235 + - qcom,oryon 236 + # Too generic, do not use in new code 237 + deprecated: true 232 238 233 239 enable-method: 234 240 $ref: /schemas/types.yaml#/definitions/string

+1

Documentation/devicetree/bindings/arm/freescale/fsl,imx51-m4if.yaml

··· 15 15 compatible: 16 16 oneOf: 17 17 - enum: 18 + - fsl,imx25-aips 18 19 - fsl,imx51-m4if 19 20 - fsl,imx51-tigerp 20 21 - fsl,imx51-aipstz

-33

Documentation/devicetree/bindings/arm/vexpress-scc.txt

··· 1 - ARM Versatile Express Serial Configuration Controller 2 - ----------------------------------------------------- 3 - 4 - Test chips for ARM Versatile Express platform implement SCC (Serial 5 - Configuration Controller) interface, used to set initial conditions 6 - for the test chip. 7 - 8 - In some cases its registers are also mapped in normal address space 9 - and can be used to obtain runtime information about the chip internals 10 - (like silicon temperature sensors) and as interface to other subsystems 11 - like platform configuration control and power management. 12 - 13 - Required properties: 14 - 15 - - compatible value: "arm,vexpress-scc,<model>", "arm,vexpress-scc"; 16 - where <model> is the full tile model name (as used 17 - in the tile's Technical Reference Manual), 18 - eg. for Coretile Express A15x2 A7x3 (V2P-CA15_A7): 19 - compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc"; 20 - 21 - Optional properties: 22 - 23 - - reg: when the SCC is memory mapped, physical address and size of the 24 - registers window 25 - - interrupts: when the SCC can generate a system-level interrupt 26 - 27 - Example: 28 - 29 - scc@7fff0000 { 30 - compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc"; 31 - reg = <0 0x7fff0000 0 0x1000>; 32 - interrupts = <0 95 4>; 33 - };

-90

Documentation/devicetree/bindings/bus/baikal,bt1-apb.yaml

··· 1 - # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 - # Copyright (C) 2020 BAIKAL ELECTRONICS, JSC 3 - %YAML 1.2 4 - --- 5 - $id: http://devicetree.org/schemas/bus/baikal,bt1-apb.yaml# 6 - $schema: http://devicetree.org/meta-schemas/core.yaml# 7 - 8 - title: Baikal-T1 APB-bus 9 - 10 - maintainers: 11 - - Serge Semin <fancer.lancer@gmail.com> 12 - 13 - description: | 14 - Baikal-T1 CPU or DMAC MMIO requests are handled by the AMBA 3 AXI Interconnect 15 - which routes them to the AXI-APB bridge. This interface is a single master 16 - multiple slaves bus in turn serializing IO accesses and routing them to the 17 - addressed APB slave devices. In case of any APB protocol collisions, slave 18 - device not responding on timeout an IRQ is raised with an erroneous address 19 - reported to the APB terminator (APB Errors Handler Block). 20 - 21 - allOf: 22 - - $ref: /schemas/simple-bus.yaml# 23 - 24 - properties: 25 - compatible: 26 - contains: 27 - const: baikal,bt1-apb 28 - 29 - reg: 30 - items: 31 - - description: APB EHB MMIO registers 32 - - description: APB MMIO region with no any device mapped 33 - 34 - reg-names: 35 - items: 36 - - const: ehb 37 - - const: nodev 38 - 39 - interrupts: 40 - maxItems: 1 41 - 42 - clocks: 43 - items: 44 - - description: APB reference clock 45 - 46 - clock-names: 47 - items: 48 - - const: pclk 49 - 50 - resets: 51 - items: 52 - - description: APB domain reset line 53 - 54 - reset-names: 55 - items: 56 - - const: prst 57 - 58 - unevaluatedProperties: false 59 - 60 - required: 61 - - compatible 62 - - reg 63 - - reg-names 64 - - interrupts 65 - - clocks 66 - - clock-names 67 - 68 - examples: 69 - - | 70 - #include <dt-bindings/interrupt-controller/mips-gic.h> 71 - 72 - bus@1f059000 { 73 - compatible = "baikal,bt1-apb", "simple-bus"; 74 - reg = <0x1f059000 0x1000>, 75 - <0x1d000000 0x2040000>; 76 - reg-names = "ehb", "nodev"; 77 - #address-cells = <1>; 78 - #size-cells = <1>; 79 - 80 - ranges; 81 - 82 - interrupts = <GIC_SHARED 16 IRQ_TYPE_LEVEL_HIGH>; 83 - 84 - clocks = <&ccu_sys 1>; 85 - clock-names = "pclk"; 86 - 87 - resets = <&ccu_sys 1>; 88 - reset-names = "prst"; 89 - }; 90 - ...

-107

Documentation/devicetree/bindings/bus/baikal,bt1-axi.yaml

··· 1 - # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 - # Copyright (C) 2020 BAIKAL ELECTRONICS, JSC 3 - %YAML 1.2 4 - --- 5 - $id: http://devicetree.org/schemas/bus/baikal,bt1-axi.yaml# 6 - $schema: http://devicetree.org/meta-schemas/core.yaml# 7 - 8 - title: Baikal-T1 AXI-bus 9 - 10 - maintainers: 11 - - Serge Semin <fancer.lancer@gmail.com> 12 - 13 - description: | 14 - AXI3-bus is the main communication bus of Baikal-T1 SoC connecting all 15 - high-speed peripheral IP-cores with RAM controller and with MIPS P5600 16 - cores. Traffic arbitration is done by means of DW AXI Interconnect (so 17 - called AXI Main Interconnect) routing IO requests from one block to 18 - another: from CPU to SoC peripherals and between some SoC peripherals 19 - (mostly between peripheral devices and RAM, but also between DMA and 20 - some peripherals). In case of any protocol error, device not responding 21 - an IRQ is raised and a faulty situation is reported to the AXI EHB 22 - (Errors Handler Block) embedded on top of the DW AXI Interconnect and 23 - accessible by means of the Baikal-T1 System Controller. 24 - 25 - allOf: 26 - - $ref: /schemas/simple-bus.yaml# 27 - 28 - properties: 29 - compatible: 30 - contains: 31 - const: baikal,bt1-axi 32 - 33 - reg: 34 - minItems: 1 35 - items: 36 - - description: Synopsys DesignWare AXI Interconnect QoS registers 37 - - description: AXI EHB MMIO system controller registers 38 - 39 - reg-names: 40 - minItems: 1 41 - items: 42 - - const: qos 43 - - const: ehb 44 - 45 - '#interconnect-cells': 46 - const: 1 47 - 48 - syscon: 49 - $ref: /schemas/types.yaml#/definitions/phandle 50 - description: Phandle to the Baikal-T1 System Controller DT node 51 - 52 - interrupts: 53 - maxItems: 1 54 - 55 - clocks: 56 - items: 57 - - description: Main Interconnect uplink reference clock 58 - 59 - clock-names: 60 - items: 61 - - const: aclk 62 - 63 - resets: 64 - items: 65 - - description: Main Interconnect reset line 66 - 67 - reset-names: 68 - items: 69 - - const: arst 70 - 71 - unevaluatedProperties: false 72 - 73 - required: 74 - - compatible 75 - - reg 76 - - reg-names 77 - - syscon 78 - - interrupts 79 - - clocks 80 - - clock-names 81 - 82 - examples: 83 - - | 84 - #include <dt-bindings/interrupt-controller/mips-gic.h> 85 - 86 - bus@1f05a000 { 87 - compatible = "baikal,bt1-axi", "simple-bus"; 88 - reg = <0x1f05a000 0x1000>, 89 - <0x1f04d110 0x8>; 90 - reg-names = "qos", "ehb"; 91 - #address-cells = <1>; 92 - #size-cells = <1>; 93 - #interconnect-cells = <1>; 94 - 95 - syscon = <&syscon>; 96 - 97 - ranges; 98 - 99 - interrupts = <GIC_SHARED 127 IRQ_TYPE_LEVEL_HIGH>; 100 - 101 - clocks = <&ccu_axi 0>; 102 - clock-names = "aclk"; 103 - 104 - resets = <&ccu_axi 0>; 105 - reset-names = "arst"; 106 - }; 107 - ...

-3

Documentation/devicetree/bindings/display/bridge/lontium,lt8912b.yaml

··· 39 39 $ref: /schemas/media/video-interfaces.yaml# 40 40 unevaluatedProperties: false 41 41 42 - properties: 43 - data-lanes: true 44 - 45 42 required: 46 43 - data-lanes 47 44

+4

Documentation/devicetree/bindings/display/panel/panel-simple-lvds-dual-ports.yaml

··· 40 40 - auo,g185han01 41 41 # AU Optronics Corporation 19.0" (1280x1024) TFT LCD panel 42 42 - auo,g190ean01 43 + # AU Optronics Corporation 21.5" FHD (1920x1080) color TFT LCD panel 44 + - auo,t215hvn01 43 45 # BOE AV123Z7M-N17 12.3" (1920x720) LVDS TFT LCD panel 44 46 - boe,av123z7m-n17 47 + # InnoLux 15.6" FHD (1920x1080) TFT LCD panel 48 + - innolux,g156hce-l01 45 49 # Kaohsiung Opto-Electronics Inc. 10.1" WUXGA (1920 x 1200) LVDS TFT LCD panel 46 50 - koe,tx26d202vm0bwa 47 51 # Lincoln Technology Solutions, LCD185-101CT 10.1" TFT 1920x1200

+2 -4

Documentation/devicetree/bindings/display/panel/panel-simple.yaml

··· 61 61 - auo,p238han01 62 62 # AU Optronics Corporation 31.5" FHD (1920x1080) TFT LCD panel 63 63 - auo,p320hvn03 64 - # AU Optronics Corporation 21.5" FHD (1920x1080) color TFT LCD panel 65 - - auo,t215hvn01 66 64 # Shanghai AVIC Optoelectronics 7" 1024x600 color TFT-LCD panel 67 65 - avic,tm070ddh03 68 66 # BOE AV101HDT-a10 10.1" 1280x720 LVDS panel ··· 178 180 - innolux,g121xce-l01 179 181 # InnoLux 15.0" G150XGE-L05 XGA (1024x768) TFT LCD panel 180 182 - innolux,g150xge-l05 181 - # InnoLux 15.6" FHD (1920x1080) TFT LCD panel 182 - - innolux,g156hce-l01 183 183 # InnoLux 13.3" FHD (1920x1080) TFT LCD panel 184 184 - innolux,n133hse-ea1 185 185 # InnoLux 15.6" WXGA TFT LCD panel ··· 200 204 - lemaker,bl035-rgb-002 201 205 # LG 7" (800x480 pixels) TFT LCD panel 202 206 - lg,lb070wv8 207 + # LG 6.1" (1440x3120) IPS LCD panel 208 + - lg,sw49410 203 209 # Logic Technologies LT161010-2NHC 7" WVGA TFT Cap Touch Module 204 210 - logictechno,lt161010-2nhc 205 211 # Logic Technologies LT161010-2NHR 7" WVGA TFT Resistive Touch Module

+52 -18

Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml

··· 36 36 reg: 37 37 description: 38 38 Addresses to each DSS memory region described in the SoC's TRM. 39 - items: 40 - - description: common DSS register area 41 - - description: VIDL1 light video plane 42 - - description: VID video plane 43 - - description: OVR1 overlay manager for vp1 44 - - description: OVR2 overlay manager for vp2 45 - - description: VP1 video port 1 46 - - description: VP2 video port 2 47 - - description: common1 DSS register area 39 + oneOf: 40 + - items: 41 + - description: common DSS register area 42 + - description: VIDL1 light video plane 43 + - description: VID video plane 44 + - description: OVR1 overlay manager for vp1 45 + - description: OVR2 overlay manager for vp2 46 + - description: VP1 video port 1 47 + - description: VP2 video port 2 48 + - description: common1 DSS register area 49 + - items: 50 + - description: common DSS register area 51 + - description: VIDL1 light video plane 52 + - description: OVR1 overlay manager for vp1 53 + - description: VP1 video port 1 54 + - description: common1 DSS register area 48 55 49 56 reg-names: 50 - items: 51 - - const: common 52 - - const: vidl1 53 - - const: vid 54 - - const: ovr1 55 - - const: ovr2 56 - - const: vp1 57 - - const: vp2 58 - - const: common1 57 + oneOf: 58 + - items: 59 + - const: common 60 + - const: vidl1 61 + - const: vid 62 + - const: ovr1 63 + - const: ovr2 64 + - const: vp1 65 + - const: vp2 66 + - const: common1 67 + - items: 68 + - const: common 69 + - const: vidl1 70 + - const: ovr1 71 + - const: vp1 72 + - const: common1 59 73 60 74 clocks: 75 + minItems: 2 61 76 items: 62 77 - description: fck DSS functional clock 63 78 - description: vp1 Video Port 1 pixel clock 64 79 - description: vp2 Video Port 2 pixel clock 65 80 66 81 clock-names: 82 + minItems: 2 67 83 items: 68 84 - const: fck 69 85 - const: vp1 ··· 195 179 ports: 196 180 properties: 197 181 port@1: false 182 + reg: 183 + maxItems: 5 184 + reg-names: 185 + maxItems: 5 186 + clocks: 187 + maxItems: 2 188 + clock-names: 189 + maxItems: 2 190 + else: 191 + properties: 192 + reg: 193 + minItems: 8 194 + reg-names: 195 + minItems: 8 196 + clocks: 197 + minItems: 3 198 + clock-names: 199 + minItems: 3 198 200 199 201 - if: 200 202 properties:

+69

Documentation/devicetree/bindings/input/touchscreen/fsl,imx25-tcq.yaml

··· 1 + # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/input/touchscreen/fsl,imx25-tcq.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Freescale mx25 TS conversion queue module 8 + 9 + maintainers: 10 + - Frank Li <Frank.Li@nxp.com> 11 + 12 + description: 13 + mx25 touchscreen conversion queue module which controls the ADC unit of the 14 + mx25 for attached touchscreens. 15 + 16 + properties: 17 + compatible: 18 + const: fsl,imx25-tcq 19 + 20 + reg: 21 + maxItems: 1 22 + 23 + interrupts: 24 + maxItems: 1 25 + 26 + fsl,wires: 27 + description: touch wires number. 28 + $ref: /schemas/types.yaml#/definitions/uint32 29 + enum: [4, 5] 30 + 31 + fsl,pen-debounce-ns: 32 + description: 33 + Pen debounce time in nanoseconds. 34 + 35 + fsl,pen-threshold: 36 + $ref: /schemas/types.yaml#/definitions/uint32 37 + description: 38 + Pen-down threshold for the touchscreen. This is a value 39 + between 1 and 4096. It is the ratio between the internal reference voltage 40 + and the measured voltage after the plate was precharged. Resistance between 41 + plates and therefore the voltage decreases with pressure so that a smaller 42 + value is equivalent to a higher pressure. 43 + 44 + fsl,settling-time-ns: 45 + description: 46 + Settling time in nanoseconds. The settling time is before 47 + the actual touch detection to wait for an even charge distribution in the 48 + plate. 49 + 50 + allOf: 51 + - $ref: touchscreen.yaml 52 + 53 + required: 54 + - compatible 55 + - reg 56 + - interrupts 57 + - fsl,wires 58 + 59 + unevaluatedProperties: false 60 + 61 + examples: 62 + - | 63 + touchscreen@50030400 { 64 + compatible = "fsl,imx25-tcq"; 65 + reg = <0x50030400 0x60>; 66 + interrupt-parent = <&tscadc>; 67 + interrupts = <0>; 68 + fsl,wires = <4>; 69 + };

-34

Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt

··· 1 - Freescale mx25 TS conversion queue module 2 - 3 - mx25 touchscreen conversion queue module which controls the ADC unit of the 4 - mx25 for attached touchscreens. 5 - 6 - Required properties: 7 - - compatible: Should be "fsl,imx25-tcq". 8 - - reg: Memory range of the device. 9 - - interrupts: Should be the interrupt number associated with this module within 10 - the tscadc unit (<0>). 11 - - fsl,wires: Should be '<4>' or '<5>' 12 - 13 - Optional properties: 14 - - fsl,pen-debounce-ns: Pen debounce time in nanoseconds. 15 - - fsl,pen-threshold: Pen-down threshold for the touchscreen. This is a value 16 - between 1 and 4096. It is the ratio between the internal reference voltage 17 - and the measured voltage after the plate was precharged. Resistance between 18 - plates and therefore the voltage decreases with pressure so that a smaller 19 - value is equivalent to a higher pressure. 20 - - fsl,settling-time-ns: Settling time in nanoseconds. The settling time is before 21 - the actual touch detection to wait for an even charge distribution in the 22 - plate. 23 - 24 - This device includes two conversion queues which can be added as subnodes. 25 - The first queue is for the touchscreen, the second for general purpose ADC. 26 - 27 - Example: 28 - tsc: tcq@50030400 { 29 - compatible = "fsl,imx25-tcq"; 30 - reg = <0x50030400 0x60>; 31 - interrupt-parent = <&tscadc>; 32 - interrupts = <0>; 33 - fsl,wires = <4>; 34 - };

+1 -1

Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml

··· 50 50 The 2nd cell contains the interrupt number for the interrupt type. 51 51 SPI interrupts are in the range [0-987]. PPI interrupts are in the 52 52 range [0-15]. Extended SPI interrupts are in the range [0-1023]. 53 - Extended PPI interrupts are in the range [0-127]. 53 + Extended PPI interrupts are in the range [0-63]. 54 54 55 55 The 3rd cell is the flags, encoded as follows: 56 56 bits[3:0] trigger type and level flags.

+2

Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml

··· 26 26 compatible: 27 27 items: 28 28 - enum: 29 + - qcom,eliza-pdc 29 30 - qcom,glymur-pdc 31 + - qcom,hawi-pdc 30 32 - qcom,kaanapali-pdc 31 33 - qcom,milos-pdc 32 34 - qcom,qcs615-pdc

-6

Documentation/devicetree/bindings/mux/mux-controller.yaml

··· 63 63 64 64 select: 65 65 anyOf: 66 - - properties: 67 - $nodename: 68 - pattern: '^mux-controller' 69 66 - required: 70 67 - '#mux-control-cells' 71 68 - required: 72 69 - '#mux-state-cells' 73 70 74 71 properties: 75 - $nodename: 76 - pattern: '^mux-controller(@.*|-([0-9]|[1-9][0-9]+))?$' 77 - 78 72 '#mux-control-cells': 79 73 enum: [ 0, 1 ] 80 74

+4 -4

Documentation/devicetree/bindings/opp/opp-v2.yaml

··· 172 172 cpu@0 { 173 173 compatible = "arm,cortex-a7"; 174 174 device_type = "cpu"; 175 - reg = <0>; 175 + reg = <0x0>; 176 176 next-level-cache = <&L2>; 177 177 clocks = <&clk_controller 0>; 178 178 clock-names = "cpu"; ··· 183 183 cpu@1 { 184 184 compatible = "arm,cortex-a7"; 185 185 device_type = "cpu"; 186 - reg = <1>; 186 + reg = <0x1>; 187 187 next-level-cache = <&L2>; 188 188 clocks = <&clk_controller 0>; 189 189 clock-names = "cpu"; ··· 194 194 cpu@100 { 195 195 compatible = "arm,cortex-a15"; 196 196 device_type = "cpu"; 197 - reg = <100>; 197 + reg = <0x100>; 198 198 next-level-cache = <&L2>; 199 199 clocks = <&clk_controller 1>; 200 200 clock-names = "cpu"; ··· 205 205 cpu@101 { 206 206 compatible = "arm,cortex-a15"; 207 207 device_type = "cpu"; 208 - reg = <101>; 208 + reg = <0x101>; 209 209 next-level-cache = <&L2>; 210 210 clocks = <&clk_controller 1>; 211 211 clock-names = "cpu";

+3 -1

Documentation/devicetree/bindings/spmi/qcom,x1e80100-spmi-pmic-arb.yaml

··· 24 24 compatible: 25 25 oneOf: 26 26 - items: 27 - - const: qcom,sar2130p-spmi-pmic-arb 27 + - enum: 28 + - qcom,eliza-spmi-pmic-arb 29 + - qcom,sar2130p-spmi-pmic-arb 28 30 - const: qcom,x1e80100-spmi-pmic-arb 29 31 - const: qcom,x1e80100-spmi-pmic-arb 30 32

+3 -1

Documentation/devicetree/bindings/sram/sram.yaml

··· 34 34 - nvidia,tegra186-sysram 35 35 - nvidia,tegra194-sysram 36 36 - nvidia,tegra234-sysram 37 + - qcom,hawi-imem 37 38 - qcom,kaanapali-imem 39 + - qcom,milos-imem 38 40 - qcom,rpm-msg-ram 39 41 - rockchip,rk3288-pmu-sram 40 42 ··· 67 65 type: boolean 68 66 69 67 patternProperties: 70 - "^([a-z0-9]*-)?sram(-section)?@[a-f0-9]+$": 68 + "^([a-z0-9]+-)*sram(-section)?@[a-f0-9]+$": 71 69 type: object 72 70 description: 73 71 Each child of the sram node specifies a region of reserved memory.

+46 -49

Documentation/devicetree/bindings/thermal/thermal-zones.yaml

··· 129 129 which the thermal framework needs to take action. The actions to 130 130 be taken are defined in another node called cooling-maps. 131 131 132 - patternProperties: 133 - "^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$": 134 - type: object 132 + additionalProperties: 133 + type: object 134 + additionalProperties: false 135 135 136 - properties: 137 - temperature: 138 - $ref: /schemas/types.yaml#/definitions/int32 139 - minimum: -273000 140 - maximum: 200000 141 - description: 142 - An integer expressing the trip temperature in millicelsius. 136 + properties: 137 + temperature: 138 + $ref: /schemas/types.yaml#/definitions/int32 139 + minimum: -273000 140 + maximum: 200000 141 + description: 142 + An integer expressing the trip temperature in millicelsius. 143 143 144 - hysteresis: 145 - $ref: /schemas/types.yaml#/definitions/uint32 146 - description: 147 - An unsigned integer expressing the hysteresis delta with 148 - respect to the trip temperature property above, also in 149 - millicelsius. Any cooling action initiated by the framework is 150 - maintained until the temperature falls below 151 - (trip temperature - hysteresis). This potentially prevents a 152 - situation where the trip gets constantly triggered soon after 153 - cooling action is removed. 144 + hysteresis: 145 + $ref: /schemas/types.yaml#/definitions/uint32 146 + description: 147 + An unsigned integer expressing the hysteresis delta with 148 + respect to the trip temperature property above, also in 149 + millicelsius. Any cooling action initiated by the framework is 150 + maintained until the temperature falls below 151 + (trip temperature - hysteresis). This potentially prevents a 152 + situation where the trip gets constantly triggered soon after 153 + cooling action is removed. 154 154 155 - type: 156 - $ref: /schemas/types.yaml#/definitions/string 157 - enum: 158 - - active # enable active cooling e.g. fans 159 - - passive # enable passive cooling e.g. throttling cpu 160 - - hot # send notification to driver 161 - - critical # send notification to driver, trigger shutdown 162 - description: | 163 - There are four valid trip types: active, passive, hot, 164 - critical. 155 + type: 156 + $ref: /schemas/types.yaml#/definitions/string 157 + enum: 158 + - active # enable active cooling e.g. fans 159 + - passive # enable passive cooling e.g. throttling cpu 160 + - hot # send notification to driver 161 + - critical # send notification to driver, trigger shutdown 162 + description: | 163 + There are four valid trip types: active, passive, hot, 164 + critical. 165 165 166 - The critical trip type is used to set the maximum 167 - temperature threshold above which the HW becomes 168 - unstable and underlying firmware might even trigger a 169 - reboot. Hitting the critical threshold triggers a system 170 - shutdown. 166 + The critical trip type is used to set the maximum 167 + temperature threshold above which the HW becomes 168 + unstable and underlying firmware might even trigger a 169 + reboot. Hitting the critical threshold triggers a system 170 + shutdown. 171 171 172 - The hot trip type can be used to send a notification to 173 - the thermal driver (if a .notify callback is registered). 174 - The action to be taken is left to the driver. 172 + The hot trip type can be used to send a notification to 173 + the thermal driver (if a .notify callback is registered). 174 + The action to be taken is left to the driver. 175 175 176 - The passive trip type can be used to slow down HW e.g. run 177 - the CPU, GPU, bus at a lower frequency. 176 + The passive trip type can be used to slow down HW e.g. run 177 + the CPU, GPU, bus at a lower frequency. 178 178 179 - The active trip type can be used to control other HW to 180 - help in cooling e.g. fans can be sped up or slowed down 179 + The active trip type can be used to control other HW to 180 + help in cooling e.g. fans can be sped up or slowed down 181 181 182 - required: 183 - - temperature 184 - - hysteresis 185 - - type 186 - additionalProperties: false 187 - 188 - additionalProperties: false 182 + required: 183 + - temperature 184 + - hysteresis 185 + - type 189 186 190 187 cooling-maps: 191 188 type: object

+10 -10

Documentation/devicetree/of_unittest.rst

··· 48 48 3. Test-data 49 49 ============ 50 50 51 - The Device Tree Source file (drivers/of/unittest-data/testcases.dts) contains 51 + The Device Tree Source file (drivers/of/unittest-data/testcases.dtso) contains 52 52 the test data required for executing the unit tests automated in 53 53 drivers/of/unittest.c. See the content of the folder:: 54 54 55 55 drivers/of/unittest-data/tests-*.dtsi 56 56 57 - for the Device Tree Source Include files (.dtsi) included in testcases.dts. 57 + for the Device Tree Source Include files (.dtsi) included in testcases.dtso. 58 58 59 59 When the kernel is built with CONFIG_OF_UNITTEST enabled, then the following make 60 60 rule:: 61 61 62 - $(obj)/%.dtb: $(src)/%.dts FORCE 63 - $(call if_changed_dep, dtc) 62 + $(obj)/%.dtbo: $(src)/%.dtso $(DTC) FORCE 63 + $(call if_changed_dep,dtc) 64 64 65 - is used to compile the DT source file (testcases.dts) into a binary blob 66 - (testcases.dtb), also referred as flattened DT. 65 + is used to compile the DT source file (testcases.dtso) into a binary blob 66 + (testcases.dtbo), also referred as flattened DT. 67 67 68 68 After that, using the following rule the binary blob above is wrapped as an 69 - assembly file (testcases.dtb.S):: 69 + assembly file (testcases.dtbo.S):: 70 70 71 - $(obj)/%.dtb.S: $(obj)/%.dtb 72 - $(call cmd, dt_S_dtb) 71 + $(obj)/%.dtbo.S: $(obj)/%.dtbo FORCE 72 + $(call if_changed,wrap_S_dtb) 73 73 74 - The assembly file is compiled into an object file (testcases.dtb.o), and is 74 + The assembly file is compiled into an object file (testcases.dtbo.o), and is 75 75 linked into the kernel image. 76 76 77 77

+12 -9

Documentation/translations/zh_CN/devicetree/of_unittest.rst

··· 32 32 2. 测试数据 33 33 =========== 34 34 35 - 设备树源文件（drivers/of/unittest-data/testcases.dts）包含执行drivers/of/unittest.c 36 - 中自动化单元测试所需的测试数据。目前，以下设备树源包含文件（.dtsi）被包含在testcases.dt中:: 35 + 设备树源文件（drivers/of/unittest-data/testcases.dtso）包含执行drivers/of/unittest.c 36 + 中自动化单元测试所需的测试数据。目前，以下设备树源包含文件（.dtsi）被包含在testcases.dtso中:: 37 37 38 38 drivers/of/unittest-data/tests-interrupts.dtsi 39 39 drivers/of/unittest-data/tests-platform.dtsi 40 40 drivers/of/unittest-data/tests-phandle.dtsi 41 41 drivers/of/unittest-data/tests-match.dtsi 42 + drivers/of/unittest-data/tests-address.dtsi 43 + drivers/of/unittest-data/tests-overlay.dtsi 44 + drivers/of/unittest-data/tests-lifecycle.dtsi 42 45 43 46 当内核在启用CONFIG_OF_UNITTEST的情况下被构建时，那么下面的make规则:: 44 47 45 - $(obj)/%.dtb: $(src)/%.dts FORCE 46 - $(call if_changed_dep, dtc) 48 + $(obj)/%.dtbo: $(src)/%.dtso $(DTC) FORCE 49 + $(call if_changed_dep,dtc) 47 50 48 - 用于将DT源文件（testcases.dts）编译成二进制blob（testcases.dtb），也被称为扁平化的DT。 51 + 用于将DT源文件（testcases.dtso）编译成二进制blob（testcases.dtbo），也被称为扁平化的DT。 49 52 50 - 之后，使用以下规则将上述二进制blob包装成一个汇编文件（testcases.dtb.S）:: 53 + 之后，使用以下规则将上述二进制blob包装成一个汇编文件（testcases.dtbo.S）:: 51 54 52 - $(obj)/%.dtb.S: $(obj)/%.dtb 53 - $(call cmd, dt_S_dtb) 55 + $(obj)/%.dtbo.S: $(obj)/%.dtbo FORCE 56 + $(call if_changed,wrap_S_dtb) 54 57 55 - 汇编文件被编译成一个对象文件（testcases.dtb.o），并被链接到内核镜像中。 58 + 汇编文件被编译成一个对象文件（testcases.dtbo.o），并被链接到内核镜像中。 56 59 57 60 58 61 2.1. 添加测试数据

-30

drivers/bus/Kconfig

··· 38 38 arbiter. This driver provides timeout and target abort error handling 39 39 and internal bus master decoding. 40 40 41 - config BT1_APB 42 - bool "Baikal-T1 APB-bus driver" 43 - depends on MIPS_BAIKAL_T1 || COMPILE_TEST 44 - select REGMAP_MMIO 45 - help 46 - Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs. 47 - IO requests are routed to this bus by means of the DW AMBA 3 AXI 48 - Interconnect. In case of any APB protocol collisions, slave device 49 - not responding on timeout an IRQ is raised with an erroneous address 50 - reported to the APB terminator (APB Errors Handler Block). This 51 - driver provides the interrupt handler to detect the erroneous 52 - address, prints an error message about the address fault, updates an 53 - errors counter. The counter and the APB-bus operations timeout can be 54 - accessed via corresponding sysfs nodes. 55 - 56 - config BT1_AXI 57 - bool "Baikal-T1 AXI-bus driver" 58 - depends on MIPS_BAIKAL_T1 || COMPILE_TEST 59 - select MFD_SYSCON 60 - help 61 - AXI3-bus is the main communication bus connecting all high-speed 62 - peripheral IP-cores with RAM controller and with MIPS P5600 cores on 63 - Baikal-T1 SoC. Traffic arbitration is done by means of DW AMBA 3 AXI 64 - Interconnect (so called AXI Main Interconnect) routing IO requests 65 - from one SoC block to another. This driver provides a way to detect 66 - any bus protocol errors and device not responding situations by 67 - means of an embedded on top of the interconnect errors handler 68 - block (EHB). AXI Interconnect QoS arbitration tuning is currently 69 - unsupported. 70 - 71 41 config MOXTET 72 42 tristate "CZ.NIC Turris Mox module configuration bus" 73 43 depends on SPI_MASTER && OF

-2

drivers/bus/Makefile

··· 13 13 # DPAA2 fsl-mc bus 14 14 obj-$(CONFIG_FSL_MC_BUS) += fsl-mc/ 15 15 16 - obj-$(CONFIG_BT1_APB) += bt1-apb.o 17 - obj-$(CONFIG_BT1_AXI) += bt1-axi.o 18 16 obj-$(CONFIG_IMX_AIPSTZ) += imx-aipstz.o 19 17 obj-$(CONFIG_IMX_WEIM) += imx-weim.o 20 18 obj-$(CONFIG_INTEL_IXP4XX_EB) += intel-ixp4xx-eb.o

-396

drivers/bus/bt1-apb.c

··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * Copyright (C) 2020 BAIKAL ELECTRONICS, JSC 4 - * 5 - * Authors: 6 - * Serge Semin <Sergey.Semin@baikalelectronics.ru> 7 - * 8 - * Baikal-T1 APB-bus driver 9 - */ 10 - 11 - #include <linux/kernel.h> 12 - #include <linux/module.h> 13 - #include <linux/types.h> 14 - #include <linux/device.h> 15 - #include <linux/atomic.h> 16 - #include <linux/platform_device.h> 17 - #include <linux/interrupt.h> 18 - #include <linux/io.h> 19 - #include <linux/nmi.h> 20 - #include <linux/of.h> 21 - #include <linux/regmap.h> 22 - #include <linux/clk.h> 23 - #include <linux/reset.h> 24 - #include <linux/time64.h> 25 - #include <linux/sysfs.h> 26 - 27 - #define APB_EHB_ISR 0x00 28 - #define APB_EHB_ISR_PENDING BIT(0) 29 - #define APB_EHB_ISR_MASK BIT(1) 30 - #define APB_EHB_ADDR 0x04 31 - #define APB_EHB_TIMEOUT 0x08 32 - 33 - #define APB_EHB_TIMEOUT_MIN 0x000003FFU 34 - #define APB_EHB_TIMEOUT_MAX 0xFFFFFFFFU 35 - 36 - /* 37 - * struct bt1_apb - Baikal-T1 APB EHB private data 38 - * @dev: Pointer to the device structure. 39 - * @regs: APB EHB registers map. 40 - * @res: No-device error injection memory region. 41 - * @irq: Errors IRQ number. 42 - * @rate: APB-bus reference clock rate. 43 - * @pclk: APB-reference clock. 44 - * @prst: APB domain reset line. 45 - * @count: Number of errors detected. 46 - */ 47 - struct bt1_apb { 48 - struct device *dev; 49 - 50 - struct regmap *regs; 51 - void __iomem *res; 52 - int irq; 53 - 54 - unsigned long rate; 55 - struct clk *pclk; 56 - 57 - struct reset_control *prst; 58 - 59 - atomic_t count; 60 - }; 61 - 62 - static const struct regmap_config bt1_apb_regmap_cfg = { 63 - .reg_bits = 32, 64 - .val_bits = 32, 65 - .reg_stride = 4, 66 - .max_register = APB_EHB_TIMEOUT, 67 - .fast_io = true 68 - }; 69 - 70 - static inline unsigned long bt1_apb_n_to_timeout_us(struct bt1_apb *apb, u32 n) 71 - { 72 - u64 timeout = (u64)n * USEC_PER_SEC; 73 - 74 - do_div(timeout, apb->rate); 75 - 76 - return timeout; 77 - 78 - } 79 - 80 - static inline unsigned long bt1_apb_timeout_to_n_us(struct bt1_apb *apb, 81 - unsigned long timeout) 82 - { 83 - u64 n = (u64)timeout * apb->rate; 84 - 85 - do_div(n, USEC_PER_SEC); 86 - 87 - return n; 88 - 89 - } 90 - 91 - static irqreturn_t bt1_apb_isr(int irq, void *data) 92 - { 93 - struct bt1_apb *apb = data; 94 - u32 addr = 0; 95 - 96 - regmap_read(apb->regs, APB_EHB_ADDR, &addr); 97 - 98 - dev_crit_ratelimited(apb->dev, 99 - "APB-bus fault %d: Slave access timeout at 0x%08x\n", 100 - atomic_inc_return(&apb->count), 101 - addr); 102 - 103 - /* 104 - * Print backtrace on each CPU. This might be pointless if the fault 105 - * has happened on the same CPU as the IRQ handler is executed or 106 - * the other core proceeded further execution despite the error. 107 - * But if it's not, by looking at the trace we would get straight to 108 - * the cause of the problem. 109 - */ 110 - trigger_all_cpu_backtrace(); 111 - 112 - regmap_update_bits(apb->regs, APB_EHB_ISR, APB_EHB_ISR_PENDING, 0); 113 - 114 - return IRQ_HANDLED; 115 - } 116 - 117 - static void bt1_apb_clear_data(void *data) 118 - { 119 - struct bt1_apb *apb = data; 120 - struct platform_device *pdev = to_platform_device(apb->dev); 121 - 122 - platform_set_drvdata(pdev, NULL); 123 - } 124 - 125 - static struct bt1_apb *bt1_apb_create_data(struct platform_device *pdev) 126 - { 127 - struct device *dev = &pdev->dev; 128 - struct bt1_apb *apb; 129 - int ret; 130 - 131 - apb = devm_kzalloc(dev, sizeof(*apb), GFP_KERNEL); 132 - if (!apb) 133 - return ERR_PTR(-ENOMEM); 134 - 135 - ret = devm_add_action(dev, bt1_apb_clear_data, apb); 136 - if (ret) { 137 - dev_err(dev, "Can't add APB EHB data clear action\n"); 138 - return ERR_PTR(ret); 139 - } 140 - 141 - apb->dev = dev; 142 - atomic_set(&apb->count, 0); 143 - platform_set_drvdata(pdev, apb); 144 - 145 - return apb; 146 - } 147 - 148 - static int bt1_apb_request_regs(struct bt1_apb *apb) 149 - { 150 - struct platform_device *pdev = to_platform_device(apb->dev); 151 - void __iomem *regs; 152 - 153 - regs = devm_platform_ioremap_resource_byname(pdev, "ehb"); 154 - if (IS_ERR(regs)) { 155 - dev_err(apb->dev, "Couldn't map APB EHB registers\n"); 156 - return PTR_ERR(regs); 157 - } 158 - 159 - apb->regs = devm_regmap_init_mmio(apb->dev, regs, &bt1_apb_regmap_cfg); 160 - if (IS_ERR(apb->regs)) { 161 - dev_err(apb->dev, "Couldn't create APB EHB regmap\n"); 162 - return PTR_ERR(apb->regs); 163 - } 164 - 165 - apb->res = devm_platform_ioremap_resource_byname(pdev, "nodev"); 166 - if (IS_ERR(apb->res)) 167 - dev_err(apb->dev, "Couldn't map reserved region\n"); 168 - 169 - return PTR_ERR_OR_ZERO(apb->res); 170 - } 171 - 172 - static int bt1_apb_request_rst(struct bt1_apb *apb) 173 - { 174 - int ret; 175 - 176 - apb->prst = devm_reset_control_get_optional_exclusive(apb->dev, "prst"); 177 - if (IS_ERR(apb->prst)) 178 - return dev_err_probe(apb->dev, PTR_ERR(apb->prst), 179 - "Couldn't get reset control line\n"); 180 - 181 - ret = reset_control_deassert(apb->prst); 182 - if (ret) 183 - dev_err(apb->dev, "Failed to deassert the reset line\n"); 184 - 185 - return ret; 186 - } 187 - 188 - static int bt1_apb_request_clk(struct bt1_apb *apb) 189 - { 190 - apb->pclk = devm_clk_get_enabled(apb->dev, "pclk"); 191 - if (IS_ERR(apb->pclk)) 192 - return dev_err_probe(apb->dev, PTR_ERR(apb->pclk), 193 - "Couldn't get APB clock descriptor\n"); 194 - 195 - apb->rate = clk_get_rate(apb->pclk); 196 - if (!apb->rate) { 197 - dev_err(apb->dev, "Invalid clock rate\n"); 198 - return -EINVAL; 199 - } 200 - 201 - return 0; 202 - } 203 - 204 - static void bt1_apb_clear_irq(void *data) 205 - { 206 - struct bt1_apb *apb = data; 207 - 208 - regmap_update_bits(apb->regs, APB_EHB_ISR, APB_EHB_ISR_MASK, 0); 209 - } 210 - 211 - static int bt1_apb_request_irq(struct bt1_apb *apb) 212 - { 213 - struct platform_device *pdev = to_platform_device(apb->dev); 214 - int ret; 215 - 216 - apb->irq = platform_get_irq(pdev, 0); 217 - if (apb->irq < 0) 218 - return apb->irq; 219 - 220 - ret = devm_request_irq(apb->dev, apb->irq, bt1_apb_isr, IRQF_SHARED, 221 - "bt1-apb", apb); 222 - if (ret) { 223 - dev_err(apb->dev, "Couldn't request APB EHB IRQ\n"); 224 - return ret; 225 - } 226 - 227 - ret = devm_add_action(apb->dev, bt1_apb_clear_irq, apb); 228 - if (ret) { 229 - dev_err(apb->dev, "Can't add APB EHB IRQs clear action\n"); 230 - return ret; 231 - } 232 - 233 - /* Unmask IRQ and clear it' pending flag. */ 234 - regmap_update_bits(apb->regs, APB_EHB_ISR, 235 - APB_EHB_ISR_PENDING | APB_EHB_ISR_MASK, 236 - APB_EHB_ISR_MASK); 237 - 238 - return 0; 239 - } 240 - 241 - static ssize_t count_show(struct device *dev, struct device_attribute *attr, 242 - char *buf) 243 - { 244 - struct bt1_apb *apb = dev_get_drvdata(dev); 245 - 246 - return scnprintf(buf, PAGE_SIZE, "%d\n", atomic_read(&apb->count)); 247 - } 248 - static DEVICE_ATTR_RO(count); 249 - 250 - static ssize_t timeout_show(struct device *dev, struct device_attribute *attr, 251 - char *buf) 252 - { 253 - struct bt1_apb *apb = dev_get_drvdata(dev); 254 - unsigned long timeout; 255 - int ret; 256 - u32 n; 257 - 258 - ret = regmap_read(apb->regs, APB_EHB_TIMEOUT, &n); 259 - if (ret) 260 - return ret; 261 - 262 - timeout = bt1_apb_n_to_timeout_us(apb, n); 263 - 264 - return scnprintf(buf, PAGE_SIZE, "%lu\n", timeout); 265 - } 266 - 267 - static ssize_t timeout_store(struct device *dev, 268 - struct device_attribute *attr, 269 - const char *buf, size_t count) 270 - { 271 - struct bt1_apb *apb = dev_get_drvdata(dev); 272 - unsigned long timeout; 273 - int ret; 274 - u32 n; 275 - 276 - if (kstrtoul(buf, 0, &timeout) < 0) 277 - return -EINVAL; 278 - 279 - n = bt1_apb_timeout_to_n_us(apb, timeout); 280 - n = clamp(n, APB_EHB_TIMEOUT_MIN, APB_EHB_TIMEOUT_MAX); 281 - 282 - ret = regmap_write(apb->regs, APB_EHB_TIMEOUT, n); 283 - 284 - return ret ?: count; 285 - } 286 - static DEVICE_ATTR_RW(timeout); 287 - 288 - static ssize_t inject_error_show(struct device *dev, 289 - struct device_attribute *attr, char *buf) 290 - { 291 - return scnprintf(buf, PAGE_SIZE, "Error injection: nodev irq\n"); 292 - } 293 - 294 - static ssize_t inject_error_store(struct device *dev, 295 - struct device_attribute *attr, 296 - const char *data, size_t count) 297 - { 298 - struct bt1_apb *apb = dev_get_drvdata(dev); 299 - 300 - /* 301 - * Either dummy read from the unmapped address in the APB IO area 302 - * or manually set the IRQ status. 303 - */ 304 - if (sysfs_streq(data, "nodev")) 305 - readl(apb->res); 306 - else if (sysfs_streq(data, "irq")) 307 - regmap_update_bits(apb->regs, APB_EHB_ISR, APB_EHB_ISR_PENDING, 308 - APB_EHB_ISR_PENDING); 309 - else 310 - return -EINVAL; 311 - 312 - return count; 313 - } 314 - static DEVICE_ATTR_RW(inject_error); 315 - 316 - static struct attribute *bt1_apb_sysfs_attrs[] = { 317 - &dev_attr_count.attr, 318 - &dev_attr_timeout.attr, 319 - &dev_attr_inject_error.attr, 320 - NULL 321 - }; 322 - ATTRIBUTE_GROUPS(bt1_apb_sysfs); 323 - 324 - static void bt1_apb_remove_sysfs(void *data) 325 - { 326 - struct bt1_apb *apb = data; 327 - 328 - device_remove_groups(apb->dev, bt1_apb_sysfs_groups); 329 - } 330 - 331 - static int bt1_apb_init_sysfs(struct bt1_apb *apb) 332 - { 333 - int ret; 334 - 335 - ret = device_add_groups(apb->dev, bt1_apb_sysfs_groups); 336 - if (ret) { 337 - dev_err(apb->dev, "Failed to create EHB APB sysfs nodes\n"); 338 - return ret; 339 - } 340 - 341 - ret = devm_add_action_or_reset(apb->dev, bt1_apb_remove_sysfs, apb); 342 - if (ret) 343 - dev_err(apb->dev, "Can't add APB EHB sysfs remove action\n"); 344 - 345 - return ret; 346 - } 347 - 348 - static int bt1_apb_probe(struct platform_device *pdev) 349 - { 350 - struct bt1_apb *apb; 351 - int ret; 352 - 353 - apb = bt1_apb_create_data(pdev); 354 - if (IS_ERR(apb)) 355 - return PTR_ERR(apb); 356 - 357 - ret = bt1_apb_request_regs(apb); 358 - if (ret) 359 - return ret; 360 - 361 - ret = bt1_apb_request_rst(apb); 362 - if (ret) 363 - return ret; 364 - 365 - ret = bt1_apb_request_clk(apb); 366 - if (ret) 367 - return ret; 368 - 369 - ret = bt1_apb_request_irq(apb); 370 - if (ret) 371 - return ret; 372 - 373 - ret = bt1_apb_init_sysfs(apb); 374 - if (ret) 375 - return ret; 376 - 377 - return 0; 378 - } 379 - 380 - static const struct of_device_id bt1_apb_of_match[] = { 381 - { .compatible = "baikal,bt1-apb" }, 382 - { } 383 - }; 384 - MODULE_DEVICE_TABLE(of, bt1_apb_of_match); 385 - 386 - static struct platform_driver bt1_apb_driver = { 387 - .probe = bt1_apb_probe, 388 - .driver = { 389 - .name = "bt1-apb", 390 - .of_match_table = bt1_apb_of_match 391 - } 392 - }; 393 - module_platform_driver(bt1_apb_driver); 394 - 395 - MODULE_AUTHOR("Serge Semin <Sergey.Semin@baikalelectronics.ru>"); 396 - MODULE_DESCRIPTION("Baikal-T1 APB-bus driver");

-292

drivers/bus/bt1-axi.c

··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * Copyright (C) 2020 BAIKAL ELECTRONICS, JSC 4 - * 5 - * Authors: 6 - * Serge Semin <Sergey.Semin@baikalelectronics.ru> 7 - * 8 - * Baikal-T1 AXI-bus driver 9 - */ 10 - 11 - #include <linux/kernel.h> 12 - #include <linux/module.h> 13 - #include <linux/types.h> 14 - #include <linux/bitfield.h> 15 - #include <linux/device.h> 16 - #include <linux/atomic.h> 17 - #include <linux/regmap.h> 18 - #include <linux/platform_device.h> 19 - #include <linux/mfd/syscon.h> 20 - #include <linux/interrupt.h> 21 - #include <linux/io.h> 22 - #include <linux/nmi.h> 23 - #include <linux/of.h> 24 - #include <linux/clk.h> 25 - #include <linux/reset.h> 26 - #include <linux/sysfs.h> 27 - 28 - #define BT1_AXI_WERRL 0x110 29 - #define BT1_AXI_WERRH 0x114 30 - #define BT1_AXI_WERRH_TYPE BIT(23) 31 - #define BT1_AXI_WERRH_ADDR_FLD 24 32 - #define BT1_AXI_WERRH_ADDR_MASK GENMASK(31, BT1_AXI_WERRH_ADDR_FLD) 33 - 34 - /* 35 - * struct bt1_axi - Baikal-T1 AXI-bus private data 36 - * @dev: Pointer to the device structure. 37 - * @qos_regs: AXI Interconnect QoS tuning registers. 38 - * @sys_regs: Baikal-T1 System Controller registers map. 39 - * @irq: Errors IRQ number. 40 - * @aclk: AXI reference clock. 41 - * @arst: AXI Interconnect reset line. 42 - * @count: Number of errors detected. 43 - */ 44 - struct bt1_axi { 45 - struct device *dev; 46 - 47 - void __iomem *qos_regs; 48 - struct regmap *sys_regs; 49 - int irq; 50 - 51 - struct clk *aclk; 52 - 53 - struct reset_control *arst; 54 - 55 - atomic_t count; 56 - }; 57 - 58 - static irqreturn_t bt1_axi_isr(int irq, void *data) 59 - { 60 - struct bt1_axi *axi = data; 61 - u32 low = 0, high = 0; 62 - 63 - regmap_read(axi->sys_regs, BT1_AXI_WERRL, &low); 64 - regmap_read(axi->sys_regs, BT1_AXI_WERRH, &high); 65 - 66 - dev_crit_ratelimited(axi->dev, 67 - "AXI-bus fault %d: %s at 0x%x%08x\n", 68 - atomic_inc_return(&axi->count), 69 - high & BT1_AXI_WERRH_TYPE ? "no slave" : "slave protocol error", 70 - high, low); 71 - 72 - /* 73 - * Print backtrace on each CPU. This might be pointless if the fault 74 - * has happened on the same CPU as the IRQ handler is executed or 75 - * the other core proceeded further execution despite the error. 76 - * But if it's not, by looking at the trace we would get straight to 77 - * the cause of the problem. 78 - */ 79 - trigger_all_cpu_backtrace(); 80 - 81 - return IRQ_HANDLED; 82 - } 83 - 84 - static void bt1_axi_clear_data(void *data) 85 - { 86 - struct bt1_axi *axi = data; 87 - struct platform_device *pdev = to_platform_device(axi->dev); 88 - 89 - platform_set_drvdata(pdev, NULL); 90 - } 91 - 92 - static struct bt1_axi *bt1_axi_create_data(struct platform_device *pdev) 93 - { 94 - struct device *dev = &pdev->dev; 95 - struct bt1_axi *axi; 96 - int ret; 97 - 98 - axi = devm_kzalloc(dev, sizeof(*axi), GFP_KERNEL); 99 - if (!axi) 100 - return ERR_PTR(-ENOMEM); 101 - 102 - ret = devm_add_action(dev, bt1_axi_clear_data, axi); 103 - if (ret) { 104 - dev_err(dev, "Can't add AXI EHB data clear action\n"); 105 - return ERR_PTR(ret); 106 - } 107 - 108 - axi->dev = dev; 109 - atomic_set(&axi->count, 0); 110 - platform_set_drvdata(pdev, axi); 111 - 112 - return axi; 113 - } 114 - 115 - static int bt1_axi_request_regs(struct bt1_axi *axi) 116 - { 117 - struct platform_device *pdev = to_platform_device(axi->dev); 118 - struct device *dev = axi->dev; 119 - 120 - axi->sys_regs = syscon_regmap_lookup_by_phandle(dev->of_node, "syscon"); 121 - if (IS_ERR(axi->sys_regs)) { 122 - dev_err(dev, "Couldn't find syscon registers\n"); 123 - return PTR_ERR(axi->sys_regs); 124 - } 125 - 126 - axi->qos_regs = devm_platform_ioremap_resource_byname(pdev, "qos"); 127 - if (IS_ERR(axi->qos_regs)) 128 - dev_err(dev, "Couldn't map AXI-bus QoS registers\n"); 129 - 130 - return PTR_ERR_OR_ZERO(axi->qos_regs); 131 - } 132 - 133 - static int bt1_axi_request_rst(struct bt1_axi *axi) 134 - { 135 - int ret; 136 - 137 - axi->arst = devm_reset_control_get_optional_exclusive(axi->dev, "arst"); 138 - if (IS_ERR(axi->arst)) 139 - return dev_err_probe(axi->dev, PTR_ERR(axi->arst), 140 - "Couldn't get reset control line\n"); 141 - 142 - ret = reset_control_deassert(axi->arst); 143 - if (ret) 144 - dev_err(axi->dev, "Failed to deassert the reset line\n"); 145 - 146 - return ret; 147 - } 148 - 149 - static int bt1_axi_request_clk(struct bt1_axi *axi) 150 - { 151 - axi->aclk = devm_clk_get_enabled(axi->dev, "aclk"); 152 - if (IS_ERR(axi->aclk)) 153 - return dev_err_probe(axi->dev, PTR_ERR(axi->aclk), 154 - "Couldn't get AXI Interconnect clock\n"); 155 - 156 - return 0; 157 - } 158 - 159 - static int bt1_axi_request_irq(struct bt1_axi *axi) 160 - { 161 - struct platform_device *pdev = to_platform_device(axi->dev); 162 - int ret; 163 - 164 - axi->irq = platform_get_irq(pdev, 0); 165 - if (axi->irq < 0) 166 - return axi->irq; 167 - 168 - ret = devm_request_irq(axi->dev, axi->irq, bt1_axi_isr, IRQF_SHARED, 169 - "bt1-axi", axi); 170 - if (ret) 171 - dev_err(axi->dev, "Couldn't request AXI EHB IRQ\n"); 172 - 173 - return ret; 174 - } 175 - 176 - static ssize_t count_show(struct device *dev, 177 - struct device_attribute *attr, char *buf) 178 - { 179 - struct bt1_axi *axi = dev_get_drvdata(dev); 180 - 181 - return scnprintf(buf, PAGE_SIZE, "%d\n", atomic_read(&axi->count)); 182 - } 183 - static DEVICE_ATTR_RO(count); 184 - 185 - static ssize_t inject_error_show(struct device *dev, 186 - struct device_attribute *attr, char *buf) 187 - { 188 - return scnprintf(buf, PAGE_SIZE, "Error injection: bus unaligned\n"); 189 - } 190 - 191 - static ssize_t inject_error_store(struct device *dev, 192 - struct device_attribute *attr, 193 - const char *data, size_t count) 194 - { 195 - struct bt1_axi *axi = dev_get_drvdata(dev); 196 - 197 - /* 198 - * Performing unaligned read from the memory will cause the CM2 bus 199 - * error while unaligned writing - the AXI bus write error handled 200 - * by this driver. 201 - */ 202 - if (sysfs_streq(data, "bus")) 203 - readb(axi->qos_regs); 204 - else if (sysfs_streq(data, "unaligned")) 205 - writeb(0, axi->qos_regs); 206 - else 207 - return -EINVAL; 208 - 209 - return count; 210 - } 211 - static DEVICE_ATTR_RW(inject_error); 212 - 213 - static struct attribute *bt1_axi_sysfs_attrs[] = { 214 - &dev_attr_count.attr, 215 - &dev_attr_inject_error.attr, 216 - NULL 217 - }; 218 - ATTRIBUTE_GROUPS(bt1_axi_sysfs); 219 - 220 - static void bt1_axi_remove_sysfs(void *data) 221 - { 222 - struct bt1_axi *axi = data; 223 - 224 - device_remove_groups(axi->dev, bt1_axi_sysfs_groups); 225 - } 226 - 227 - static int bt1_axi_init_sysfs(struct bt1_axi *axi) 228 - { 229 - int ret; 230 - 231 - ret = device_add_groups(axi->dev, bt1_axi_sysfs_groups); 232 - if (ret) { 233 - dev_err(axi->dev, "Failed to add sysfs files group\n"); 234 - return ret; 235 - } 236 - 237 - ret = devm_add_action_or_reset(axi->dev, bt1_axi_remove_sysfs, axi); 238 - if (ret) 239 - dev_err(axi->dev, "Can't add AXI EHB sysfs remove action\n"); 240 - 241 - return ret; 242 - } 243 - 244 - static int bt1_axi_probe(struct platform_device *pdev) 245 - { 246 - struct bt1_axi *axi; 247 - int ret; 248 - 249 - axi = bt1_axi_create_data(pdev); 250 - if (IS_ERR(axi)) 251 - return PTR_ERR(axi); 252 - 253 - ret = bt1_axi_request_regs(axi); 254 - if (ret) 255 - return ret; 256 - 257 - ret = bt1_axi_request_rst(axi); 258 - if (ret) 259 - return ret; 260 - 261 - ret = bt1_axi_request_clk(axi); 262 - if (ret) 263 - return ret; 264 - 265 - ret = bt1_axi_request_irq(axi); 266 - if (ret) 267 - return ret; 268 - 269 - ret = bt1_axi_init_sysfs(axi); 270 - if (ret) 271 - return ret; 272 - 273 - return 0; 274 - } 275 - 276 - static const struct of_device_id bt1_axi_of_match[] = { 277 - { .compatible = "baikal,bt1-axi" }, 278 - { } 279 - }; 280 - MODULE_DEVICE_TABLE(of, bt1_axi_of_match); 281 - 282 - static struct platform_driver bt1_axi_driver = { 283 - .probe = bt1_axi_probe, 284 - .driver = { 285 - .name = "bt1-axi", 286 - .of_match_table = bt1_axi_of_match 287 - } 288 - }; 289 - module_platform_driver(bt1_axi_driver); 290 - 291 - MODULE_AUTHOR("Serge Semin <Sergey.Semin@baikalelectronics.ru>"); 292 - MODULE_DESCRIPTION("Baikal-T1 AXI-bus driver");

+1 -6

drivers/cpufreq/airoha-cpufreq.c

··· 115 115 116 116 static int __init airoha_cpufreq_init(void) 117 117 { 118 - struct device_node *np = of_find_node_by_path("/"); 119 118 const struct of_device_id *match; 120 119 int ret; 121 120 122 - if (!np) 123 - return -ENODEV; 124 - 125 - match = of_match_node(airoha_cpufreq_match_list, np); 126 - of_node_put(np); 121 + match = of_machine_get_match(airoha_cpufreq_match_list); 127 122 if (!match) 128 123 return -ENODEV; 129 124

+2 -14

drivers/cpufreq/qcom-cpufreq-nvmem.c

··· 291 291 ret = qcom_smem_get_soc_id(&msm_id); 292 292 if (ret == -ENODEV) { 293 293 const struct of_device_id *match; 294 - struct device_node *root; 295 - 296 - root = of_find_node_by_path("/"); 297 - if (!root) { 298 - ret = -ENODEV; 299 - goto exit; 300 - } 301 294 302 295 /* Fallback to compatible match with no SMEM initialized */ 303 - match = of_match_node(qcom_cpufreq_ipq806x_match_list, root); 304 - of_node_put(root); 296 + match = of_machine_get_match(qcom_cpufreq_ipq806x_match_list); 305 297 if (!match) { 306 298 ret = -ENODEV; 307 299 goto exit; ··· 639 647 */ 640 648 static int __init qcom_cpufreq_init(void) 641 649 { 642 - struct device_node *np __free(device_node) = of_find_node_by_path("/"); 643 650 const struct of_device_id *match; 644 651 int ret; 645 652 646 - if (!np) 647 - return -ENODEV; 648 - 649 - match = of_match_node(qcom_cpufreq_match_list, np); 653 + match = of_machine_get_match(qcom_cpufreq_match_list); 650 654 if (!match) 651 655 return -ENODEV; 652 656

+1 -11

drivers/cpufreq/ti-cpufreq.c

··· 502 502 {}, 503 503 }; 504 504 505 - static const struct of_device_id *ti_cpufreq_match_node(void) 506 - { 507 - struct device_node *np __free(device_node) = of_find_node_by_path("/"); 508 - const struct of_device_id *match; 509 - 510 - match = of_match_node(ti_cpufreq_of_match, np); 511 - 512 - return match; 513 - } 514 - 515 505 static int ti_cpufreq_probe(struct platform_device *pdev) 516 506 { 517 507 u32 version[VERSION_COUNT]; ··· 586 596 const struct of_device_id *match; 587 597 588 598 /* Check to ensure we are on a compatible platform */ 589 - match = ti_cpufreq_match_node(); 599 + match = of_machine_get_match(ti_cpufreq_of_match); 590 600 if (match) 591 601 platform_device_register_data(NULL, "ti-cpufreq", -1, match, 592 602 sizeof(*match));

+6 -14

drivers/of/base.c

··· 463 463 EXPORT_SYMBOL_GPL(of_machine_read_model); 464 464 465 465 /** 466 - * of_machine_device_match - Test root of device tree against a of_device_id array 466 + * of_machine_get_match - Test root of device tree against an of_device_id array 467 467 * @matches: NULL terminated array of of_device_id match structures to search in 468 468 * 469 - * Returns true if the root node has any of the given compatible values in its 470 - * compatible property. 469 + * Returns matched entry or NULL 471 470 */ 472 - bool of_machine_device_match(const struct of_device_id *matches) 471 + const struct of_device_id *of_machine_get_match(const struct of_device_id *matches) 473 472 { 474 473 struct device_node *root; 475 474 const struct of_device_id *match = NULL; ··· 479 480 of_node_put(root); 480 481 } 481 482 482 - return match != NULL; 483 + return match; 483 484 } 484 - EXPORT_SYMBOL(of_machine_device_match); 485 + EXPORT_SYMBOL(of_machine_get_match); 485 486 486 487 /** 487 488 * of_machine_get_match_data - Tell if root of device tree has a matching of_match structure ··· 492 493 const void *of_machine_get_match_data(const struct of_device_id *matches) 493 494 { 494 495 const struct of_device_id *match; 495 - struct device_node *root; 496 496 497 - root = of_find_node_by_path("/"); 498 - if (!root) 499 - return NULL; 500 - 501 - match = of_match_node(matches, root); 502 - of_node_put(root); 503 - 497 + match = of_machine_get_match(matches); 504 498 if (!match) 505 499 return NULL; 506 500

+16 -26

drivers/of/fdt.c

··· 68 68 69 69 bool of_fdt_device_is_available(const void *blob, unsigned long node) 70 70 { 71 - const char *status = fdt_getprop(blob, node, "status", NULL); 71 + const char *status = fdt_stringlist_get(blob, node, "status", 0, NULL); 72 72 73 73 if (!status) 74 74 return true; ··· 677 677 * specific compatible values. 678 678 */ 679 679 static int of_fdt_is_compatible(const void *blob, 680 - unsigned long node, const char *compat) 680 + unsigned long node, const char *compat) 681 681 { 682 682 const char *cp; 683 - int cplen; 684 - unsigned long l, score = 0; 683 + int idx = 0, score = 0; 685 684 686 - cp = fdt_getprop(blob, node, "compatible", &cplen); 687 - if (cp == NULL) 688 - return 0; 689 - while (cplen > 0) { 685 + while ((cp = fdt_stringlist_get(blob, node, "compatible", idx++, NULL))) { 690 686 score++; 691 687 if (of_compat_cmp(cp, compat, strlen(compat)) == 0) 692 688 return score; 693 - l = strlen(cp) + 1; 694 - cp += l; 695 - cplen -= l; 696 689 } 697 690 698 691 return 0; ··· 734 741 const char *name; 735 742 unsigned long dt_root = of_get_flat_dt_root(); 736 743 737 - name = of_get_flat_dt_prop(dt_root, "model", NULL); 744 + name = fdt_stringlist_get(initial_boot_params, dt_root, "model", 0, NULL); 738 745 if (!name) 739 - name = of_get_flat_dt_prop(dt_root, "compatible", NULL); 746 + name = fdt_stringlist_get(initial_boot_params, dt_root, 747 + "compatible", 0, NULL); 740 748 return name; 741 749 } 742 750 ··· 769 775 } 770 776 if (!best_data) { 771 777 const char *prop; 772 - int size; 778 + int idx = 0, size; 773 779 774 780 pr_err("\n unrecognized device tree list:\n[ "); 775 781 776 - prop = of_get_flat_dt_prop(dt_root, "compatible", &size); 777 - if (prop) { 778 - while (size > 0) { 779 - printk("'%s' ", prop); 780 - size -= strlen(prop) + 1; 781 - prop += strlen(prop) + 1; 782 - } 783 - } 784 - printk("]\n\n"); 782 + while ((prop = fdt_stringlist_get(initial_boot_params, dt_root, 783 + "compatible", idx++, &size))) 784 + pr_err("'%s' ", prop); 785 + pr_err("]\n\n"); 785 786 return NULL; 786 787 } 787 788 ··· 963 974 if (offset < 0) 964 975 return -ENOENT; 965 976 966 - p = fdt_getprop(fdt, offset, "stdout-path", &l); 977 + p = fdt_stringlist_get(fdt, offset, "stdout-path", 0, &l); 967 978 if (!p) 968 - p = fdt_getprop(fdt, offset, "linux,stdout-path", &l); 979 + p = fdt_stringlist_get(fdt, offset, "linux,stdout-path", 0, &l); 969 980 if (!p || !l) 970 981 return -ENOENT; 971 982 ··· 1041 1052 const void *fdt = initial_boot_params; 1042 1053 1043 1054 fdt_for_each_subnode(node, fdt, 0) { 1044 - const char *type = of_get_flat_dt_prop(node, "device_type", NULL); 1055 + const char *type = fdt_stringlist_get(fdt, node, 1056 + "device_type", 0, NULL); 1045 1057 const __be32 *reg; 1046 1058 int i, l; 1047 1059 bool hotpluggable;

+9 -3

drivers/of/platform.c

··· 500 500 501 501 static int __init of_platform_default_populate_init(void) 502 502 { 503 - struct device_node *node; 503 + struct device_node *node, *reserved; 504 504 505 505 device_links_supplier_sync_state_pause(); 506 506 ··· 563 563 * platform_devices for every node in /reserved-memory with a 564 564 * "compatible", 565 565 */ 566 - for_each_matching_node(node, reserved_mem_matches) 567 - of_platform_device_create(node, NULL, NULL); 566 + reserved = of_find_node_by_path("/reserved-memory"); 567 + if (reserved) { 568 + for_each_child_of_node(reserved, node) { 569 + if (of_match_node(reserved_mem_matches, node)) 570 + of_platform_device_create(node, NULL, NULL); 571 + } 572 + of_node_put(reserved); 573 + } 568 574 569 575 node = of_find_node_by_path("/firmware"); 570 576 if (node) {

+26 -2

drivers/of/property.c

··· 88 88 * Search for a property in a device node and count the number of elements of 89 89 * size elem_size in it. 90 90 * 91 - * Return: The number of elements on sucess, -EINVAL if the property does not 91 + * Return: The number of elements on success, -EINVAL if the property does not 92 92 * exist or its length does not match a multiple of elem_size and -ENODATA if 93 93 * the property does not have a value. 94 94 */ ··· 1620 1620 return of_irq_get(to_of_node(fwnode), index); 1621 1621 } 1622 1622 1623 + static int match_property_by_path(const char *node_path, const char *prop_name, 1624 + const char *value) 1625 + { 1626 + struct device_node *np __free(device_node) = of_find_node_by_path(node_path); 1627 + 1628 + return of_property_match_string(np, prop_name, value); 1629 + } 1630 + 1631 + static bool of_is_fwnode_add_links_supported(void) 1632 + { 1633 + static int is_supported = -1; 1634 + 1635 + if (!IS_ENABLED(CONFIG_X86)) 1636 + return true; 1637 + 1638 + if (is_supported != -1) 1639 + return !!is_supported; 1640 + 1641 + is_supported = !((match_property_by_path("/soc", "compatible", "intel,ce4100-cp") >= 0) || 1642 + (match_property_by_path("/", "architecture", "OLPC") >= 0)); 1643 + 1644 + return !!is_supported; 1645 + } 1646 + 1623 1647 static int of_fwnode_add_links(struct fwnode_handle *fwnode) 1624 1648 { 1625 1649 const struct property *p; 1626 1650 struct device_node *con_np = to_of_node(fwnode); 1627 1651 1628 - if (IS_ENABLED(CONFIG_X86)) 1652 + if (!of_is_fwnode_add_links_supported()) 1629 1653 return 0; 1630 1654 1631 1655 if (!con_np)

+1 -3

drivers/of/unittest.c

··· 896 896 897 897 unittest(!of_changeset_apply(&chgset), "apply failed\n"); 898 898 899 - of_node_put(nchangeset); 900 - 901 899 /* Make sure node names are constructed correctly */ 902 900 unittest((np = of_find_node_by_path("/testcase-data/changeset/n2/n21")), 903 901 "'%pOF' not added\n", n21); ··· 917 919 if (!ret) 918 920 unittest(strcmp(propstr, "hello") == 0, "original value not in updated property after revert"); 919 921 922 + of_node_put(nchangeset); 920 923 of_changeset_destroy(&chgset); 921 924 922 925 of_node_put(n1); ··· 4317 4318 4318 4319 size = info->dtbo_end - info->dtbo_begin; 4319 4320 ret = of_overlay_fdt_apply(info->dtbo_begin, size, &ovcs_id, dn); 4320 - of_node_put(dn); 4321 4321 if (ret) 4322 4322 return ret; 4323 4323

+1 -1

drivers/soc/qcom/qcom_pd_mapper.c

··· 640 640 struct qcom_pdm_data *data; 641 641 int ret, i; 642 642 643 - match = of_match_node(qcom_pdm_domains, of_root); 643 + match = of_machine_get_match(qcom_pdm_domains); 644 644 if (!match) { 645 645 pr_notice("PDM: no support for the platform, userspace daemon might be required.\n"); 646 646 return ERR_PTR(-ENODEV);

+8 -3

include/linux/of.h

··· 410 410 extern int of_alias_get_highest_id(const char *stem); 411 411 412 412 bool of_machine_compatible_match(const char *const *compats); 413 - bool of_machine_device_match(const struct of_device_id *matches); 413 + const struct of_device_id *of_machine_get_match(const struct of_device_id *matches); 414 414 const void *of_machine_get_match_data(const struct of_device_id *matches); 415 415 416 416 /** ··· 880 880 return false; 881 881 } 882 882 883 - static inline bool of_machine_device_match(const struct of_device_id *matches) 883 + static inline const struct of_device_id *of_machine_get_match(const struct of_device_id *matches) 884 884 { 885 - return false; 885 + return NULL; 886 886 } 887 887 888 888 static inline const void * ··· 989 989 return -ENOSYS; 990 990 } 991 991 #endif 992 + 993 + static inline bool of_machine_device_match(const struct of_device_id *matches) 994 + { 995 + return of_machine_get_match(matches) != NULL; 996 + } 992 997 993 998 static inline struct device_node *of_find_matching_node( 994 999 struct device_node *from,

+1 -1

scripts/checkpatch.pl

··· 2929 2929 } 2930 2930 $checklicenseline = 1; 2931 2931 2932 - if ($realfile !~ /^MAINTAINERS/) { 2932 + if ($realfile !~ /^(MAINTAINERS|dev\/null)/) { 2933 2933 my $last_binding_patch = $is_binding_patch; 2934 2934 2935 2935 $is_binding_patch = () = $realfile =~ m@^(?:Documentation/devicetree/|include/dt-bindings/)@;

+1 -1

scripts/dtc/checks.c

··· 324 324 static void check_node_name_chars_strict(struct check *c, struct dt_info *dti, 325 325 struct node *node) 326 326 { 327 - int n = strspn(node->name, c->data); 327 + size_t n = strspn(node->name, c->data); 328 328 329 329 if (n < node->basenamelen) 330 330 FAIL(c, dti, node, "Character '%c' not recommended in node name",

-3

scripts/dtc/dtc-lexer.l

··· 39 39 #define DPRINT(fmt, ...) do { } while (0) 40 40 #endif 41 41 42 - static int dts_version = 1; 43 - 44 42 #define BEGIN_DEFAULT() DPRINT("<V1>\n"); \ 45 43 BEGIN(V1); \ 46 44 ··· 99 101 100 102 <*>"/dts-v1/" { 101 103 DPRINT("Keyword: /dts-v1/\n"); 102 - dts_version = 1; 103 104 BEGIN_DEFAULT(); 104 105 return DT_V1; 105 106 }

+1 -1

scripts/dtc/dtc.h

··· 227 227 struct node *next_sibling; 228 228 229 229 char *fullpath; 230 - int basenamelen; 230 + size_t basenamelen; 231 231 232 232 cell_t phandle; 233 233 int addr_cells, size_cells;

+8

scripts/dtc/libfdt/fdt.c

··· 110 110 || (fdt_totalsize(fdt) > INT_MAX)) 111 111 return -FDT_ERR_TRUNCATED; 112 112 113 + /* memrsv block must be 8 byte aligned */ 114 + if (fdt_off_mem_rsvmap(fdt) % sizeof(uint64_t)) 115 + return -FDT_ERR_ALIGNMENT; 116 + 117 + /* Structure block must be 4 byte aligned */ 118 + if (fdt_off_dt_struct(fdt) % FDT_TAGSIZE) 119 + return -FDT_ERR_ALIGNMENT; 120 + 113 121 /* Bounds check memrsv block */ 114 122 if (!check_off_(hdrsize, fdt_totalsize(fdt), 115 123 fdt_off_mem_rsvmap(fdt)))

+7 -2

scripts/dtc/libfdt/fdt_rw.c

··· 22 22 (fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt))); 23 23 } 24 24 25 + static void fdt_downgrade_version(void *fdt) 26 + { 27 + if (!can_assume(LATEST) && fdt_version(fdt) > FDT_LAST_SUPPORTED_VERSION) 28 + fdt_set_version(fdt, FDT_LAST_SUPPORTED_VERSION); 29 + } 30 + 25 31 static int fdt_rw_probe_(void *fdt) 26 32 { 27 33 if (can_assume(VALID_DTB)) ··· 39 33 if (fdt_blocks_misordered_(fdt, sizeof(struct fdt_reserve_entry), 40 34 fdt_size_dt_struct(fdt))) 41 35 return -FDT_ERR_BADLAYOUT; 42 - if (!can_assume(LATEST) && fdt_version(fdt) > 17) 43 - fdt_set_version(fdt, 17); 44 36 37 + fdt_downgrade_version(fdt); 45 38 return 0; 46 39 } 47 40

+1 -1

scripts/dtc/version_gen.h

··· 1 - #define DTC_VERSION "DTC 1.7.2-ga26ef640" 1 + #define DTC_VERSION "DTC 1.7.2-g53373d13"

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