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phy: qcom-qmp-usb: remove QPHY_PCS_LFPS_RXTERM_IRQ_STATUS reg

The QPHY_PCS_LFPS_RXTERM_IRQ_STATUS register is not used, remove it from
register layout.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221110192248.873973-10-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Dmitry Baryshkov and committed by
Vinod Koul
e3c3f7cf 5db22640

+1 -6
+1
drivers/phy/qualcomm/phy-qcom-qmp-pcs-v2.h
··· 28 28 #define QPHY_V2_PCS_FLL_CNT_VAL_L 0x0c8 29 29 #define QPHY_V2_PCS_FLL_CNT_VAL_H_TOL 0x0cc 30 30 #define QPHY_V2_PCS_FLL_MAN_CODE 0x0d0 31 + #define QPHY_V2_PCS_LFPS_RXTERM_IRQ_STATUS 0x178 31 32 #define QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME_AUXCLK_LSB 0x1a8 32 33 #define QPHY_V2_PCS_OSC_DTCT_ACTIONS 0x1ac 33 34 #define QPHY_V2_PCS_RX_SIGDET_LVL 0x1d8
-6
drivers/phy/qualcomm/phy-qcom-qmp-usb.c
··· 54 54 /* QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR register bits */ 55 55 #define IRQ_CLEAR BIT(0) 56 56 57 - /* QPHY_PCS_LFPS_RXTERM_IRQ_STATUS register bits */ 58 - #define RCVR_DETECT BIT(0) 59 - 60 57 /* QPHY_V3_PCS_MISC_CLAMP_ENABLE register bits */ 61 58 #define CLAMP_EN BIT(0) /* enables i/o clamp_n */ 62 59 ··· 91 94 QPHY_PCS_STATUS, 92 95 QPHY_PCS_AUTONOMOUS_MODE_CTRL, 93 96 QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR, 94 - QPHY_PCS_LFPS_RXTERM_IRQ_STATUS, 95 97 QPHY_PCS_POWER_DOWN_CONTROL, 96 98 /* PCS_MISC registers */ 97 99 QPHY_PCS_MISC_TYPEC_CTRL, ··· 104 108 [QPHY_PCS_STATUS] = 0x17c, 105 109 [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = 0x0d4, 106 110 [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = 0x0d8, 107 - [QPHY_PCS_LFPS_RXTERM_IRQ_STATUS] = 0x178, 108 111 [QPHY_PCS_POWER_DOWN_CONTROL] = 0x04, 109 112 }; 110 113 ··· 113 118 [QPHY_PCS_STATUS] = 0x174, 114 119 [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = 0x0d8, 115 120 [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = 0x0dc, 116 - [QPHY_PCS_LFPS_RXTERM_IRQ_STATUS] = 0x170, 117 121 [QPHY_PCS_POWER_DOWN_CONTROL] = 0x04, 118 122 }; 119 123