Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
PM / devfreq: rk3399_dmc: Support new disable-freq properties
Implement the newly-defined properties to allow disabling certain
power-saving-at-idle features at higher frequencies.
This is a rewritten version of work by Lin Huang <hl@rock-chips.com>.
Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
authored by
Brian Norris
and committed by
Chanwoo Choi
e4421721
a5ca1854
+47
-4
+47
-4
drivers/devfreq/rk3399_dmc.c
+47
-4
drivers/devfreq/rk3399_dmc.c
···
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unsigned int ddr3_odt_dis_freq;
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unsigned int lpddr3_odt_dis_freq;
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unsigned int lpddr4_odt_dis_freq;
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+
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unsigned int pd_idle_dis_freq;
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unsigned int sr_idle_dis_freq;
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unsigned int sr_mc_gate_idle_dis_freq;
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unsigned int srpd_lite_idle_dis_freq;
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unsigned int standby_idle_dis_freq;
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};
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static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq,
···
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mutex_lock(&dmcfreq->lock);
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if (dmcfreq->regmap_pmu) {
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unsigned int odt_pd_arg0 = dmcfreq->odt_pd_arg0;
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unsigned int odt_pd_arg1 = dmcfreq->odt_pd_arg1;
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unsigned int odt_pd_arg2 = 0;
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if (target_rate >= dmcfreq->sr_idle_dis_freq)
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odt_pd_arg0 &= ~RK3399_SET_ODT_PD_0_SR_IDLE;
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if (target_rate >= dmcfreq->sr_mc_gate_idle_dis_freq)
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odt_pd_arg0 &= ~RK3399_SET_ODT_PD_0_SR_MC_GATE_IDLE;
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if (target_rate >= dmcfreq->standby_idle_dis_freq)
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odt_pd_arg0 &= ~RK3399_SET_ODT_PD_0_STANDBY_IDLE;
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if (target_rate >= dmcfreq->pd_idle_dis_freq)
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odt_pd_arg1 &= ~RK3399_SET_ODT_PD_1_PD_IDLE;
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if (target_rate >= dmcfreq->srpd_lite_idle_dis_freq)
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odt_pd_arg1 &= ~RK3399_SET_ODT_PD_1_SRPD_LITE_IDLE;
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if (target_rate >= dmcfreq->odt_dis_freq)
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odt_pd_arg2 |= RK3399_SET_ODT_PD_2_ODT_ENABLE;
···
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* (power-down) timings and to enable or disable the
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* ODT (on-die termination) resistors.
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*/
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arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, dmcfreq->odt_pd_arg0,
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dmcfreq->odt_pd_arg1,
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ROCKCHIP_SIP_CONFIG_DRAM_SET_ODT_PD,
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odt_pd_arg2, 0, 0, 0, &res);
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arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, odt_pd_arg0, odt_pd_arg1,
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ROCKCHIP_SIP_CONFIG_DRAM_SET_ODT_PD, odt_pd_arg2,
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0, 0, 0, &res);
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}
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/*
···
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{
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int ret = 0;
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/*
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* These are all optional, and serve as minimum bounds. Give them large
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* (i.e., never "disabled") values if the DT doesn't specify one.
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*/
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data->pd_idle_dis_freq =
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data->sr_idle_dis_freq =
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data->sr_mc_gate_idle_dis_freq =
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data->srpd_lite_idle_dis_freq =
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data->standby_idle_dis_freq = UINT_MAX;
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ret |= of_property_read_u32(np, "rockchip,pd_idle",
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&data->pd_idle);
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ret |= of_property_read_u32(np, "rockchip,sr_idle",
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&data->lpddr3_odt_dis_freq);
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ret |= of_property_read_u32(np, "rockchip,lpddr4_odt_dis_freq",
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&data->lpddr4_odt_dis_freq);
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ret |= of_property_read_u32(np, "rockchip,pd-idle-dis-freq-hz",
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&data->pd_idle_dis_freq);
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ret |= of_property_read_u32(np, "rockchip,sr-idle-dis-freq-hz",
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&data->sr_idle_dis_freq);
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ret |= of_property_read_u32(np, "rockchip,sr-mc-gate-idle-dis-freq-hz",
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&data->sr_mc_gate_idle_dis_freq);
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ret |= of_property_read_u32(np, "rockchip,srpd-lite-idle-dis-freq-hz",
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&data->srpd_lite_idle_dis_freq);
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ret |= of_property_read_u32(np, "rockchip,standby-idle-dis-freq-hz",
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&data->standby_idle_dis_freq);
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return ret;
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}