drm/msm/dp: split dp_ctrl_clk_enable into four functuions

+108 -126

drivers/gpu/drm/msm/dp/dp_ctrl.c

··· 69 69 u8 tu_size_minus1; 70 70 }; 71 71 72 - struct dss_module_power { 73 - unsigned int num_clk; 74 - struct clk_bulk_data *clocks; 75 - }; 76 - 77 72 struct dp_ctrl_private { 78 73 struct dp_ctrl dp_ctrl; 79 74 struct drm_device *drm_dev; ··· 79 84 struct dp_parser *parser; 80 85 struct dp_catalog *catalog; 81 86 82 - struct dss_module_power mp[DP_MAX_PM]; 87 + unsigned int num_core_clks; 88 + struct clk_bulk_data *core_clks; 89 + 90 + unsigned int num_link_clks; 91 + struct clk_bulk_data *link_clks; 92 + 83 93 struct clk *pixel_clk; 84 94 85 95 struct completion idle_comp; ··· 95 95 bool link_clks_on; 96 96 bool stream_clks_on; 97 97 }; 98 - 99 - static inline const char *dp_pm_name(enum dp_pm_type module) 100 - { 101 - switch (module) { 102 - case DP_CORE_PM: return "DP_CORE_PM"; 103 - case DP_CTRL_PM: return "DP_CTRL_PM"; 104 - default: return "???"; 105 - } 106 - } 107 98 108 99 static int dp_aux_link_configure(struct drm_dp_aux *aux, 109 100 struct dp_link_info *link) ··· 1323 1332 return ret; 1324 1333 } 1325 1334 1326 - int dp_ctrl_clk_enable(struct dp_ctrl *dp_ctrl, 1327 - enum dp_pm_type pm_type, bool enable) 1335 + int dp_ctrl_core_clk_enable(struct dp_ctrl *dp_ctrl) 1328 1336 { 1329 1337 struct dp_ctrl_private *ctrl; 1330 - struct dss_module_power *mp; 1331 1338 int ret = 0; 1332 1339 1333 1340 ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); 1334 1341 1335 - if (pm_type != DP_CORE_PM && 1336 - pm_type != DP_CTRL_PM) { 1337 - DRM_ERROR("unsupported ctrl module: %s\n", 1338 - dp_pm_name(pm_type)); 1339 - return -EINVAL; 1342 + if (ctrl->core_clks_on) { 1343 + drm_dbg_dp(ctrl->drm_dev, "core clks already enabled\n"); 1344 + return 0; 1340 1345 } 1341 1346 1342 - if (enable) { 1343 - if (pm_type == DP_CORE_PM && ctrl->core_clks_on) { 1344 - drm_dbg_dp(ctrl->drm_dev, 1345 - "core clks already enabled\n"); 1346 - return 0; 1347 - } 1347 + ret = clk_bulk_prepare_enable(ctrl->num_core_clks, ctrl->core_clks); 1348 + if (ret) 1349 + return ret; 1348 1350 1349 - if (pm_type == DP_CTRL_PM && ctrl->link_clks_on) { 1350 - drm_dbg_dp(ctrl->drm_dev, 1351 - "links clks already enabled\n"); 1352 - return 0; 1353 - } 1351 + ctrl->core_clks_on = true; 1354 1352 1355 - if ((pm_type == DP_CTRL_PM) && (!ctrl->core_clks_on)) { 1356 - drm_dbg_dp(ctrl->drm_dev, 1357 - "Enable core clks before link clks\n"); 1358 - mp = &ctrl->mp[DP_CORE_PM]; 1359 - 1360 - ret = clk_bulk_prepare_enable(mp->num_clk, mp->clocks); 1361 - if (ret) 1362 - return ret; 1363 - 1364 - ctrl->core_clks_on = true; 1365 - } 1366 - } 1367 - 1368 - mp = &ctrl->mp[pm_type]; 1369 - if (enable) { 1370 - ret = clk_bulk_prepare_enable(mp->num_clk, mp->clocks); 1371 - if (ret) 1372 - return ret; 1373 - } else { 1374 - clk_bulk_disable_unprepare(mp->num_clk, mp->clocks); 1375 - } 1376 - 1377 - if (pm_type == DP_CORE_PM) 1378 - ctrl->core_clks_on = enable; 1379 - else 1380 - ctrl->link_clks_on = enable; 1381 - 1382 - drm_dbg_dp(ctrl->drm_dev, "%s clocks for %s\n", 1383 - enable ? "enable" : "disable", 1384 - dp_pm_name(pm_type)); 1385 - drm_dbg_dp(ctrl->drm_dev, 1386 - "stream_clks:%s link_clks:%s core_clks:%s\n", 1353 + drm_dbg_dp(ctrl->drm_dev, "enable core clocks \n"); 1354 + drm_dbg_dp(ctrl->drm_dev, "stream_clks:%s link_clks:%s core_clks:%s\n", 1387 1355 ctrl->stream_clks_on ? "on" : "off", 1388 1356 ctrl->link_clks_on ? "on" : "off", 1389 1357 ctrl->core_clks_on ? "on" : "off"); 1390 1358 1391 1359 return 0; 1360 + } 1361 + 1362 + void dp_ctrl_core_clk_disable(struct dp_ctrl *dp_ctrl) 1363 + { 1364 + struct dp_ctrl_private *ctrl; 1365 + 1366 + ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); 1367 + 1368 + clk_bulk_disable_unprepare(ctrl->num_core_clks, ctrl->core_clks); 1369 + 1370 + ctrl->core_clks_on = false; 1371 + 1372 + drm_dbg_dp(ctrl->drm_dev, "disable core clocks \n"); 1373 + drm_dbg_dp(ctrl->drm_dev, "stream_clks:%s link_clks:%s core_clks:%s\n", 1374 + ctrl->stream_clks_on ? "on" : "off", 1375 + ctrl->link_clks_on ? "on" : "off", 1376 + ctrl->core_clks_on ? "on" : "off"); 1377 + } 1378 + 1379 + static int dp_ctrl_link_clk_enable(struct dp_ctrl *dp_ctrl) 1380 + { 1381 + struct dp_ctrl_private *ctrl; 1382 + int ret = 0; 1383 + 1384 + ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); 1385 + 1386 + if (ctrl->link_clks_on) { 1387 + drm_dbg_dp(ctrl->drm_dev, "links clks already enabled\n"); 1388 + return 0; 1389 + } 1390 + 1391 + if (!ctrl->core_clks_on) { 1392 + drm_dbg_dp(ctrl->drm_dev, "Enable core clks before link clks\n"); 1393 + 1394 + dp_ctrl_core_clk_enable(dp_ctrl); 1395 + } 1396 + 1397 + ret = clk_bulk_prepare_enable(ctrl->num_link_clks, ctrl->link_clks); 1398 + if (ret) 1399 + return ret; 1400 + 1401 + ctrl->link_clks_on = true; 1402 + 1403 + drm_dbg_dp(ctrl->drm_dev, "enale link clocks\n"); 1404 + drm_dbg_dp(ctrl->drm_dev, "stream_clks:%s link_clks:%s core_clks:%s\n", 1405 + ctrl->stream_clks_on ? "on" : "off", 1406 + ctrl->link_clks_on ? "on" : "off", 1407 + ctrl->core_clks_on ? "on" : "off"); 1408 + 1409 + return 0; 1410 + } 1411 + 1412 + static void dp_ctrl_link_clk_disable(struct dp_ctrl *dp_ctrl) 1413 + { 1414 + struct dp_ctrl_private *ctrl; 1415 + 1416 + ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); 1417 + 1418 + clk_bulk_disable_unprepare(ctrl->num_link_clks, ctrl->link_clks); 1419 + 1420 + ctrl->link_clks_on = false; 1421 + 1422 + drm_dbg_dp(ctrl->drm_dev, "disabled link clocks\n"); 1423 + drm_dbg_dp(ctrl->drm_dev, "stream_clks:%s link_clks:%s core_clks:%s\n", 1424 + ctrl->stream_clks_on ? "on" : "off", 1425 + ctrl->link_clks_on ? "on" : "off", 1426 + ctrl->core_clks_on ? "on" : "off"); 1392 1427 } 1393 1428 1394 1429 static int dp_ctrl_enable_mainlink_clocks(struct dp_ctrl_private *ctrl) ··· 1433 1416 phy_power_on(phy); 1434 1417 1435 1418 dev_pm_opp_set_rate(ctrl->dev, ctrl->link->link_params.rate * 1000); 1436 - ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, true); 1419 + ret = dp_ctrl_link_clk_enable(&ctrl->dp_ctrl); 1437 1420 if (ret) 1438 1421 DRM_ERROR("Unable to start link clocks. ret=%d\n", ret); 1439 1422 ··· 1581 1564 * link maintenance. 1582 1565 */ 1583 1566 dev_pm_opp_set_rate(ctrl->dev, 0); 1584 - ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); 1585 - if (ret) { 1586 - DRM_ERROR("Failed to disable clocks. ret=%d\n", ret); 1587 - return ret; 1588 - } 1567 + 1568 + dp_ctrl_link_clk_disable(&ctrl->dp_ctrl); 1569 + 1589 1570 phy_power_off(phy); 1590 1571 /* hw recommended delay before re-enabling clocks */ 1591 1572 msleep(20); ··· 1601 1586 { 1602 1587 struct dp_io *dp_io; 1603 1588 struct phy *phy; 1604 - int ret; 1605 1589 1606 1590 dp_io = &ctrl->parser->io; 1607 1591 phy = dp_io->phy; ··· 1610 1596 dp_catalog_ctrl_reset(ctrl->catalog); 1611 1597 1612 1598 dev_pm_opp_set_rate(ctrl->dev, 0); 1613 - ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); 1614 - if (ret) { 1615 - DRM_ERROR("Failed to disable link clocks. ret=%d\n", ret); 1616 - } 1599 + dp_ctrl_link_clk_disable(&ctrl->dp_ctrl); 1617 1600 1618 1601 phy_power_off(phy); 1619 1602 ··· 1714 1703 * running. Add the global reset just before disabling the 1715 1704 * link clocks and core clocks. 1716 1705 */ 1717 - ret = dp_ctrl_off(&ctrl->dp_ctrl); 1718 - if (ret) { 1719 - DRM_ERROR("failed to disable DP controller\n"); 1720 - return ret; 1721 - } 1706 + dp_ctrl_off(&ctrl->dp_ctrl); 1722 1707 1723 1708 ret = dp_ctrl_on_link(&ctrl->dp_ctrl); 1724 1709 if (ret) { ··· 1830 1823 rate = ctrl->panel->link_info.rate; 1831 1824 pixel_rate = ctrl->panel->dp_mode.drm_mode.clock; 1832 1825 1833 - dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CORE_PM, true); 1826 + dp_ctrl_core_clk_enable(&ctrl->dp_ctrl); 1834 1827 1835 1828 if (ctrl->link->sink_request & DP_TEST_LINK_PHY_TEST_PATTERN) { 1836 1829 drm_dbg_dp(ctrl->drm_dev, ··· 2026 2019 return ret; 2027 2020 } 2028 2021 2029 - int dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl) 2022 + void dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl) 2030 2023 { 2031 2024 struct dp_ctrl_private *ctrl; 2032 2025 struct dp_io *dp_io; 2033 2026 struct phy *phy; 2034 - int ret; 2035 2027 2036 2028 ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); 2037 2029 dp_io = &ctrl->parser->io; ··· 2047 2041 } 2048 2042 2049 2043 dev_pm_opp_set_rate(ctrl->dev, 0); 2050 - ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); 2051 - if (ret) { 2052 - DRM_ERROR("Failed to disable link clocks. ret=%d\n", ret); 2053 - return ret; 2054 - } 2044 + dp_ctrl_link_clk_disable(&ctrl->dp_ctrl); 2055 2045 2056 2046 phy_power_off(phy); 2057 2047 ··· 2057 2055 2058 2056 drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n", 2059 2057 phy, phy->init_count, phy->power_count); 2060 - return ret; 2061 2058 } 2062 2059 2063 - int dp_ctrl_off_link(struct dp_ctrl *dp_ctrl) 2060 + void dp_ctrl_off_link(struct dp_ctrl *dp_ctrl) 2064 2061 { 2065 2062 struct dp_ctrl_private *ctrl; 2066 2063 struct dp_io *dp_io; 2067 2064 struct phy *phy; 2068 - int ret; 2069 2065 2070 2066 ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); 2071 2067 dp_io = &ctrl->parser->io; ··· 2071 2071 2072 2072 dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); 2073 2073 2074 - ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); 2075 - if (ret) { 2076 - DRM_ERROR("Failed to disable link clocks. ret=%d\n", ret); 2077 - } 2074 + dp_ctrl_link_clk_disable(&ctrl->dp_ctrl); 2078 2075 2079 2076 DRM_DEBUG_DP("Before, phy=%p init_count=%d power_on=%d\n", 2080 2077 phy, phy->init_count, phy->power_count); ··· 2080 2083 2081 2084 DRM_DEBUG_DP("After, phy=%p init_count=%d power_on=%d\n", 2082 2085 phy, phy->init_count, phy->power_count); 2083 - 2084 - return ret; 2085 2086 } 2086 2087 2087 - int dp_ctrl_off(struct dp_ctrl *dp_ctrl) 2088 + void dp_ctrl_off(struct dp_ctrl *dp_ctrl) 2088 2089 { 2089 2090 struct dp_ctrl_private *ctrl; 2090 2091 struct dp_io *dp_io; 2091 2092 struct phy *phy; 2092 - int ret = 0; 2093 - 2094 - if (!dp_ctrl) 2095 - return -EINVAL; 2096 2093 2097 2094 ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); 2098 2095 dp_io = &ctrl->parser->io; ··· 2102 2111 } 2103 2112 2104 2113 dev_pm_opp_set_rate(ctrl->dev, 0); 2105 - ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); 2106 - if (ret) { 2107 - DRM_ERROR("Failed to disable link clocks. ret=%d\n", ret); 2108 - } 2114 + dp_ctrl_link_clk_disable(&ctrl->dp_ctrl); 2109 2115 2110 2116 phy_power_off(phy); 2111 2117 drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n", 2112 2118 phy, phy->init_count, phy->power_count); 2113 - 2114 - return ret; 2115 2119 } 2116 2120 2117 2121 irqreturn_t dp_ctrl_isr(struct dp_ctrl *dp_ctrl) ··· 2167 2181 static int dp_ctrl_clk_init(struct dp_ctrl *dp_ctrl) 2168 2182 { 2169 2183 struct dp_ctrl_private *ctrl; 2170 - struct dss_module_power *core, *link; 2171 2184 struct device *dev; 2172 2185 int i, rc; 2173 2186 2174 2187 ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); 2175 2188 dev = ctrl->dev; 2176 2189 2177 - core = &ctrl->mp[DP_CORE_PM]; 2178 - link = &ctrl->mp[DP_CTRL_PM]; 2179 - 2180 - core->num_clk = ARRAY_SIZE(core_clks); 2181 - core->clocks = devm_kcalloc(dev, core->num_clk, sizeof(*core->clocks), GFP_KERNEL); 2182 - if (!core->clocks) 2190 + ctrl->num_core_clks = ARRAY_SIZE(core_clks); 2191 + ctrl->core_clks = devm_kcalloc(dev, ctrl->num_core_clks, sizeof(*ctrl->core_clks), GFP_KERNEL); 2192 + if (!ctrl->core_clks) 2183 2193 return -ENOMEM; 2184 2194 2185 - for (i = 0; i < core->num_clk; i++) 2186 - core->clocks[i].id = core_clks[i]; 2195 + for (i = 0; i < ctrl->num_core_clks; i++) 2196 + ctrl->core_clks[i].id = core_clks[i]; 2187 2197 2188 - rc = devm_clk_bulk_get(dev, core->num_clk, core->clocks); 2198 + rc = devm_clk_bulk_get(dev, ctrl->num_core_clks, ctrl->core_clks); 2189 2199 if (rc) 2190 2200 return rc; 2191 2201 2192 - link->num_clk = ARRAY_SIZE(ctrl_clks); 2193 - link->clocks = devm_kcalloc(dev, link->num_clk, sizeof(*link->clocks), GFP_KERNEL); 2194 - if (!link->clocks) 2202 + ctrl->num_link_clks = ARRAY_SIZE(ctrl_clks); 2203 + ctrl->link_clks = devm_kcalloc(dev, ctrl->num_link_clks, sizeof(*ctrl->link_clks), GFP_KERNEL); 2204 + if (!ctrl->link_clks) 2195 2205 return -ENOMEM; 2196 2206 2197 - for (i = 0; i < link->num_clk; i++) 2198 - link->clocks[i].id = ctrl_clks[i]; 2207 + for (i = 0; i < ctrl->num_link_clks; i++) 2208 + ctrl->link_clks[i].id = ctrl_clks[i]; 2199 2209 2200 - rc = devm_clk_bulk_get(dev, link->num_clk, link->clocks); 2210 + rc = devm_clk_bulk_get(dev, ctrl->num_link_clks, ctrl->link_clks); 2201 2211 if (rc) 2202 2212 return rc; 2203 2213

+5 -11

drivers/gpu/drm/msm/dp/dp_ctrl.h

··· 17 17 bool wide_bus_en; 18 18 }; 19 19 20 - enum dp_pm_type { 21 - DP_CORE_PM, 22 - DP_CTRL_PM, 23 - DP_MAX_PM 24 - }; 25 - 26 20 int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl); 27 21 int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl, bool force_link_train); 28 - int dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl); 29 - int dp_ctrl_off_link(struct dp_ctrl *dp_ctrl); 30 - int dp_ctrl_off(struct dp_ctrl *dp_ctrl); 22 + void dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl); 23 + void dp_ctrl_off_link(struct dp_ctrl *dp_ctrl); 24 + void dp_ctrl_off(struct dp_ctrl *dp_ctrl); 31 25 void dp_ctrl_push_idle(struct dp_ctrl *dp_ctrl); 32 26 irqreturn_t dp_ctrl_isr(struct dp_ctrl *dp_ctrl); 33 27 void dp_ctrl_handle_sink_request(struct dp_ctrl *dp_ctrl); ··· 38 44 void dp_ctrl_set_psr(struct dp_ctrl *dp_ctrl, bool enable); 39 45 void dp_ctrl_config_psr(struct dp_ctrl *dp_ctrl); 40 46 41 - int dp_ctrl_clk_enable(struct dp_ctrl *ctrl, enum dp_pm_type pm_type, 42 - bool enable); 47 + int dp_ctrl_core_clk_enable(struct dp_ctrl *dp_ctrl); 48 + void dp_ctrl_core_clk_disable(struct dp_ctrl *dp_ctrl); 43 49 44 50 #endif /* _DP_CTRL_H_ */

+2 -2

drivers/gpu/drm/msm/dp/dp_display.c

··· 433 433 dp->dp_display.connector_type, dp->core_initialized, 434 434 dp->phy_initialized); 435 435 436 - dp_ctrl_clk_enable(dp->ctrl, DP_CORE_PM, true); 436 + dp_ctrl_core_clk_enable(dp->ctrl); 437 437 dp_ctrl_reset_irq_ctrl(dp->ctrl, true); 438 438 dp_aux_init(dp->aux); 439 439 dp->core_initialized = true; ··· 447 447 448 448 dp_ctrl_reset_irq_ctrl(dp->ctrl, false); 449 449 dp_aux_deinit(dp->aux); 450 - dp_ctrl_clk_enable(dp->ctrl, DP_CORE_PM, false); 450 + dp_ctrl_core_clk_disable(dp->ctrl); 451 451 dp->core_initialized = false; 452 452 } 453 453

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