tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/amd/display: Refactor HWSS into component folder

[why]
Rename hw_sequencer to hwseq.
Move all hwseq files to unique
folder hwss.

[how]
creating hwss repo in dc, and moved the dcnxx_hwseq.c
and .h files into corresponding new folders inside the hwss
and cleared the linkage errors by adding relative paths
in the Makefile.template.

Reviewed-by: Martin Leung <martin.leung@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Mounika Adhuri <moadhuri@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Mounika Adhuri and committed by
Alex Deucher e53524cd d0a767f7

+300 -116
+1
drivers/gpu/drm/amd/display/Makefile
··· 29 29 subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/ 30 30 subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/inc/hw 31 31 subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/clk_mgr 32 + subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/hwss 32 33 subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/modules/inc 33 34 subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/modules/freesync 34 35 subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/modules/color
+1 -1
drivers/gpu/drm/amd/display/dc/Makefile
··· 22 22 # 23 23 # Makefile for Display Core (dc) component. 24 24 25 - DC_LIBS = basics bios clk_mgr dce gpio irq link virtual dsc 25 + DC_LIBS = basics bios dml clk_mgr dce gpio hwss irq link virtual dsc 26 26 27 27 ifdef CONFIG_DRM_AMD_DC_FP 28 28
+1 -1
drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/dce120_clk_mgr.c
··· 30 30 #include "dce110/dce110_clk_mgr.h" 31 31 #include "dce120_clk_mgr.h" 32 32 #include "dce100/dce_clk_mgr.h" 33 - #include "dce120/dce120_hw_sequencer.h" 33 + #include "dce120/dce120_hwseq.h" 34 34 35 35 static const struct state_dependent_clocks dce120_max_clks_by_state[] = { 36 36 /*ClocksStateInvalid - should not be used*/
+1 -1
drivers/gpu/drm/amd/display/dc/dc.h
··· 35 35 #include "grph_object_ctrl_defs.h" 36 36 #include <inc/hw/opp.h> 37 37 38 - #include "inc/hw_sequencer.h" 38 + #include "hwss/hw_sequencer.h" 39 39 #include "inc/compressor.h" 40 40 #include "inc/hw/dmcu.h" 41 41 #include "dml/display_mode_lib.h"
+1 -1
drivers/gpu/drm/amd/display/dc/dce/Makefile
··· 26 26 # - register programming through common macros that look up register 27 27 # offset/shift/mask stored in dce_hw struct 28 28 29 - DCE = dce_audio.o dce_stream_encoder.o dce_link_encoder.o dce_hwseq.o \ 29 + DCE = dce_audio.o dce_stream_encoder.o dce_link_encoder.o \ 30 30 dce_mem_input.o dce_clock_source.o dce_scl_filters.o dce_transform.o \ 31 31 dce_opp.o dce_dmcu.o dce_abm.o dce_ipp.o dce_aux.o \ 32 32 dce_i2c.o dce_i2c_hw.o dce_i2c_sw.o dmub_psr.o dmub_abm.o dmub_abm_lcd.o dce_panel_cntl.o \
drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.c
drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h
+1 -1
drivers/gpu/drm/amd/display/dc/dce100/Makefile
··· 25 25 26 26 CFLAGS_$(AMDDALPATH)/dc/dce100/dce100_resource.o = $(call cc-disable-warning, override-init) 27 27 28 - DCE100 = dce100_resource.o dce100_hw_sequencer.o 28 + DCE100 = dce100_resource.o 29 29 30 30 AMD_DAL_DCE100 = $(addprefix $(AMDDALPATH)/dc/dce100/,$(DCE100)) 31 31
+2 -2
drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c drivers/gpu/drm/amd/display/dc/hwss/dce100/dce100_hwseq.c
··· 26 26 #include "dc.h" 27 27 #include "core_types.h" 28 28 #include "clk_mgr.h" 29 - #include "dce100_hw_sequencer.h" 29 + #include "dce100_hwseq.h" 30 30 #include "resource.h" 31 31 32 - #include "dce110/dce110_hw_sequencer.h" 32 + #include "dce110/dce110_hwseq.h" 33 33 34 34 /* include DCE10 register header files */ 35 35 #include "dce/dce_10_0_d.h"
drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.h drivers/gpu/drm/amd/display/dc/hwss/dce100/dce100_hwseq.h
+2 -2
drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
··· 30 30 31 31 #include "resource.h" 32 32 #include "include/irq_service_interface.h" 33 - #include "../virtual/virtual_stream_encoder.h" 33 + #include "virtual/virtual_stream_encoder.h" 34 34 #include "dce110/dce110_resource.h" 35 35 #include "dce110/dce110_timing_generator.h" 36 36 #include "irq/dce110/irq_service_dce110.h" ··· 43 43 #include "dce/dce_clock_source.h" 44 44 #include "dce/dce_audio.h" 45 45 #include "dce/dce_hwseq.h" 46 - #include "dce100/dce100_hw_sequencer.h" 46 + #include "dce100/dce100_hwseq.h" 47 47 #include "dce/dce_panel_cntl.h" 48 48 49 49 #include "reg_helper.h"
+1 -1
drivers/gpu/drm/amd/display/dc/dce110/Makefile
··· 26 26 CFLAGS_$(AMDDALPATH)/dc/dce110/dce110_resource.o = $(call cc-disable-warning, override-init) 27 27 28 28 DCE110 = dce110_timing_generator.o \ 29 - dce110_compressor.o dce110_hw_sequencer.o dce110_resource.o \ 29 + dce110_compressor.o dce110_resource.o \ 30 30 dce110_opp_regamma_v.o dce110_opp_csc_v.o dce110_timing_generator_v.o \ 31 31 dce110_mem_input_v.o dce110_opp_v.o dce110_transform_v.o 32 32
+5 -4
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
··· 30 30 #include "core_status.h" 31 31 #include "resource.h" 32 32 #include "dm_helpers.h" 33 - #include "dce110_timing_generator.h" 33 + #include "dce110_hwseq.h" 34 + #include "dce110/dce110_timing_generator.h" 34 35 #include "dce/dce_hwseq.h" 35 36 #include "gpio_service_interface.h" 36 37 37 - #include "dce110_compressor.h" 38 + #include "dce110/dce110_compressor.h" 38 39 39 40 #include "bios/bios_parser_helper.h" 40 41 #include "timing_generator.h" ··· 63 62 64 63 #include "atomfirmware.h" 65 64 66 - #include "dcn10/dcn10_hw_sequencer.h" 65 + #include "dcn10/dcn10_hwseq.h" 67 66 68 - #include "dce110_hw_sequencer.h" 67 + #include "dce110_hwseq.h" 69 68 70 69 #define GAMMA_HW_POINTS_NUM 256 71 70
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.h
+1 -1
drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
··· 46 46 #include "dce110/dce110_opp_v.h" 47 47 #include "dce/dce_clock_source.h" 48 48 #include "dce/dce_hwseq.h" 49 - #include "dce110/dce110_hw_sequencer.h" 49 + #include "dce110/dce110_hwseq.h" 50 50 #include "dce/dce_aux.h" 51 51 #include "dce/dce_abm.h" 52 52 #include "dce/dce_dmcu.h"
+1 -1
drivers/gpu/drm/amd/display/dc/dce112/Makefile
··· 25 25 26 26 CFLAGS_$(AMDDALPATH)/dc/dce112/dce112_resource.o = $(call cc-disable-warning, override-init) 27 27 28 - DCE112 = dce112_compressor.o dce112_hw_sequencer.o \ 28 + DCE112 = dce112_compressor.o \ 29 29 dce112_resource.o 30 30 31 31 AMD_DAL_DCE112 = $(addprefix $(AMDDALPATH)/dc/dce112/,$(DCE112))
+2 -2
drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.c drivers/gpu/drm/amd/display/dc/hwss/dce112/dce112_hwseq.c
··· 26 26 #include "dm_services.h" 27 27 #include "dc.h" 28 28 #include "core_types.h" 29 - #include "dce112_hw_sequencer.h" 29 + #include "dce112_hwseq.h" 30 30 31 - #include "dce110/dce110_hw_sequencer.h" 31 + #include "dce110/dce110_hwseq.h" 32 32 33 33 /* include DCE11.2 register header files */ 34 34 #include "dce/dce_11_2_d.h"
drivers/gpu/drm/amd/display/dc/dce112/dce112_hw_sequencer.h drivers/gpu/drm/amd/display/dc/hwss/dce112/dce112_hwseq.h
+1 -1
drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c
··· 44 44 #include "dce/dce_clock_source.h" 45 45 46 46 #include "dce/dce_hwseq.h" 47 - #include "dce112/dce112_hw_sequencer.h" 47 + #include "dce112/dce112_hwseq.h" 48 48 #include "dce/dce_abm.h" 49 49 #include "dce/dce_dmcu.h" 50 50 #include "dce/dce_aux.h"
-1
drivers/gpu/drm/amd/display/dc/dce120/Makefile
··· 27 27 CFLAGS_$(AMDDALPATH)/dc/dce120/dce120_resource.o = $(call cc-disable-warning, override-init) 28 28 29 29 DCE120 = dce120_resource.o dce120_timing_generator.o \ 30 - dce120_hw_sequencer.o 31 30 32 31 AMD_DAL_DCE120 = $(addprefix $(AMDDALPATH)/dc/dce120/,$(DCE120)) 33 32
+2 -2
drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c drivers/gpu/drm/amd/display/dc/hwss/dce120/dce120_hwseq.c
··· 26 26 #include "dm_services.h" 27 27 #include "dc.h" 28 28 #include "core_types.h" 29 - #include "dce120_hw_sequencer.h" 29 + #include "dce120_hwseq.h" 30 30 #include "dce/dce_hwseq.h" 31 31 32 - #include "dce110/dce110_hw_sequencer.h" 32 + #include "dce110/dce110_hwseq.h" 33 33 34 34 #include "dce/dce_12_0_offset.h" 35 35 #include "dce/dce_12_0_sh_mask.h"
drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.h drivers/gpu/drm/amd/display/dc/hwss/dce120/dce120_hwseq.h
+3 -3
drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c
··· 35 35 #include "dce112/dce112_resource.h" 36 36 37 37 #include "dce110/dce110_resource.h" 38 - #include "../virtual/virtual_stream_encoder.h" 38 + #include "virtual/virtual_stream_encoder.h" 39 39 #include "dce120_timing_generator.h" 40 40 #include "irq/dce120/irq_service_dce120.h" 41 41 #include "dce/dce_opp.h" ··· 44 44 #include "dce/dce_mem_input.h" 45 45 #include "dce/dce_panel_cntl.h" 46 46 47 - #include "dce110/dce110_hw_sequencer.h" 48 - #include "dce120/dce120_hw_sequencer.h" 47 + #include "dce110/dce110_hwseq.h" 48 + #include "dce120/dce120_hwseq.h" 49 49 #include "dce/dce_transform.h" 50 50 #include "clk_mgr.h" 51 51 #include "dce/dce_audio.h"
+2 -2
drivers/gpu/drm/amd/display/dc/dce60/dce60_hw_sequencer.c
··· 29 29 #include "dce60_hw_sequencer.h" 30 30 31 31 #include "dce/dce_hwseq.h" 32 - #include "dce110/dce110_hw_sequencer.h" 33 - #include "dce100/dce100_hw_sequencer.h" 32 + #include "dce110/dce110_hwseq.h" 33 + #include "dce100/dce100_hwseq.h" 34 34 35 35 /* include DCE6 register header files */ 36 36 #include "dce/dce_6_0_d.h"
+1 -1
drivers/gpu/drm/amd/display/dc/dce80/Makefile
··· 25 25 26 26 CFLAGS_$(AMDDALPATH)/dc/dce80/dce80_resource.o = $(call cc-disable-warning, override-init) 27 27 28 - DCE80 = dce80_timing_generator.o dce80_hw_sequencer.o \ 28 + DCE80 = dce80_timing_generator.o \ 29 29 dce80_resource.o 30 30 31 31 AMD_DAL_DCE80 = $(addprefix $(AMDDALPATH)/dc/dce80/,$(DCE80))
+3 -3
drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.c drivers/gpu/drm/amd/display/dc/hwss/dce80/dce80_hwseq.c
··· 26 26 #include "dm_services.h" 27 27 #include "dc.h" 28 28 #include "core_types.h" 29 - #include "dce80_hw_sequencer.h" 29 + #include "dce80_hwseq.h" 30 30 31 31 #include "dce/dce_hwseq.h" 32 - #include "dce110/dce110_hw_sequencer.h" 33 - #include "dce100/dce100_hw_sequencer.h" 32 + #include "dce110/dce110_hwseq.h" 33 + #include "dce100/dce100_hwseq.h" 34 34 35 35 /* include DCE8 register header files */ 36 36 #include "dce/dce_8_0_d.h"
drivers/gpu/drm/amd/display/dc/dce80/dce80_hw_sequencer.h drivers/gpu/drm/amd/display/dc/hwss/dce80/dce80_hwseq.h
+1 -1
drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
··· 46 46 #include "dce/dce_clock_source.h" 47 47 #include "dce/dce_audio.h" 48 48 #include "dce/dce_hwseq.h" 49 - #include "dce80/dce80_hw_sequencer.h" 49 + #include "dce80/dce80_hwseq.h" 50 50 #include "dce100/dce100_resource.h" 51 51 #include "dce/dce_panel_cntl.h" 52 52
+1 -1
drivers/gpu/drm/amd/display/dc/dcn10/Makefile
··· 22 22 # 23 23 # Makefile for DCN. 24 24 25 - DCN10 = dcn10_init.o dcn10_resource.o dcn10_ipp.o dcn10_hw_sequencer.o \ 25 + DCN10 = dcn10_init.o dcn10_resource.o dcn10_ipp.o \ 26 26 dcn10_hw_sequencer_debug.o \ 27 27 dcn10_dpp.o dcn10_opp.o dcn10_optc.o \ 28 28 dcn10_hubp.o dcn10_mpc.o \
+8 -8
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
··· 29 29 #include "core_types.h" 30 30 #include "resource.h" 31 31 #include "custom_float.h" 32 - #include "dcn10_hw_sequencer.h" 33 - #include "dcn10_hw_sequencer_debug.h" 32 + #include "dcn10_hwseq.h" 33 + #include "dcn10/dcn10_hw_sequencer_debug.h" 34 34 #include "dce/dce_hwseq.h" 35 35 #include "abm.h" 36 36 #include "dmcu.h" 37 - #include "dcn10_optc.h" 38 - #include "dcn10_dpp.h" 39 - #include "dcn10_mpc.h" 37 + #include "dcn10/dcn10_optc.h" 38 + #include "dcn10/dcn10_dpp.h" 39 + #include "dcn10/dcn10_mpc.h" 40 40 #include "timing_generator.h" 41 41 #include "opp.h" 42 42 #include "ipp.h" 43 43 #include "mpc.h" 44 44 #include "reg_helper.h" 45 - #include "dcn10_hubp.h" 46 - #include "dcn10_hubbub.h" 47 - #include "dcn10_cm_common.h" 45 + #include "dcn10/dcn10_hubp.h" 46 + #include "dcn10/dcn10_hubbub.h" 47 + #include "dcn10/dcn10_cm_common.h" 48 48 #include "dccg.h" 49 49 #include "clk_mgr.h" 50 50 #include "link_hwss.h"
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h
+2 -2
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c
··· 27 27 #include "core_types.h" 28 28 #include "resource.h" 29 29 #include "custom_float.h" 30 - #include "dcn10_hw_sequencer.h" 31 - #include "dce110/dce110_hw_sequencer.h" 30 + #include "dcn10/dcn10_hwseq.h" 31 + #include "dce110/dce110_hwseq.h" 32 32 #include "dce/dce_hwseq.h" 33 33 #include "abm.h" 34 34 #include "dmcu.h"
+2 -2
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_init.c
··· 24 24 */ 25 25 26 26 #include "hw_sequencer_private.h" 27 - #include "dce110/dce110_hw_sequencer.h" 28 - #include "dcn10_hw_sequencer.h" 27 + #include "dce110/dce110_hwseq.h" 28 + #include "dcn10/dcn10_hwseq.h" 29 29 #include "dcn20/dcn20_hwseq.h" 30 30 31 31 static const struct hw_sequencer_funcs dcn10_funcs = {
+2 -2
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
··· 36 36 #include "irq/dcn10/irq_service_dcn10.h" 37 37 #include "dcn10_dpp.h" 38 38 #include "dcn10_optc.h" 39 - #include "dcn10_hw_sequencer.h" 40 - #include "dce110/dce110_hw_sequencer.h" 39 + #include "dcn10/dcn10_hwseq.h" 40 + #include "dce110/dce110_hwseq.h" 41 41 #include "dcn10_opp.h" 42 42 #include "dcn10_link_encoder.h" 43 43 #include "dcn10_stream_encoder.h"
+1 -1
drivers/gpu/drm/amd/display/dc/dcn20/Makefile
··· 2 2 # 3 3 # Makefile for DCN. 4 4 5 - DCN20 = dcn20_resource.o dcn20_init.o dcn20_hwseq.o dcn20_dpp.o dcn20_dpp_cm.o dcn20_hubp.o \ 5 + DCN20 = dcn20_resource.o dcn20_init.o dcn20_dpp.o dcn20_dpp_cm.o dcn20_hubp.o \ 6 6 dcn20_mpc.o dcn20_opp.o dcn20_hubbub.o dcn20_optc.o dcn20_mmhubbub.o \ 7 7 dcn20_stream_encoder.o dcn20_link_encoder.o dcn20_dccg.o \ 8 8 dcn20_vmid.o dcn20_dwb.o dcn20_dwb_scl.o
+3 -3
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
··· 29 29 #include "dm_helpers.h" 30 30 #include "core_types.h" 31 31 #include "resource.h" 32 - #include "dcn20_resource.h" 32 + #include "dcn20/dcn20_resource.h" 33 33 #include "dcn20_hwseq.h" 34 34 #include "dce/dce_hwseq.h" 35 - #include "dcn20_dsc.h" 36 - #include "dcn20_optc.h" 35 + #include "dcn20/dcn20_dsc.h" 36 + #include "dcn20/dcn20_optc.h" 37 37 #include "abm.h" 38 38 #include "clk_mgr.h" 39 39 #include "dmcu.h"
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h
+3 -3
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_init.c
··· 23 23 * 24 24 */ 25 25 26 - #include "dce110/dce110_hw_sequencer.h" 27 - #include "dcn10/dcn10_hw_sequencer.h" 28 - #include "dcn20_hwseq.h" 26 + #include "dce110/dce110_hwseq.h" 27 + #include "dcn10/dcn10_hwseq.h" 28 + #include "dcn20/dcn20_hwseq.h" 29 29 30 30 #include "dcn20_init.h" 31 31
+2 -2
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
··· 45 45 #include "irq/dcn20/irq_service_dcn20.h" 46 46 #include "dcn20_dpp.h" 47 47 #include "dcn20_optc.h" 48 - #include "dcn20_hwseq.h" 49 - #include "dce110/dce110_hw_sequencer.h" 48 + #include "dcn20/dcn20_hwseq.h" 49 + #include "dce110/dce110_hwseq.h" 50 50 #include "dcn10/dcn10_resource.h" 51 51 #include "dcn20_opp.h" 52 52
+1 -1
drivers/gpu/drm/amd/display/dc/dcn201/Makefile
··· 1 1 # SPDX-License-Identifier: MIT 2 2 # 3 3 # Makefile for DCN. 4 - DCN201 = dcn201_init.o dcn201_resource.o dcn201_hwseq.o \ 4 + DCN201 = dcn201_init.o dcn201_resource.o \ 5 5 dcn201_hubbub.o\ 6 6 dcn201_mpc.o dcn201_hubp.o dcn201_opp.o dcn201_optc.o dcn201_dpp.o \ 7 7 dcn201_dccg.o dcn201_link_encoder.o
+1 -1
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hwseq.c drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c
··· 28 28 #include "core_types.h" 29 29 #include "resource.h" 30 30 #include "dcn201_hwseq.h" 31 - #include "dcn201_optc.h" 31 + #include "dcn201/dcn201_optc.h" 32 32 #include "dce/dce_hwseq.h" 33 33 #include "hubp.h" 34 34 #include "dchubbub.h"
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hwseq.h drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.h
+3 -3
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_init.c
··· 23 23 * 24 24 */ 25 25 26 - #include "dce110/dce110_hw_sequencer.h" 27 - #include "dcn10/dcn10_hw_sequencer.h" 26 + #include "dce110/dce110_hwseq.h" 27 + #include "dcn10/dcn10_hwseq.h" 28 28 #include "dcn20/dcn20_hwseq.h" 29 - #include "dcn201_hwseq.h" 29 + #include "dcn201/dcn201_hwseq.h" 30 30 #include "dcn201_init.h" 31 31 32 32 static const struct hw_sequencer_funcs dcn201_funcs = {
+2 -2
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_resource.c
··· 43 43 #include "dcn201/dcn201_hubbub.h" 44 44 #include "dcn201_dccg.h" 45 45 #include "dcn201_optc.h" 46 - #include "dcn201_hwseq.h" 47 - #include "dce110/dce110_hw_sequencer.h" 46 + #include "dcn201/dcn201_hwseq.h" 47 + #include "dce110/dce110_hwseq.h" 48 48 #include "dcn201_opp.h" 49 49 #include "dcn201/dcn201_link_encoder.h" 50 50 #include "dcn20/dcn20_stream_encoder.h"
+1 -1
drivers/gpu/drm/amd/display/dc/dcn21/Makefile
··· 3 3 # Makefile for DCN21. 4 4 5 5 DCN21 = dcn21_init.o dcn21_hubp.o dcn21_hubbub.o dcn21_resource.o \ 6 - dcn21_hwseq.o dcn21_link_encoder.o dcn21_dccg.o 6 + dcn21_link_encoder.o dcn21_dccg.o 7 7 8 8 AMD_DAL_DCN21 = $(addprefix $(AMDDALPATH)/dc/dcn21/,$(DCN21)) 9 9
+1 -1
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hwseq.c drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.c
··· 28 28 #include "core_types.h" 29 29 #include "resource.h" 30 30 #include "dce/dce_hwseq.h" 31 - #include "dce110/dce110_hw_sequencer.h" 31 + #include "dce110/dce110_hwseq.h" 32 32 #include "dcn21_hwseq.h" 33 33 #include "vmid.h" 34 34 #include "reg_helper.h"
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hwseq.h drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_hwseq.h
+3 -3
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_init.c
··· 23 23 * 24 24 */ 25 25 26 - #include "dce110/dce110_hw_sequencer.h" 27 - #include "dcn10/dcn10_hw_sequencer.h" 26 + #include "dce110/dce110_hwseq.h" 27 + #include "dcn10/dcn10_hwseq.h" 28 28 #include "dcn20/dcn20_hwseq.h" 29 - #include "dcn21_hwseq.h" 29 + #include "dcn21/dcn21_hwseq.h" 30 30 31 31 #include "dcn21_init.h" 32 32
+1 -1
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
··· 49 49 #include "dcn20/dcn20_dpp.h" 50 50 #include "dcn20/dcn20_optc.h" 51 51 #include "dcn21/dcn21_hwseq.h" 52 - #include "dce110/dce110_hw_sequencer.h" 52 + #include "dce110/dce110_hwseq.h" 53 53 #include "dcn20/dcn20_opp.h" 54 54 #include "dcn20/dcn20_dsc.h" 55 55 #include "dcn21/dcn21_link_encoder.h"
-1
drivers/gpu/drm/amd/display/dc/dcn30/Makefile
··· 30 30 dcn30_dpp.o \ 31 31 dcn30_optc.o \ 32 32 dcn30_dccg.o \ 33 - dcn30_hwseq.o \ 34 33 dcn30_mpc.o dcn30_vpg.o \ 35 34 dcn30_afmt.o \ 36 35 dcn30_dio_stream_encoder.o \
+5 -5
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
··· 31 31 #include "dcn30_hwseq.h" 32 32 #include "dccg.h" 33 33 #include "dce/dce_hwseq.h" 34 - #include "dcn30_mpc.h" 35 - #include "dcn30_dpp.h" 34 + #include "dcn30/dcn30_mpc.h" 35 + #include "dcn30/dcn30_dpp.h" 36 36 #include "dcn10/dcn10_cm_common.h" 37 - #include "dcn30_cm_common.h" 37 + #include "dcn30/dcn30_cm_common.h" 38 38 #include "reg_helper.h" 39 39 #include "abm.h" 40 40 #include "clk_mgr.h" ··· 48 48 #include "dc_dmub_srv.h" 49 49 #include "link_hwss.h" 50 50 #include "dpcd_defs.h" 51 - #include "../dcn20/dcn20_hwseq.h" 52 - #include "dcn30_resource.h" 51 + #include "dcn20/dcn20_hwseq.h" 52 + #include "dcn30/dcn30_resource.h" 53 53 #include "link.h" 54 54 55 55
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h
+3 -3
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c
··· 23 23 * 24 24 */ 25 25 26 - #include "dce110/dce110_hw_sequencer.h" 27 - #include "dcn10/dcn10_hw_sequencer.h" 26 + #include "dce110/dce110_hwseq.h" 27 + #include "dcn10/dcn10_hwseq.h" 28 28 #include "dcn20/dcn20_hwseq.h" 29 29 #include "dcn21/dcn21_hwseq.h" 30 - #include "dcn30_hwseq.h" 30 + #include "dcn30/dcn30_hwseq.h" 31 31 32 32 #include "dcn30_init.h" 33 33
+1 -1
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
··· 44 44 #include "dcn30/dcn30_optc.h" 45 45 #include "dcn20/dcn20_hwseq.h" 46 46 #include "dcn30/dcn30_hwseq.h" 47 - #include "dce110/dce110_hw_sequencer.h" 47 + #include "dce110/dce110_hwseq.h" 48 48 #include "dcn30/dcn30_opp.h" 49 49 #include "dcn20/dcn20_dsc.h" 50 50 #include "dcn30/dcn30_vpg.h"
+1 -1
drivers/gpu/drm/amd/display/dc/dcn301/Makefile
··· 11 11 # Makefile for dcn30. 12 12 13 13 DCN301 = dcn301_init.o dcn301_resource.o dcn301_dccg.o \ 14 - dcn301_dio_link_encoder.o dcn301_hwseq.o dcn301_panel_cntl.o dcn301_hubbub.o \ 14 + dcn301_dio_link_encoder.o dcn301_panel_cntl.o dcn301_hubbub.o \ 15 15 dcn301_optc.o 16 16 17 17 AMD_DAL_DCN301 = $(addprefix $(AMDDALPATH)/dc/dcn301/,$(DCN301))
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_hwseq.c drivers/gpu/drm/amd/display/dc/hwss/dcn301/dcn301_hwseq.c
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_hwseq.h drivers/gpu/drm/amd/display/dc/hwss/dcn301/dcn301_hwseq.h
+3 -3
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_init.c
··· 23 23 * 24 24 */ 25 25 26 - #include "dce110/dce110_hw_sequencer.h" 27 - #include "dcn10/dcn10_hw_sequencer.h" 26 + #include "dce110/dce110_hwseq.h" 27 + #include "dcn10/dcn10_hwseq.h" 28 28 #include "dcn20/dcn20_hwseq.h" 29 29 #include "dcn21/dcn21_hwseq.h" 30 30 #include "dcn30/dcn30_hwseq.h" 31 - #include "dcn301_hwseq.h" 31 + #include "dcn301/dcn301_hwseq.h" 32 32 33 33 #include "dcn301_init.h" 34 34
+1 -1
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
··· 45 45 #include "dcn301/dcn301_optc.h" 46 46 #include "dcn20/dcn20_hwseq.h" 47 47 #include "dcn30/dcn30_hwseq.h" 48 - #include "dce110/dce110_hw_sequencer.h" 48 + #include "dce110/dce110_hwseq.h" 49 49 #include "dcn30/dcn30_opp.h" 50 50 #include "dcn20/dcn20_dsc.h" 51 51 #include "dcn30/dcn30_vpg.h"
+1 -1
drivers/gpu/drm/amd/display/dc/dcn302/Makefile
··· 5 5 # 6 6 # Makefile for dcn302. 7 7 8 - DCN3_02 = dcn302_init.o dcn302_hwseq.o dcn302_resource.o 8 + DCN3_02 = dcn302_init.o dcn302_resource.o 9 9 10 10 AMD_DAL_DCN3_02 = $(addprefix $(AMDDALPATH)/dc/dcn302/,$(DCN3_02)) 11 11
drivers/gpu/drm/amd/display/dc/dcn302/dcn302_hwseq.c drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_hwseq.c
drivers/gpu/drm/amd/display/dc/dcn302/dcn302_hwseq.h drivers/gpu/drm/amd/display/dc/hwss/dcn302/dcn302_hwseq.h
+1 -1
drivers/gpu/drm/amd/display/dc/dcn302/dcn302_init.c
··· 23 23 * 24 24 */ 25 25 26 - #include "dcn302_hwseq.h" 26 + #include "dcn302/dcn302_hwseq.h" 27 27 28 28 #include "dcn30/dcn30_init.h" 29 29
+1 -1
drivers/gpu/drm/amd/display/dc/dcn303/Makefile
··· 6 6 # 7 7 # Makefile for dcn303. 8 8 9 - DCN3_03 = dcn303_init.o dcn303_hwseq.o dcn303_resource.o 9 + DCN3_03 = dcn303_init.o dcn303_resource.o 10 10 11 11 AMD_DAL_DCN3_03 = $(addprefix $(AMDDALPATH)/dc/dcn303/,$(DCN3_03)) 12 12
drivers/gpu/drm/amd/display/dc/dcn303/dcn303_hwseq.c drivers/gpu/drm/amd/display/dc/hwss/dcn303/dcn303_hwseq.c
drivers/gpu/drm/amd/display/dc/dcn303/dcn303_hwseq.h drivers/gpu/drm/amd/display/dc/hwss/dcn303/dcn303_hwseq.h
+1 -1
drivers/gpu/drm/amd/display/dc/dcn303/dcn303_init.c
··· 5 5 * Authors: AMD 6 6 */ 7 7 8 - #include "dcn303_hwseq.h" 8 + #include "dcn303/dcn303_hwseq.h" 9 9 #include "dcn30/dcn30_init.h" 10 10 #include "dc.h" 11 11
+1 -1
drivers/gpu/drm/amd/display/dc/dcn31/Makefile
··· 10 10 # 11 11 # Makefile for dcn31. 12 12 13 - DCN31 = dcn31_resource.o dcn31_hubbub.o dcn31_hwseq.o dcn31_init.o dcn31_hubp.o \ 13 + DCN31 = dcn31_resource.o dcn31_hubbub.o dcn31_init.o dcn31_hubp.o \ 14 14 dcn31_dccg.o dcn31_optc.o dcn31_dio_link_encoder.o dcn31_panel_cntl.o \ 15 15 dcn31_apg.o dcn31_hpo_dp_stream_encoder.o dcn31_hpo_dp_link_encoder.o \ 16 16 dcn31_afmt.o dcn31_vpg.o
+1 -1
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
··· 46 46 #include "dpcd_defs.h" 47 47 #include "dce/dmub_outbox.h" 48 48 #include "link.h" 49 - #include "dcn10/dcn10_hw_sequencer.h" 49 + #include "dcn10/dcn10_hwseq.h" 50 50 #include "inc/link_enc_cfg.h" 51 51 #include "dcn30/dcn30_vpg.h" 52 52 #include "dce/dce_i2c_hw.h"
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.h drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.h
+2 -2
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c
··· 23 23 * 24 24 */ 25 25 26 - #include "dce110/dce110_hw_sequencer.h" 27 - #include "dcn10/dcn10_hw_sequencer.h" 26 + #include "dce110/dce110_hwseq.h" 27 + #include "dcn10/dcn10_hwseq.h" 28 28 #include "dcn20/dcn20_hwseq.h" 29 29 #include "dcn21/dcn21_hwseq.h" 30 30 #include "dcn30/dcn30_hwseq.h"
+1 -1
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
··· 48 48 #include "dcn31/dcn31_optc.h" 49 49 #include "dcn20/dcn20_hwseq.h" 50 50 #include "dcn30/dcn30_hwseq.h" 51 - #include "dce110/dce110_hw_sequencer.h" 51 + #include "dce110/dce110_hwseq.h" 52 52 #include "dcn30/dcn30_opp.h" 53 53 #include "dcn20/dcn20_dsc.h" 54 54 #include "dcn30/dcn30_vpg.h"
+1 -1
drivers/gpu/drm/amd/display/dc/dcn314/Makefile
··· 10 10 # 11 11 # Makefile for dcn314. 12 12 13 - DCN314 = dcn314_resource.o dcn314_hwseq.o dcn314_init.o \ 13 + DCN314 = dcn314_resource.o dcn314_init.o \ 14 14 dcn314_dio_stream_encoder.o dcn314_dccg.o dcn314_optc.o 15 15 16 16 AMD_DAL_DCN314 = $(addprefix $(AMDDALPATH)/dc/dcn314/,$(DCN314))
+1 -1
drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.c drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.c
··· 47 47 #include "dpcd_defs.h" 48 48 #include "dce/dmub_outbox.h" 49 49 #include "link.h" 50 - #include "dcn10/dcn10_hw_sequencer.h" 50 + #include "dcn10/dcn10_hwseq.h" 51 51 #include "inc/link_enc_cfg.h" 52 52 #include "dcn30/dcn30_vpg.h" 53 53 #include "dce/dce_i2c_hw.h"
drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.h drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_hwseq.h
+2 -2
drivers/gpu/drm/amd/display/dc/dcn314/dcn314_init.c
··· 24 24 * 25 25 */ 26 26 27 - #include "dce110/dce110_hw_sequencer.h" 28 - #include "dcn10/dcn10_hw_sequencer.h" 27 + #include "dce110/dce110_hwseq.h" 28 + #include "dcn10/dcn10_hwseq.h" 29 29 #include "dcn20/dcn20_hwseq.h" 30 30 #include "dcn21/dcn21_hwseq.h" 31 31 #include "dcn30/dcn30_hwseq.h"
+1 -1
drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
··· 50 50 #include "dcn314/dcn314_optc.h" 51 51 #include "dcn20/dcn20_hwseq.h" 52 52 #include "dcn30/dcn30_hwseq.h" 53 - #include "dce110/dce110_hw_sequencer.h" 53 + #include "dce110/dce110_hwseq.h" 54 54 #include "dcn30/dcn30_opp.h" 55 55 #include "dcn20/dcn20_dsc.h" 56 56 #include "dcn30/dcn30_vpg.h"
+1 -1
drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c
··· 47 47 #include "dcn31/dcn31_optc.h" 48 48 #include "dcn20/dcn20_hwseq.h" 49 49 #include "dcn30/dcn30_hwseq.h" 50 - #include "dce110/dce110_hw_sequencer.h" 50 + #include "dce110/dce110_hwseq.h" 51 51 #include "dcn30/dcn30_opp.h" 52 52 #include "dcn20/dcn20_dsc.h" 53 53 #include "dcn30/dcn30_vpg.h"
+1 -1
drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.c
··· 47 47 #include "dcn31/dcn31_optc.h" 48 48 #include "dcn20/dcn20_hwseq.h" 49 49 #include "dcn30/dcn30_hwseq.h" 50 - #include "dce110/dce110_hw_sequencer.h" 50 + #include "dce110/dce110_hwseq.h" 51 51 #include "dcn30/dcn30_opp.h" 52 52 #include "dcn20/dcn20_dsc.h" 53 53 #include "dcn30/dcn30_vpg.h"
+1 -1
drivers/gpu/drm/amd/display/dc/dcn32/Makefile
··· 10 10 # 11 11 # Makefile for dcn32. 12 12 13 - DCN32 = dcn32_resource.o dcn32_hubbub.o dcn32_hwseq.o dcn32_init.o \ 13 + DCN32 = dcn32_resource.o dcn32_hubbub.o dcn32_init.o dcn32_dccg.o \ 14 14 dcn32_dccg.o dcn32_optc.o dcn32_mmhubbub.o dcn32_hubp.o dcn32_dpp.o \ 15 15 dcn32_dio_stream_encoder.o dcn32_dio_link_encoder.o dcn32_hpo_dp_link_encoder.o \ 16 16 dcn32_resource_helpers.o dcn32_mpc.o
+1 -1
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
··· 48 48 #include "dsc.h" 49 49 #include "dcn20/dcn20_optc.h" 50 50 #include "dce/dmub_hw_lock_mgr.h" 51 - #include "dcn32_resource.h" 51 + #include "dcn32/dcn32_resource.h" 52 52 #include "link.h" 53 53 54 54 #define DC_LOGGER_INIT(logger)
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.h drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h
+3 -3
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_init.c
··· 23 23 * 24 24 */ 25 25 26 - #include "dce110/dce110_hw_sequencer.h" 27 - #include "dcn10/dcn10_hw_sequencer.h" 26 + #include "dce110/dce110_hwseq.h" 27 + #include "dcn10/dcn10_hwseq.h" 28 28 #include "dcn20/dcn20_hwseq.h" 29 29 #include "dcn21/dcn21_hwseq.h" 30 30 #include "dcn30/dcn30_hwseq.h" 31 31 #include "dcn31/dcn31_hwseq.h" 32 - #include "dcn32_hwseq.h" 32 + #include "dcn32/dcn32_hwseq.h" 33 33 #include "dcn32_init.h" 34 34 35 35 static const struct hw_sequencer_funcs dcn32_funcs = {
+1 -1
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c
··· 47 47 #include "dcn32/dcn32_optc.h" 48 48 #include "dcn20/dcn20_hwseq.h" 49 49 #include "dcn30/dcn30_hwseq.h" 50 - #include "dce110/dce110_hw_sequencer.h" 50 + #include "dce110/dce110_hwseq.h" 51 51 #include "dcn30/dcn30_opp.h" 52 52 #include "dcn20/dcn20_dsc.h" 53 53 #include "dcn30/dcn30_vpg.h"
+1 -1
drivers/gpu/drm/amd/display/dc/dcn321/dcn321_resource.c
··· 50 50 #include "dcn32/dcn32_optc.h" 51 51 #include "dcn20/dcn20_hwseq.h" 52 52 #include "dcn30/dcn30_hwseq.h" 53 - #include "dce110/dce110_hw_sequencer.h" 53 + #include "dce110/dce110_hwseq.h" 54 54 #include "dcn30/dcn30_opp.h" 55 55 #include "dcn20/dcn20_dsc.h" 56 56 #include "dcn30/dcn30_vpg.h"
+1 -1
drivers/gpu/drm/amd/display/dc/dcn35/Makefile
··· 10 10 # 11 11 # Makefile for DCN35. 12 12 13 - DCN35 = dcn35_resource.o dcn35_hwseq.o dcn35_init.o dcn35_dio_stream_encoder.o \ 13 + DCN35 = dcn35_resource.o dcn35_init.o dcn35_dio_stream_encoder.o \ 14 14 dcn35_dio_link_encoder.o dcn35_dccg.o dcn35_optc.o \ 15 15 dcn35_dsc.o dcn35_hubp.o dcn35_hubbub.o \ 16 16 dcn35_mmhubbub.o dcn35_opp.o dcn35_dpp.o dcn35_pg_cntl.o dcn35_dwb.o
+1 -1
drivers/gpu/drm/amd/display/dc/dcn35/dcn35_hwseq.c drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
··· 45 45 #include "dpcd_defs.h" 46 46 #include "dce/dmub_outbox.h" 47 47 #include "link.h" 48 - #include "dcn10/dcn10_hw_sequencer.h" 48 + #include "dcn10/dcn10_hwseq.h" 49 49 #include "inc/link_enc_cfg.h" 50 50 #include "dcn30/dcn30_vpg.h" 51 51 #include "dce/dce_i2c_hw.h"
drivers/gpu/drm/amd/display/dc/dcn35/dcn35_hwseq.h drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.h
+2 -2
drivers/gpu/drm/amd/display/dc/dcn35/dcn35_init.c
··· 22 22 * 23 23 */ 24 24 25 - #include "dce110/dce110_hw_sequencer.h" 26 - #include "dcn10/dcn10_hw_sequencer.h" 25 + #include "dce110/dce110_hwseq.h" 26 + #include "dcn10/dcn10_hwseq.h" 27 27 #include "dcn20/dcn20_hwseq.h" 28 28 #include "dcn21/dcn21_hwseq.h" 29 29 #include "dcn30/dcn30_hwseq.h"
+2 -2
drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c
··· 49 49 #include "dcn35/dcn35_optc.h" 50 50 #include "dcn20/dcn20_hwseq.h" 51 51 #include "dcn30/dcn30_hwseq.h" 52 - #include "dce110/dce110_hw_sequencer.h" 52 + #include "dce110/dce110_hwseq.h" 53 53 #include "dcn35/dcn35_opp.h" 54 54 #include "dcn35/dcn35_dsc.h" 55 55 #include "dcn30/dcn30_vpg.h" ··· 75 75 #include "dcn35/dcn35_pg_cntl.h" 76 76 #include "dcn10/dcn10_resource.h" 77 77 #include "dcn31/dcn31_panel_cntl.h" 78 - #include "dcn35_hwseq.h" 78 + #include "dcn35/dcn35_hwseq.h" 79 79 #include "dcn35_dio_link_encoder.h" 80 80 #include "dml/dcn31/dcn31_fpu.h" /*todo*/ 81 81 #include "dml/dcn35/dcn35_fpu.h"
+183
drivers/gpu/drm/amd/display/dc/hwss/Makefile
··· 1 + 2 + # Copyright 2022 Advanced Micro Devices, Inc. 3 + # 4 + # Permission is hereby granted, free of charge, to any person obtaining a 5 + # copy of this software and associated documentation files (the "Software"), 6 + # to deal in the Software without restriction, including without limitation 7 + # the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 + # and/or sell copies of the Software, and to permit persons to whom the 9 + # Software is furnished to do so, subject to the following conditions: 10 + # 11 + # The above copyright notice and this permission notice shall be included in 12 + # all copies or substantial portions of the Software. 13 + # 14 + # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 + # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 + # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 + # THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 + # OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 + # ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 + # OTHER DEALINGS IN THE SOFTWARE. 21 + # 22 + # Makefile for the 'hwss' sub-component of DAL. 23 + # 24 + 25 + 26 + ############################################################################### 27 + # DCE 28 + ############################################################################### 29 + 30 + HWSS_DCE = dce_hwseq.o 31 + 32 + AMD_DAL_HWSS_DCE = $(addprefix $(AMDDALPATH)/dc/hwss/dce/,$(HWSS_DCE)) 33 + 34 + AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCE) 35 + 36 + ############################################################################### 37 + 38 + HWSS_DCE100 = dce100_hwseq.o 39 + 40 + AMD_DAL_HWSS_DCE100 = $(addprefix $(AMDDALPATH)/dc/hwss/dce100/,$(HWSS_DCE100)) 41 + 42 + AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCE100) 43 + 44 + ############################################################################### 45 + 46 + HWSS_DCE110 = dce110_hwseq.o 47 + 48 + AMD_DAL_HWSS_DCE110 = $(addprefix $(AMDDALPATH)/dc/hwss/dce110/,$(HWSS_DCE110)) 49 + 50 + AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCE110) 51 + 52 + ############################################################################### 53 + 54 + HWSS_DCE112 = dce112_hwseq.o 55 + 56 + AMD_DAL_HWSS_DCE112 = $(addprefix $(AMDDALPATH)/dc/hwss/dce112/,$(HWSS_DCE112)) 57 + 58 + AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCE112) 59 + 60 + ############################################################################### 61 + 62 + HWSS_DCE120 = dce120_hwseq.o 63 + 64 + AMD_DAL_HWSS_DCE120 = $(addprefix $(AMDDALPATH)/dc/hwss/dce120/,$(HWSS_DCE120)) 65 + 66 + AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCE120) 67 + 68 + ############################################################################### 69 + 70 + HWSS_DCE80 = dce80_hwseq.o 71 + 72 + AMD_DAL_HWSS_DCE80 = $(addprefix $(AMDDALPATH)/dc/hwss/dce80/,$(HWSS_DCE80)) 73 + 74 + AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCE80) 75 + 76 + ifdef CONFIG_DRM_AMD_DC_FP 77 + ############################################################################### 78 + # DCN 79 + ############################################################################### 80 + 81 + HWSS_DCN10 = dcn10_hwseq.o 82 + 83 + AMD_DAL_HWSS_DCN10 = $(addprefix $(AMDDALPATH)/dc/hwss/dcn10/,$(HWSS_DCN10)) 84 + 85 + AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCN10) 86 + 87 + ############################################################################### 88 + 89 + HWSS_DCN20 = dcn20_hwseq.o 90 + 91 + AMD_DAL_HWSS_DCN20 = $(addprefix $(AMDDALPATH)/dc/hwss/dcn20/,$(HWSS_DCN20)) 92 + 93 + AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCN20) 94 + 95 + ############################################################################### 96 + 97 + HWSS_DCN201 = dcn201_hwseq.o 98 + 99 + AMD_DAL_HWSS_DCN201 = $(addprefix $(AMDDALPATH)/dc/hwss/dcn201/,$(HWSS_DCN201)) 100 + 101 + AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCN201) 102 + 103 + ############################################################################### 104 + 105 + HWSS_DCN21 = dcn21_hwseq.o 106 + 107 + AMD_DAL_HWSS_DCN21 = $(addprefix $(AMDDALPATH)/dc/hwss/dcn21/,$(HWSS_DCN21)) 108 + 109 + AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCN21) 110 + 111 + ############################################################################### 112 + 113 + ############################################################################### 114 + 115 + ############################################################################### 116 + 117 + HWSS_DCN30 = dcn30_hwseq.o 118 + 119 + AMD_DAL_HWSS_DCN30 = $(addprefix $(AMDDALPATH)/dc/hwss/dcn30/,$(HWSS_DCN30)) 120 + 121 + AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCN30) 122 + 123 + ############################################################################### 124 + 125 + HWSS_DCN301 = dcn301_hwseq.o 126 + 127 + AMD_DAL_HWSS_DCN301 = $(addprefix $(AMDDALPATH)/dc/hwss/dcn301/,$(HWSS_DCN301)) 128 + 129 + AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCN301) 130 + 131 + ############################################################################### 132 + 133 + HWSS_DCN302 = dcn302_hwseq.o 134 + 135 + AMD_DAL_HWSS_DCN302 = $(addprefix $(AMDDALPATH)/dc/hwss/dcn302/,$(HWSS_DCN302)) 136 + 137 + AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCN302) 138 + 139 + ############################################################################### 140 + 141 + HWSS_DCN303 = dcn303_hwseq.o 142 + 143 + AMD_DAL_HWSS_DCN303 = $(addprefix $(AMDDALPATH)/dc/hwss/dcn303/,$(HWSS_DCN303)) 144 + 145 + AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCN303) 146 + 147 + ############################################################################### 148 + 149 + HWSS_DCN31 = dcn31_hwseq.o 150 + 151 + AMD_DAL_HWSS_DCN31 = $(addprefix $(AMDDALPATH)/dc/hwss/dcn31/,$(HWSS_DCN31)) 152 + 153 + AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCN31) 154 + 155 + ############################################################################### 156 + 157 + HWSS_DCN314 = dcn314_hwseq.o 158 + 159 + AMD_DAL_HWSS_DCN314 = $(addprefix $(AMDDALPATH)/dc/hwss/dcn314/,$(HWSS_DCN314)) 160 + 161 + AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCN314) 162 + 163 + ############################################################################### 164 + 165 + HWSS_DCN32 = dcn32_hwseq.o 166 + 167 + AMD_DAL_HWSS_DCN32 = $(addprefix $(AMDDALPATH)/dc/hwss/dcn32/,$(HWSS_DCN32)) 168 + 169 + AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCN32) 170 + 171 + ############################################################################### 172 + 173 + HWSS_DCN35 = dcn35_hwseq.o 174 + 175 + AMD_DAL_HWSS_DCN35 = $(addprefix $(AMDDALPATH)/dc/hwss/dcn35/,$(HWSS_DCN35)) 176 + 177 + AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCN35) 178 + 179 + ############################################################################### 180 + 181 + ############################################################################### 182 + 183 + endif
+2 -2
drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h
··· 26 26 #ifndef __DC_HW_SEQUENCER_H__ 27 27 #define __DC_HW_SEQUENCER_H__ 28 28 #include "dc_types.h" 29 - #include "clock_source.h" 29 + #include "inc/clock_source.h" 30 30 #include "inc/hw/timing_generator.h" 31 31 #include "inc/hw/opp.h" 32 32 #include "inc/hw/link_encoder.h" 33 - #include "core_status.h" 33 + #include "inc/core_status.h" 34 34 35 35 struct pipe_ctx; 36 36 struct dc_state;
drivers/gpu/drm/amd/display/dc/inc/hw_sequencer_private.h drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h
+2 -1
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
··· 2306 2306 */ 2307 2307 uint8_t relock_delay_frame_cnt; 2308 2308 /** 2309 - * Explicit padding to 2 byte boundary. 2309 + * Explicit padding to 4 byte boundary. 2310 2310 */ 2311 2311 uint8_t pad3; 2312 2312 /** ··· 3139 3139 * PSR SU is the client of HW Lock Manager. 3140 3140 */ 3141 3141 HW_LOCK_CLIENT_PSR_SU = 1, 3142 + HW_LOCK_CLIENT_SUBVP = 3, 3142 3143 /** 3143 3144 * Replay is the client of HW Lock Manager. 3144 3145 */