Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'at91-dt-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt
Microchip AT91 device tree updates for v6.16
This update includes:
- more controllers enabled for SAMA7D65 SoC (Ethernet, Flexcoms,
SRAM, DRAM, RTC, RTT, GBPR)
- cleanups and fixes for Calao boards
* tag 'at91-dt-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: microchip: sama7g54_curiosity: Add fixed-partitions for spi-nor flash
ARM: dts: microchip: sama7d65: Add RTT timer to curiosity board
ARM: dts: microchip: sama7d65: Add RTT and GPBR Support for sama7d65 SoC
ARM: dts: microchip: sama7d65: Add SRAM and DRAM components support
ARM: dts: microchip: sama7d65_curiosity: add EEPROM
ARM: dts: microchip: sama7d65: Add MCP16502 to sama7d65 curiosity
ARM: dts: microchip: sama7d65: Enable GMAC interface
ARM: dts: microchip: sama7d65: Add FLEXCOMs to sama7d65 SoC
ARM: dts: microchip: sama7d65: Add gmac interfaces for sama7d65 SoC
ARM: dts: at91: at91sam9263: fix NAND chip selects
ARM: dts: at91: usb_a9g20: move wrong RTC node
ARM: dts: at91: calao_usb: simplify chosen node
ARM: dts: at91: usb_a9260: use 'stdout-path'
ARM: dts: at91: calao_usb: simplify memory node
ARM: dts: at91: usb_a9263: fix GPIO for Dataflash chip select
ARM: dts: at91: usb_a9g20: add SPI EEPROM
Link: https://lore.kernel.org/r/20250516055330.10852-1-claudiu.beznea@tuxon.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+625
-41
+209
arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts
+209
arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts
···
30
30
device_type = "memory";
31
31
reg = <0x60000000 0x40000000>;
32
32
};
33
+
34
+
reg_5v: regulator-5v {
35
+
compatible = "regulator-fixed";
36
+
regulator-name = "5V_MAIN";
37
+
regulator-min-microvolt = <5000000>;
38
+
regulator-max-microvolt = <5000000>;
39
+
regulator-always-on;
40
+
};
41
+
33
42
};
34
43
35
44
&dma0 {
···
67
58
&flx10 {
68
59
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
69
60
status = "okay";
61
+
};
62
+
63
+
&gmac0 {
64
+
#address-cells = <1>;
65
+
#size-cells = <0>;
66
+
pinctrl-names = "default";
67
+
pinctrl-0 = <&pinctrl_gmac0_default
68
+
&pinctrl_gmac0_mdio_default
69
+
&pinctrl_gmac0_txck_default
70
+
&pinctrl_gmac0_phy_irq>;
71
+
phy-mode = "rgmii-id";
72
+
nvmem-cells = <&eeprom0_eui48>;
73
+
nvmem-cell-names = "mac-address";
74
+
status = "okay";
75
+
76
+
ethernet-phy@7 {
77
+
reg = <0x7>;
78
+
interrupt-parent = <&pioa>;
79
+
interrupts = <PIN_PC1 IRQ_TYPE_LEVEL_LOW>;
80
+
};
70
81
};
71
82
72
83
&i2c10 {
···
128
99
label = "VDDCPU";
129
100
};
130
101
};
102
+
103
+
pmic@5b {
104
+
compatible = "microchip,mcp16502";
105
+
reg = <0x5b>;
106
+
lvin-supply = <®_5v>;
107
+
pvin1-supply = <®_5v>;
108
+
pvin2-supply = <®_5v>;
109
+
pvin3-supply = <®_5v>;
110
+
pvin4-supply = <®_5v>;
111
+
status = "okay";
112
+
113
+
regulators {
114
+
vdd_3v3: VDD_IO {
115
+
regulator-name = "VDD_IO";
116
+
regulator-min-microvolt = <3300000>;
117
+
regulator-max-microvolt = <3300000>;
118
+
regulator-initial-mode = <2>;
119
+
regulator-allowed-modes = <2>, <4>;
120
+
regulator-always-on;
121
+
122
+
regulator-state-standby {
123
+
regulator-on-in-suspend;
124
+
regulator-suspend-microvolt = <3300000>;
125
+
regulator-mode = <4>;
126
+
};
127
+
128
+
regulator-state-mem {
129
+
regulator-off-in-suspend;
130
+
regulator-mode = <4>;
131
+
};
132
+
};
133
+
134
+
vddioddr: VDD_DDR {
135
+
regulator-name = "VDD_DDR";
136
+
regulator-min-microvolt = <1350000>;
137
+
regulator-max-microvolt = <1350000>;
138
+
regulator-initial-mode = <2>;
139
+
regulator-allowed-modes = <2>, <4>;
140
+
regulator-always-on;
141
+
142
+
regulator-state-standby {
143
+
regulator-on-in-suspend;
144
+
regulator-suspend-microvolt = <1350000>;
145
+
regulator-mode = <4>;
146
+
};
147
+
148
+
regulator-state-mem {
149
+
regulator-on-in-suspend;
150
+
regulator-suspend-microvolt = <1350000>;
151
+
regulator-mode = <4>;
152
+
};
153
+
};
154
+
155
+
vddcore: VDD_CORE {
156
+
regulator-name = "VDD_CORE";
157
+
regulator-min-microvolt = <1050000>;
158
+
regulator-max-microvolt = <1050000>;
159
+
regulator-initial-mode = <2>;
160
+
regulator-allowed-modes = <2>, <4>;
161
+
regulator-always-on;
162
+
163
+
regulator-state-standby {
164
+
regulator-on-in-suspend;
165
+
regulator-suspend-microvolt = <1050000>;
166
+
regulator-mode = <4>;
167
+
};
168
+
169
+
regulator-state-mem {
170
+
regulator-off-in-suspend;
171
+
regulator-mode = <4>;
172
+
};
173
+
};
174
+
175
+
vddcpu: VDD_OTHER {
176
+
regulator-name = "VDD_OTHER";
177
+
regulator-min-microvolt = <1050000>;
178
+
regulator-max-microvolt = <1250000>;
179
+
regulator-initial-mode = <2>;
180
+
regulator-allowed-modes = <2>, <4>;
181
+
regulator-ramp-delay = <3125>;
182
+
regulator-always-on;
183
+
184
+
regulator-state-standby {
185
+
regulator-on-in-suspend;
186
+
regulator-suspend-microvolt = <1050000>;
187
+
regulator-mode = <4>;
188
+
};
189
+
190
+
regulator-state-mem {
191
+
regulator-off-in-suspend;
192
+
regulator-mode = <4>;
193
+
};
194
+
};
195
+
196
+
vldo1: LDO1 {
197
+
regulator-name = "LDO1";
198
+
regulator-min-microvolt = <1800000>;
199
+
regulator-max-microvolt = <1800000>;
200
+
regulator-always-on;
201
+
202
+
regulator-state-standby {
203
+
regulator-suspend-microvolt = <1800000>;
204
+
regulator-on-in-suspend;
205
+
};
206
+
207
+
regulator-state-mem {
208
+
regulator-off-in-suspend;
209
+
};
210
+
};
211
+
212
+
vldo2: LDO2 {
213
+
regulator-name = "LDO2";
214
+
regulator-min-microvolt = <1200000>;
215
+
regulator-max-microvolt = <3700000>;
216
+
217
+
regulator-state-standby {
218
+
regulator-on-in-suspend;
219
+
};
220
+
221
+
regulator-state-mem {
222
+
regulator-off-in-suspend;
223
+
};
224
+
};
225
+
};
226
+
};
227
+
228
+
eeprom0: eeprom@51 {
229
+
compatible = "microchip,24aa025e48";
230
+
reg = <0x51>;
231
+
size = <256>;
232
+
pagesize = <16>;
233
+
vcc-supply = <&vdd_3v3>;
234
+
235
+
nvmem-layout {
236
+
compatible = "fixed-layout";
237
+
#address-cells = <1>;
238
+
#size-cells = <1>;
239
+
240
+
eeprom0_eui48: eui48@fa {
241
+
reg = <0xfa 0x6>;
242
+
};
243
+
};
244
+
};
131
245
};
132
246
133
247
&main_xtal {
···
278
106
};
279
107
280
108
&pioa {
109
+
pinctrl_gmac0_default: gmac0-default {
110
+
pinmux = <PIN_PA26__G0_TX0>,
111
+
<PIN_PA27__G0_TX1>,
112
+
<PIN_PB4__G0_TX2>,
113
+
<PIN_PB5__G0_TX3>,
114
+
<PIN_PA29__G0_RX0>,
115
+
<PIN_PA30__G0_RX1>,
116
+
<PIN_PB2__G0_RX2>,
117
+
<PIN_PB6__G0_RX3>,
118
+
<PIN_PA25__G0_TXCTL>,
119
+
<PIN_PB3__G0_RXCK>,
120
+
<PIN_PA28__G0_RXCTL>;
121
+
slew-rate = <0>;
122
+
bias-disable;
123
+
};
124
+
125
+
pinctrl_gmac0_mdio_default: gmac0-mdio-default {
126
+
pinmux = <PIN_PA31__G0_MDC>,
127
+
<PIN_PB0__G0_MDIO>;
128
+
bias-disable;
129
+
};
130
+
131
+
pinctrl_gmac0_phy_irq: gmac0-phy-irq {
132
+
pinmux = <PIN_PC1__GPIO>;
133
+
bias-disable;
134
+
};
135
+
136
+
pinctrl_gmac0_txck_default: gmac0-txck-default {
137
+
pinmux = <PIN_PB1__G0_REFCK>;
138
+
slew-rate = <0>;
139
+
bias-pull-up;
140
+
};
141
+
281
142
pinctrl_i2c10_default: i2c10-default{
282
143
pinmux = <PIN_PB19__FLEXCOM10_IO1>,
283
144
<PIN_PB20__FLEXCOM10_IO0>;
···
344
139
<PIN_PD19__FLEXCOM6_IO1>;
345
140
bias-disable;
346
141
};
142
+
};
143
+
144
+
&rtt {
145
+
atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
347
146
};
348
147
349
148
&sdmmc1 {
+32
arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts
+32
arch/arm/boot/dts/microchip/at91-sama7g54_curiosity.dts
···
369
369
spi-tx-bus-width = <4>;
370
370
spi-rx-bus-width = <4>;
371
371
m25p,fast-read;
372
+
label = "at91-qspi";
373
+
374
+
partitions {
375
+
compatible = "fixed-partitions";
376
+
#address-cells = <1>;
377
+
#size-cells = <1>;
378
+
379
+
at91bootstrap@0 {
380
+
label = "qspi1: at91bootstrap";
381
+
reg = <0x0 0x40000>;
382
+
};
383
+
384
+
bootloader@40000 {
385
+
label = "qspi1: u-boot";
386
+
reg = <0x40000 0x100000>;
387
+
};
388
+
389
+
bootloaderenv@140000 {
390
+
label = "qspi1: u-boot env";
391
+
reg = <0x140000 0x40000>;
392
+
};
393
+
394
+
dtb@180000 {
395
+
label = "qspi1: device tree";
396
+
reg = <0x180000 0x80000>;
397
+
};
398
+
399
+
kernel@200000 {
400
+
label = "qspi1: kernel";
401
+
reg = <0x200000 0x600000>;
402
+
};
403
+
};
372
404
};
373
405
};
374
406
+1
-1
arch/arm/boot/dts/microchip/at91sam9263ek.dts
+1
-1
arch/arm/boot/dts/microchip/at91sam9263ek.dts
+346
arch/arm/boot/dts/microchip/sama7d65.dtsi
+346
arch/arm/boot/dts/microchip/sama7d65.dtsi
···
47
47
};
48
48
};
49
49
50
+
ns_sram: sram@100000 {
51
+
compatible = "mmio-sram";
52
+
reg = <0x100000 0x20000>;
53
+
ranges;
54
+
#address-cells = <1>;
55
+
#size-cells = <1>;
56
+
};
57
+
50
58
soc {
51
59
compatible = "simple-bus";
52
60
ranges;
53
61
#address-cells = <1>;
54
62
#size-cells = <1>;
63
+
64
+
securam: sram@e0000800 {
65
+
compatible = "microchip,sama7d65-securam", "atmel,sama5d2-securam", "mmio-sram";
66
+
reg = <0xe0000800 0x4000>;
67
+
ranges = <0 0xe0000800 0x4000>;
68
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
69
+
#address-cells = <1>;
70
+
#size-cells = <1>;
71
+
no-memory-wc;
72
+
};
73
+
74
+
secumod: security-module@e0004000 {
75
+
compatible = "microchip,sama7d65-secumod", "atmel,sama5d2-secumod", "syscon";
76
+
reg = <0xe0004000 0x4000>;
77
+
gpio-controller;
78
+
#gpio-cells = <2>;
79
+
};
55
80
56
81
sfrbu: sfr@e0008000 {
57
82
compatible ="microchip,sama7d65-sfrbu", "atmel,sama5d2-sfrbu", "syscon";
···
132
107
status = "disabled";
133
108
};
134
109
110
+
rtt: rtc@e001d300 {
111
+
compatible = "microchip,sama7d65-rtt", "atmel,at91sam9260-rtt";
112
+
reg = <0xe001d300 0x30>;
113
+
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
114
+
clocks = <&clk32k 0>;
115
+
};
116
+
135
117
clk32k: clock-controller@e001d500 {
136
118
compatible = "microchip,sama7d65-sckc", "microchip,sam9x60-sckc";
137
119
reg = <0xe001d500 0x4>;
138
120
clocks = <&slow_xtal>;
139
121
#clock-cells = <1>;
122
+
};
123
+
124
+
gpbr: syscon@e001d700 {
125
+
compatible = "microchip,sama7d65-gpbr", "syscon";
126
+
reg = <0xe001d700 0x48>;
140
127
};
141
128
142
129
rtc: rtc@e001d800 {
···
206
169
status = "disabled";
207
170
};
208
171
172
+
gmac0: ethernet@e1618000 {
173
+
compatible = "microchip,sama7d65-gem", "microchip,sama7g5-gem";
174
+
reg = <0xe1618000 0x2000>;
175
+
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
176
+
<GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
177
+
<GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
178
+
<GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
179
+
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
180
+
<GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
181
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_GCK 46>, <&pmc PMC_TYPE_GCK 49>;
182
+
clock-names = "pclk", "hclk", "tx_clk", "tsu_clk";
183
+
assigned-clocks = <&pmc PMC_TYPE_GCK 46>, <&pmc PMC_TYPE_GCK 49>;
184
+
assigned-clock-rates = <125000000>, <200000000>;
185
+
status = "disabled";
186
+
};
187
+
188
+
gmac1: ethernet@e161c000 {
189
+
compatible = "microchip,sama7d65-gem", "microchip,sama7g5-gem";
190
+
reg = <0xe161c000 0x2000>;
191
+
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
192
+
<GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
193
+
<GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
194
+
<GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
195
+
<GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
196
+
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
197
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 47>, <&pmc PMC_TYPE_PERIPHERAL 47>,<&pmc PMC_TYPE_GCK 47>, <&pmc PMC_TYPE_GCK 50>;
198
+
clock-names = "pclk", "hclk", "tx_clk", "tsu_clk";
199
+
assigned-clocks = <&pmc PMC_TYPE_GCK 47>, <&pmc PMC_TYPE_GCK 50>;
200
+
assigned-clock-rates = <125000000>, <200000000>;
201
+
status = "disabled";
202
+
};
203
+
209
204
pit64b0: timer@e1800000 {
210
205
compatible = "microchip,sama7d65-pit64b", "microchip,sam9x60-pit64b";
211
206
reg = <0xe1800000 0x100>;
···
252
183
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
253
184
clocks = <&pmc PMC_TYPE_PERIPHERAL 67>, <&pmc PMC_TYPE_GCK 67>;
254
185
clock-names = "pclk", "gclk";
186
+
};
187
+
188
+
flx0: flexcom@e1820000 {
189
+
compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
190
+
reg = <0xe1820000 0x200>;
191
+
ranges = <0x0 0xe1820000 0x800>;
192
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
193
+
#address-cells = <1>;
194
+
#size-cells = <1>;
195
+
status = "disabled";
196
+
197
+
uart0: serial@200 {
198
+
compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
199
+
reg = <0x200 0x200>;
200
+
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
201
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
202
+
clock-names = "usart";
203
+
dmas = <&dma1 AT91_XDMAC_DT_PERID(6)>,
204
+
<&dma1 AT91_XDMAC_DT_PERID(5)>;
205
+
dma-names = "tx", "rx";
206
+
atmel,use-dma-rx;
207
+
atmel,use-dma-tx;
208
+
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
209
+
status = "disabled";
210
+
};
211
+
212
+
i2c0: i2c@600 {
213
+
compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
214
+
reg = <0x600 0x200>;
215
+
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
216
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
217
+
#address-cells = <1>;
218
+
#size-cells = <0>;
219
+
atmel,fifo-size = <32>;
220
+
dmas = <&dma0 AT91_XDMAC_DT_PERID(6)>,
221
+
<&dma0 AT91_XDMAC_DT_PERID(5)>;
222
+
dma-names = "tx", "rx";
223
+
status = "disabled";
224
+
};
225
+
};
226
+
227
+
flx1: flexcom@e1824000 {
228
+
compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
229
+
reg = <0xe1824000 0x200>;
230
+
ranges = <0x0 0xe1824000 0x800>;
231
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
232
+
#address-cells = <1>;
233
+
#size-cells = <1>;
234
+
status = "disabled";
235
+
236
+
spi1: spi@400 {
237
+
compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
238
+
reg = <0x400 0x200>;
239
+
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
240
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
241
+
clock-names = "spi_clk";
242
+
#address-cells = <1>;
243
+
#size-cells = <0>;
244
+
dmas = <&dma0 AT91_XDMAC_DT_PERID(8)>,
245
+
<&dma0 AT91_XDMAC_DT_PERID(7)>;
246
+
dma-names = "tx", "rx";
247
+
atmel,fifo-size = <32>;
248
+
status = "disabled";
249
+
};
250
+
251
+
i2c1: i2c@600 {
252
+
compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
253
+
reg = <0x600 0x200>;
254
+
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
255
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
256
+
#address-cells = <1>;
257
+
#size-cells = <0>;
258
+
dmas = <&dma0 AT91_XDMAC_DT_PERID(8)>,
259
+
<&dma0 AT91_XDMAC_DT_PERID(7)>;
260
+
dma-names = "tx", "rx";
261
+
atmel,fifo-size = <32>;
262
+
status = "disabled";
263
+
};
264
+
};
265
+
266
+
flx2: flexcom@e1828000 {
267
+
compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
268
+
reg = <0xe1828000 0x200>;
269
+
ranges = <0x0 0xe1828000 0x800>;
270
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
271
+
#address-cells = <1>;
272
+
#size-cells = <1>;
273
+
status = "disabled";
274
+
275
+
uart2: serial@200 {
276
+
compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
277
+
reg = <0x200 0x200>;
278
+
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
279
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
280
+
clock-names = "usart";
281
+
dmas = <&dma1 AT91_XDMAC_DT_PERID(10)>,
282
+
<&dma1 AT91_XDMAC_DT_PERID(9)>;
283
+
dma-names = "tx", "rx";
284
+
atmel,use-dma-rx;
285
+
atmel,use-dma-tx;
286
+
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
287
+
status = "disabled";
288
+
};
289
+
};
290
+
291
+
flx3: flexcom@e182c000 {
292
+
compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
293
+
reg = <0xe182c000 0x200>;
294
+
ranges = <0x0 0xe182c000 0x800>;
295
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
296
+
#address-cells = <1>;
297
+
#size-cells = <1>;
298
+
status = "disabled";
299
+
300
+
i2c3: i2c@600 {
301
+
compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
302
+
reg = <0x600 0x200>;
303
+
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
304
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
305
+
#address-cells = <1>;
306
+
#size-cells = <1>;
307
+
dmas = <&dma0 AT91_XDMAC_DT_PERID(12)>,
308
+
<&dma0 AT91_XDMAC_DT_PERID(11)>;
309
+
dma-names = "tx", "rx";
310
+
atmel,fifo-size = <32>;
311
+
status = "disabled";
312
+
};
313
+
314
+
};
315
+
316
+
flx4: flexcom@e2018000 {
317
+
compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
318
+
reg = <0xe2018000 0x200>;
319
+
ranges = <0x0 0xe2018000 0x800>;
320
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
321
+
#address-cells = <1>;
322
+
#size-cells = <1>;
323
+
status = "disabled";
324
+
325
+
uart4: serial@200 {
326
+
compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
327
+
reg = <0x200 0x200>;
328
+
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
329
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
330
+
clock-names = "usart";
331
+
dmas = <&dma1 AT91_XDMAC_DT_PERID(14)>,
332
+
<&dma1 AT91_XDMAC_DT_PERID(13)>;
333
+
dma-names = "tx", "rx";
334
+
atmel,use-dma-rx;
335
+
atmel,use-dma-tx;
336
+
atmel,fifo-size = <16>;
337
+
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
338
+
status = "disabled";
339
+
};
340
+
341
+
spi4: spi@400 {
342
+
compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
343
+
reg = <0x400 0x200>;
344
+
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
345
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
346
+
clock-names = "spi_clk";
347
+
#address-cells = <1>;
348
+
#size-cells = <0>;
349
+
dmas = <&dma0 AT91_XDMAC_DT_PERID(14)>,
350
+
<&dma0 AT91_XDMAC_DT_PERID(13)>;
351
+
dma-names = "tx", "rx";
352
+
atmel,fifo-size = <32>;
353
+
status = "disabled";
354
+
};
355
+
};
356
+
357
+
flx5: flexcom@e201c000 {
358
+
compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
359
+
reg = <0xe201c000 0x200>;
360
+
ranges = <0x0 0xe201c000 0x800>;
361
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
362
+
#address-cells = <1>;
363
+
#size-cells = <1>;
364
+
status = "disabled";
365
+
366
+
i2c5: i2c@600 {
367
+
compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
368
+
reg = <0x600 0x200>;
369
+
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
370
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
371
+
#address-cells = <1>;
372
+
#size-cells = <0>;
373
+
dmas = <&dma0 AT91_XDMAC_DT_PERID(16)>,
374
+
<&dma0 AT91_XDMAC_DT_PERID(15)>;
375
+
dma-names = "tx", "rx";
376
+
atmel,fifo-size = <32>;
377
+
status = "disabled";
378
+
};
255
379
};
256
380
257
381
flx6: flexcom@e2020000 {
···
468
206
};
469
207
};
470
208
209
+
flx7: flexcom@e2024000 {
210
+
compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
211
+
reg = <0xe2024000 0x200>;
212
+
ranges = <0x0 0xe2024000 0x800>;
213
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
214
+
#address-cells = <1>;
215
+
#size-cells = <1>;
216
+
status = "disabled";
217
+
218
+
uart7: serial@200 {
219
+
compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
220
+
reg = <0x200 0x200>;
221
+
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
222
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
223
+
clock-names = "usart";
224
+
dmas = <&dma1 AT91_XDMAC_DT_PERID(20)>,
225
+
<&dma1 AT91_XDMAC_DT_PERID(19)>;
226
+
dma-names = "tx", "rx";
227
+
atmel,use-dma-rx;
228
+
atmel,use-dma-tx;
229
+
atmel,fifo-size = <16>;
230
+
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
231
+
status = "disabled";
232
+
};
233
+
};
234
+
235
+
flx8: flexcom@e281c000 {
236
+
compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
237
+
reg = <0xe281c000 0x200>;
238
+
ranges = <0x0 0xe281c000 0x800>;
239
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
240
+
#address-cells = <1>;
241
+
#size-cells = <1>;
242
+
status = "disabled";
243
+
244
+
i2c8: i2c@600 {
245
+
compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
246
+
reg = <0x600 0x200>;
247
+
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
248
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
249
+
#address-cells = <1>;
250
+
#size-cells = <0>;
251
+
dmas = <&dma0 AT91_XDMAC_DT_PERID(22)>,
252
+
<&dma0 AT91_XDMAC_DT_PERID(21)>;
253
+
dma-names = "tx", "rx";
254
+
atmel,fifo-size = <32>;
255
+
status = "disabled";
256
+
};
257
+
};
258
+
259
+
flx9: flexcom@e2820000 {
260
+
compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
261
+
reg = <0xe2820000 0x200>;
262
+
ranges = <0x0 0xe281c000 0x800>;
263
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
264
+
#address-cells = <1>;
265
+
#size-cells = <1>;
266
+
status = "disabled";
267
+
268
+
i2c9: i2c@600 {
269
+
compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
270
+
reg = <0x600 0x200>;
271
+
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
272
+
clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
273
+
#address-cells = <1>;
274
+
#size-cells = <0>;
275
+
dmas = <&dma0 AT91_XDMAC_DT_PERID(24)>,
276
+
<&dma0 AT91_XDMAC_DT_PERID(23)>;
277
+
dma-names = "tx", "rx";
278
+
atmel,fifo-size = <32>;
279
+
status = "disabled";
280
+
};
281
+
};
282
+
471
283
flx10: flexcom@e2824000 {
472
284
compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
473
285
reg = <0xe2824000 0x200>;
···
561
225
atmel,fifo-size = <32>;
562
226
status = "disabled";
563
227
};
228
+
};
229
+
230
+
uddrc: uddrc@e3800000 {
231
+
compatible = "microchip,sama7d65-uddrc", "microchip,sama7g5-uddrc";
232
+
reg = <0xe3800000 0x4000>;
233
+
};
234
+
235
+
ddr3phy: ddr3phy@e3804000 {
236
+
compatible = "microchip,sama7d65-ddr3phy", "microchip,sama7g5-ddr3phy";
237
+
reg = <0xe3804000 0x1000>;
564
238
};
565
239
566
240
gic: interrupt-controller@e8c11000 {
+1
-1
arch/arm/boot/dts/microchip/tny_a9263.dts
+1
-1
arch/arm/boot/dts/microchip/tny_a9263.dts
-8
arch/arm/boot/dts/microchip/usb_a9260.dts
-8
arch/arm/boot/dts/microchip/usb_a9260.dts
···
12
12
model = "Calao USB A9260";
13
13
compatible = "calao,usb-a9260", "atmel,at91sam9260", "atmel,at91sam9";
14
14
15
-
chosen {
16
-
bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
17
-
};
18
-
19
-
memory@20000000 {
20
-
reg = <0x20000000 0x4000000>;
21
-
};
22
-
23
15
ahb {
24
16
apb {
25
17
shdwc: poweroff@fffffd10 {
+9
arch/arm/boot/dts/microchip/usb_a9260_common.dtsi
+9
arch/arm/boot/dts/microchip/usb_a9260_common.dtsi
···
6
6
*/
7
7
8
8
/ {
9
+
chosen {
10
+
bootargs = "mem=64M root=/dev/mtdblock5 rw rootfstype=ubifs";
11
+
stdout-path = "serial0:115200n8";
12
+
};
13
+
9
14
clocks {
10
15
slow_xtal {
11
16
clock-frequency = <32768>;
···
19
14
main_xtal {
20
15
clock-frequency = <12000000>;
21
16
};
17
+
};
18
+
19
+
memory@20000000 {
20
+
reg = <0x20000000 0x4000000>;
22
21
};
23
22
24
23
ahb {
+2
-2
arch/arm/boot/dts/microchip/usb_a9263.dts
+2
-2
arch/arm/boot/dts/microchip/usb_a9263.dts
···
58
58
};
59
59
60
60
spi0: spi@fffa4000 {
61
-
cs-gpios = <&pioB 15 GPIO_ACTIVE_HIGH>;
61
+
cs-gpios = <&pioA 5 GPIO_ACTIVE_LOW>;
62
62
status = "okay";
63
63
flash@0 {
64
64
compatible = "atmel,at45", "atmel,dataflash";
···
84
84
nand@3 {
85
85
reg = <0x3 0x0 0x800000>;
86
86
rb-gpios = <&pioA 22 GPIO_ACTIVE_HIGH>;
87
-
cs-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>;
87
+
cs-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
88
88
nand-bus-width = <8>;
89
89
nand-ecc-mode = "soft";
90
90
nand-on-flash-bbt;
+16
-1
arch/arm/boot/dts/microchip/usb_a9g20.dts
+16
-1
arch/arm/boot/dts/microchip/usb_a9g20.dts
···
5
5
* Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
6
6
*/
7
7
/dts-v1/;
8
-
#include "usb_a9g20_common.dtsi"
8
+
#include "at91sam9g20.dtsi"
9
+
#include "usb_a9260_common.dtsi"
9
10
10
11
/ {
11
12
model = "Calao USB A9G20";
12
13
compatible = "calao,usb-a9g20", "atmel,at91sam9g20", "atmel,at91sam9";
14
+
};
15
+
16
+
&spi0 {
17
+
cs-gpios = <&pioC 11 GPIO_ACTIVE_LOW>;
18
+
status = "okay";
19
+
/* TODO: Some revisions might have a dataflash here instead of an EEPROM */
20
+
eeprom@0 {
21
+
compatible = "st,m95640", "atmel,at25";
22
+
reg = <0>;
23
+
spi-max-frequency = <2000000>;
24
+
size = <8192>;
25
+
pagesize = <32>;
26
+
address-width = <16>;
27
+
};
13
28
};
-27
arch/arm/boot/dts/microchip/usb_a9g20_common.dtsi
-27
arch/arm/boot/dts/microchip/usb_a9g20_common.dtsi
···
1
-
// SPDX-License-Identifier: GPL-2.0-or-later
2
-
/*
3
-
* usb_a9g20.dts - Device Tree file for Calao USB A9G20 board
4
-
*
5
-
* Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
6
-
*/
7
-
8
-
#include "at91sam9g20.dtsi"
9
-
#include "usb_a9260_common.dtsi"
10
-
11
-
/ {
12
-
chosen {
13
-
bootargs = "mem=64M root=/dev/mtdblock5 rw rootfstype=ubifs";
14
-
stdout-path = "serial0:115200n8";
15
-
};
16
-
17
-
memory@20000000 {
18
-
reg = <0x20000000 0x4000000>;
19
-
};
20
-
21
-
i2c-gpio-0 {
22
-
rtc@56 {
23
-
compatible = "microcrystal,rv3029";
24
-
reg = <0x56>;
25
-
};
26
-
};
27
-
};
+9
-1
arch/arm/boot/dts/microchip/usb_a9g20_lpw.dts
+9
-1
arch/arm/boot/dts/microchip/usb_a9g20_lpw.dts
···
5
5
* Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
6
6
*/
7
7
/dts-v1/;
8
-
#include "usb_a9g20_common.dtsi"
8
+
#include "at91sam9g20.dtsi"
9
+
#include "usb_a9260_common.dtsi"
9
10
10
11
/ {
11
12
model = "Calao USB A9G20 Low Power";
···
26
25
interrupts = <4 IRQ_TYPE_EDGE_BOTH>;
27
26
};
28
27
};
28
+
};
29
+
};
30
+
31
+
i2c-gpio-0 {
32
+
rtc@56 {
33
+
compatible = "microcrystal,rv3029";
34
+
reg = <0x56>;
29
35
};
30
36
};
31
37
};