Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/msm: Remove vram carveout support
It is standing in the way of drm_gpuvm / VM_BIND support. Not to
mention frequently broken and rarely tested. And I think only needed
for a 10yr old not quite upstream SoC (msm8974).
Maybe we can add support back in later, but I'm doubtful.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
Tested-by: Antonino Maniscalco <antomani103@gmail.com>
Reviewed-by: Antonino Maniscalco <antomani103@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/661467/
+19
-309
-8
drivers/gpu/drm/msm/adreno/a2xx_gpu.c
-8
drivers/gpu/drm/msm/adreno/a2xx_gpu.c
-15
drivers/gpu/drm/msm/adreno/a3xx_gpu.c
-15
drivers/gpu/drm/msm/adreno/a3xx_gpu.c
···
581
581
goto fail;
582
582
}
583
583
584
-
if (!gpu->vm) {
585
-
/* TODO we think it is possible to configure the GPU to
586
-
* restrict access to VRAM carveout. But the required
587
-
* registers are unknown. For now just bail out and
588
-
* limp along with just modesetting. If it turns out
589
-
* to not be possible to restrict access, then we must
590
-
* implement a cmdstream validator.
591
-
*/
592
-
DRM_DEV_ERROR(dev->dev, "No memory protection without IOMMU\n");
593
-
if (!allow_vram_carveout) {
594
-
ret = -ENXIO;
595
-
goto fail;
596
-
}
597
-
}
598
-
599
584
icc_path = devm_of_icc_get(&pdev->dev, "gfx-mem");
600
585
if (IS_ERR(icc_path)) {
601
586
ret = PTR_ERR(icc_path);
-15
drivers/gpu/drm/msm/adreno/a4xx_gpu.c
-15
drivers/gpu/drm/msm/adreno/a4xx_gpu.c
···
695
695
696
696
adreno_gpu->uche_trap_base = 0xffff0000ffff0000ull;
697
697
698
-
if (!gpu->vm) {
699
-
/* TODO we think it is possible to configure the GPU to
700
-
* restrict access to VRAM carveout. But the required
701
-
* registers are unknown. For now just bail out and
702
-
* limp along with just modesetting. If it turns out
703
-
* to not be possible to restrict access, then we must
704
-
* implement a cmdstream validator.
705
-
*/
706
-
DRM_DEV_ERROR(dev->dev, "No memory protection without IOMMU\n");
707
-
if (!allow_vram_carveout) {
708
-
ret = -ENXIO;
709
-
goto fail;
710
-
}
711
-
}
712
-
713
698
icc_path = devm_of_icc_get(&pdev->dev, "gfx-mem");
714
699
if (IS_ERR(icc_path)) {
715
700
ret = PTR_ERR(icc_path);
+1
-2
drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+1
-2
drivers/gpu/drm/msm/adreno/a5xx_gpu.c
···
1786
1786
return ERR_PTR(ret);
1787
1787
}
1788
1788
1789
-
if (gpu->vm)
1790
-
msm_mmu_set_fault_handler(gpu->vm->mmu, gpu, a5xx_fault_handler);
1789
+
msm_mmu_set_fault_handler(gpu->vm->mmu, gpu, a5xx_fault_handler);
1791
1790
1792
1791
/* Set up the preemption specific bits and pieces for each ringbuffer */
1793
1792
a5xx_preempt_init(gpu);
+1
-2
drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+1
-2
drivers/gpu/drm/msm/adreno/a6xx_gpu.c
···
2560
2560
2561
2561
adreno_gpu->uche_trap_base = 0x1fffffffff000ull;
2562
2562
2563
-
if (gpu->vm)
2564
-
msm_mmu_set_fault_handler(gpu->vm->mmu, gpu, a6xx_fault_handler);
2563
+
msm_mmu_set_fault_handler(gpu->vm->mmu, gpu, a6xx_fault_handler);
2565
2564
2566
2565
a6xx_calc_ubwc_config(adreno_gpu);
2567
2566
/* Set up the preemption specific bits and pieces for each ringbuffer */
-4
drivers/gpu/drm/msm/adreno/adreno_device.c
-4
drivers/gpu/drm/msm/adreno/adreno_device.c
···
16
16
MODULE_PARM_DESC(snapshot_debugbus, "Include debugbus sections in GPU devcoredump (if not fused off)");
17
17
module_param_named(snapshot_debugbus, snapshot_debugbus, bool, 0600);
18
18
19
-
bool allow_vram_carveout = false;
20
-
MODULE_PARM_DESC(allow_vram_carveout, "Allow using VRAM Carveout, in place of IOMMU");
21
-
module_param_named(allow_vram_carveout, allow_vram_carveout, bool, 0600);
22
-
23
19
int enable_preemption = -1;
24
20
MODULE_PARM_DESC(enable_preemption, "Enable preemption (A7xx only) (1=on , 0=disable, -1=auto (default))");
25
21
module_param(enable_preemption, int, 0600);
+3
-1
drivers/gpu/drm/msm/adreno/adreno_gpu.c
+3
-1
drivers/gpu/drm/msm/adreno/adreno_gpu.c
-1
drivers/gpu/drm/msm/adreno/adreno_gpu.h
-1
drivers/gpu/drm/msm/adreno/adreno_gpu.h
+1
-116
drivers/gpu/drm/msm/msm_drv.c
+1
-116
drivers/gpu/drm/msm/msm_drv.c
···
46
46
#define MSM_VERSION_MINOR 12
47
47
#define MSM_VERSION_PATCHLEVEL 0
48
48
49
-
static void msm_deinit_vram(struct drm_device *ddev);
50
-
51
-
static char *vram = "16m";
52
-
MODULE_PARM_DESC(vram, "Configure VRAM size (for devices without IOMMU/GPUMMU)");
53
-
module_param(vram, charp, 0);
54
-
55
49
bool dumpstate;
56
50
MODULE_PARM_DESC(dumpstate, "Dump KMS state on errors");
57
51
module_param(dumpstate, bool, 0600);
···
91
97
if (priv->kms)
92
98
msm_drm_kms_uninit(dev);
93
99
94
-
msm_deinit_vram(ddev);
95
-
96
100
component_unbind_all(dev, ddev);
97
101
98
102
ddev->dev_private = NULL;
···
99
107
destroy_workqueue(priv->wq);
100
108
101
109
return 0;
102
-
}
103
-
104
-
bool msm_use_mmu(struct drm_device *dev)
105
-
{
106
-
struct msm_drm_private *priv = dev->dev_private;
107
-
108
-
/*
109
-
* a2xx comes with its own MMU
110
-
* On other platforms IOMMU can be declared specified either for the
111
-
* MDP/DPU device or for its parent, MDSS device.
112
-
*/
113
-
return priv->is_a2xx ||
114
-
device_iommu_mapped(dev->dev) ||
115
-
device_iommu_mapped(dev->dev->parent);
116
-
}
117
-
118
-
static int msm_init_vram(struct drm_device *dev)
119
-
{
120
-
struct msm_drm_private *priv = dev->dev_private;
121
-
struct device_node *node;
122
-
unsigned long size = 0;
123
-
int ret = 0;
124
-
125
-
/* In the device-tree world, we could have a 'memory-region'
126
-
* phandle, which gives us a link to our "vram". Allocating
127
-
* is all nicely abstracted behind the dma api, but we need
128
-
* to know the entire size to allocate it all in one go. There
129
-
* are two cases:
130
-
* 1) device with no IOMMU, in which case we need exclusive
131
-
* access to a VRAM carveout big enough for all gpu
132
-
* buffers
133
-
* 2) device with IOMMU, but where the bootloader puts up
134
-
* a splash screen. In this case, the VRAM carveout
135
-
* need only be large enough for fbdev fb. But we need
136
-
* exclusive access to the buffer to avoid the kernel
137
-
* using those pages for other purposes (which appears
138
-
* as corruption on screen before we have a chance to
139
-
* load and do initial modeset)
140
-
*/
141
-
142
-
node = of_parse_phandle(dev->dev->of_node, "memory-region", 0);
143
-
if (node) {
144
-
struct resource r;
145
-
ret = of_address_to_resource(node, 0, &r);
146
-
of_node_put(node);
147
-
if (ret)
148
-
return ret;
149
-
size = r.end - r.start + 1;
150
-
DRM_INFO("using VRAM carveout: %lx@%pa\n", size, &r.start);
151
-
152
-
/* if we have no IOMMU, then we need to use carveout allocator.
153
-
* Grab the entire DMA chunk carved out in early startup in
154
-
* mach-msm:
155
-
*/
156
-
} else if (!msm_use_mmu(dev)) {
157
-
DRM_INFO("using %s VRAM carveout\n", vram);
158
-
size = memparse(vram, NULL);
159
-
}
160
-
161
-
if (size) {
162
-
unsigned long attrs = 0;
163
-
void *p;
164
-
165
-
priv->vram.size = size;
166
-
167
-
drm_mm_init(&priv->vram.mm, 0, (size >> PAGE_SHIFT) - 1);
168
-
spin_lock_init(&priv->vram.lock);
169
-
170
-
attrs |= DMA_ATTR_NO_KERNEL_MAPPING;
171
-
attrs |= DMA_ATTR_WRITE_COMBINE;
172
-
173
-
/* note that for no-kernel-mapping, the vaddr returned
174
-
* is bogus, but non-null if allocation succeeded:
175
-
*/
176
-
p = dma_alloc_attrs(dev->dev, size,
177
-
&priv->vram.paddr, GFP_KERNEL, attrs);
178
-
if (!p) {
179
-
DRM_DEV_ERROR(dev->dev, "failed to allocate VRAM\n");
180
-
priv->vram.paddr = 0;
181
-
return -ENOMEM;
182
-
}
183
-
184
-
DRM_DEV_INFO(dev->dev, "VRAM: %08x->%08x\n",
185
-
(uint32_t)priv->vram.paddr,
186
-
(uint32_t)(priv->vram.paddr + size));
187
-
}
188
-
189
-
return ret;
190
-
}
191
-
192
-
static void msm_deinit_vram(struct drm_device *ddev)
193
-
{
194
-
struct msm_drm_private *priv = ddev->dev_private;
195
-
unsigned long attrs = DMA_ATTR_NO_KERNEL_MAPPING;
196
-
197
-
if (!priv->vram.paddr)
198
-
return;
199
-
200
-
drm_mm_takedown(&priv->vram.mm);
201
-
dma_free_attrs(ddev->dev, priv->vram.size, NULL, priv->vram.paddr,
202
-
attrs);
203
110
}
204
111
205
112
static int msm_drm_init(struct device *dev, const struct drm_driver *drv)
···
151
260
goto err_destroy_wq;
152
261
}
153
262
154
-
ret = msm_init_vram(ddev);
155
-
if (ret)
156
-
goto err_destroy_wq;
157
-
158
263
dma_set_max_seg_size(dev, UINT_MAX);
159
264
160
265
/* Bind all our sub-components: */
161
266
ret = component_bind_all(dev, ddev);
162
267
if (ret)
163
-
goto err_deinit_vram;
268
+
goto err_destroy_wq;
164
269
165
270
ret = msm_gem_shrinker_init(ddev);
166
271
if (ret)
···
193
306
194
307
return ret;
195
308
196
-
err_deinit_vram:
197
-
msm_deinit_vram(ddev);
198
309
err_destroy_wq:
199
310
destroy_workqueue(priv->wq);
200
311
err_put_dev:
-11
drivers/gpu/drm/msm/msm_drv.h
-11
drivers/gpu/drm/msm/msm_drv.h
···
183
183
184
184
struct msm_drm_thread event_thread[MAX_CRTCS];
185
185
186
-
/* VRAM carveout, used when no IOMMU: */
187
-
struct {
188
-
unsigned long size;
189
-
dma_addr_t paddr;
190
-
/* NOTE: mm managed at the page level, size is in # of pages
191
-
* and position mm_node->start is in # of pages:
192
-
*/
193
-
struct drm_mm mm;
194
-
spinlock_t lock; /* Protects drm_mm node allocation/removal */
195
-
} vram;
196
-
197
186
struct notifier_block vmap_notifier;
198
187
struct shrinker *shrinker;
199
188
+12
-119
drivers/gpu/drm/msm/msm_gem.c
+12
-119
drivers/gpu/drm/msm/msm_gem.c
···
17
17
#include <trace/events/gpu_mem.h>
18
18
19
19
#include "msm_drv.h"
20
-
#include "msm_fence.h"
21
20
#include "msm_gem.h"
22
21
#include "msm_gpu.h"
23
-
#include "msm_mmu.h"
24
-
25
-
static dma_addr_t physaddr(struct drm_gem_object *obj)
26
-
{
27
-
struct msm_gem_object *msm_obj = to_msm_bo(obj);
28
-
struct msm_drm_private *priv = obj->dev->dev_private;
29
-
return (((dma_addr_t)msm_obj->vram_node->start) << PAGE_SHIFT) +
30
-
priv->vram.paddr;
31
-
}
32
-
33
-
static bool use_pages(struct drm_gem_object *obj)
34
-
{
35
-
struct msm_gem_object *msm_obj = to_msm_bo(obj);
36
-
return !msm_obj->vram_node;
37
-
}
38
22
39
23
static void update_device_mem(struct msm_drm_private *priv, ssize_t size)
40
24
{
···
119
135
mutex_unlock(&priv->lru.lock);
120
136
}
121
137
122
-
/* allocate pages from VRAM carveout, used when no IOMMU: */
123
-
static struct page **get_pages_vram(struct drm_gem_object *obj, int npages)
124
-
{
125
-
struct msm_gem_object *msm_obj = to_msm_bo(obj);
126
-
struct msm_drm_private *priv = obj->dev->dev_private;
127
-
dma_addr_t paddr;
128
-
struct page **p;
129
-
int ret, i;
130
-
131
-
p = kvmalloc_array(npages, sizeof(struct page *), GFP_KERNEL);
132
-
if (!p)
133
-
return ERR_PTR(-ENOMEM);
134
-
135
-
spin_lock(&priv->vram.lock);
136
-
ret = drm_mm_insert_node(&priv->vram.mm, msm_obj->vram_node, npages);
137
-
spin_unlock(&priv->vram.lock);
138
-
if (ret) {
139
-
kvfree(p);
140
-
return ERR_PTR(ret);
141
-
}
142
-
143
-
paddr = physaddr(obj);
144
-
for (i = 0; i < npages; i++) {
145
-
p[i] = pfn_to_page(__phys_to_pfn(paddr));
146
-
paddr += PAGE_SIZE;
147
-
}
148
-
149
-
return p;
150
-
}
151
-
152
138
static struct page **get_pages(struct drm_gem_object *obj)
153
139
{
154
140
struct msm_gem_object *msm_obj = to_msm_bo(obj);
···
130
176
struct page **p;
131
177
int npages = obj->size >> PAGE_SHIFT;
132
178
133
-
if (use_pages(obj))
134
-
p = drm_gem_get_pages(obj);
135
-
else
136
-
p = get_pages_vram(obj, npages);
179
+
p = drm_gem_get_pages(obj);
137
180
138
181
if (IS_ERR(p)) {
139
182
DRM_DEV_ERROR(dev->dev, "could not get pages: %ld\n",
···
163
212
return msm_obj->pages;
164
213
}
165
214
166
-
static void put_pages_vram(struct drm_gem_object *obj)
167
-
{
168
-
struct msm_gem_object *msm_obj = to_msm_bo(obj);
169
-
struct msm_drm_private *priv = obj->dev->dev_private;
170
-
171
-
spin_lock(&priv->vram.lock);
172
-
drm_mm_remove_node(msm_obj->vram_node);
173
-
spin_unlock(&priv->vram.lock);
174
-
175
-
kvfree(msm_obj->pages);
176
-
}
177
-
178
215
static void put_pages(struct drm_gem_object *obj)
179
216
{
180
217
struct msm_gem_object *msm_obj = to_msm_bo(obj);
···
183
244
184
245
update_device_mem(obj->dev->dev_private, -obj->size);
185
246
186
-
if (use_pages(obj))
187
-
drm_gem_put_pages(obj, msm_obj->pages, true, false);
188
-
else
189
-
put_pages_vram(obj);
247
+
drm_gem_put_pages(obj, msm_obj->pages, true, false);
190
248
191
249
msm_obj->pages = NULL;
192
250
update_lru(obj);
···
1143
1207
struct msm_drm_private *priv = dev->dev_private;
1144
1208
struct msm_gem_object *msm_obj;
1145
1209
struct drm_gem_object *obj = NULL;
1146
-
bool use_vram = false;
1147
1210
int ret;
1148
1211
1149
1212
size = PAGE_ALIGN(size);
1150
-
1151
-
if (!msm_use_mmu(dev))
1152
-
use_vram = true;
1153
-
else if ((flags & (MSM_BO_STOLEN | MSM_BO_SCANOUT)) && priv->vram.size)
1154
-
use_vram = true;
1155
-
1156
-
if (GEM_WARN_ON(use_vram && !priv->vram.size))
1157
-
return ERR_PTR(-EINVAL);
1158
1213
1159
1214
/* Disallow zero sized objects as they make the underlying
1160
1215
* infrastructure grumpy
···
1159
1232
1160
1233
msm_obj = to_msm_bo(obj);
1161
1234
1162
-
if (use_vram) {
1163
-
struct msm_gem_vma *vma;
1164
-
struct page **pages;
1165
-
1166
-
drm_gem_private_object_init(dev, obj, size);
1167
-
1168
-
msm_gem_lock(obj);
1169
-
1170
-
vma = add_vma(obj, NULL);
1171
-
msm_gem_unlock(obj);
1172
-
if (IS_ERR(vma)) {
1173
-
ret = PTR_ERR(vma);
1174
-
goto fail;
1175
-
}
1176
-
1177
-
to_msm_bo(obj)->vram_node = &vma->node;
1178
-
1179
-
msm_gem_lock(obj);
1180
-
pages = get_pages(obj);
1181
-
msm_gem_unlock(obj);
1182
-
if (IS_ERR(pages)) {
1183
-
ret = PTR_ERR(pages);
1184
-
goto fail;
1185
-
}
1186
-
1187
-
vma->iova = physaddr(obj);
1188
-
} else {
1189
-
ret = drm_gem_object_init(dev, obj, size);
1190
-
if (ret)
1191
-
goto fail;
1192
-
/*
1193
-
* Our buffers are kept pinned, so allocating them from the
1194
-
* MOVABLE zone is a really bad idea, and conflicts with CMA.
1195
-
* See comments above new_inode() why this is required _and_
1196
-
* expected if you're going to pin these pages.
1197
-
*/
1198
-
mapping_set_gfp_mask(obj->filp->f_mapping, GFP_HIGHUSER);
1199
-
}
1235
+
ret = drm_gem_object_init(dev, obj, size);
1236
+
if (ret)
1237
+
goto fail;
1238
+
/*
1239
+
* Our buffers are kept pinned, so allocating them from the
1240
+
* MOVABLE zone is a really bad idea, and conflicts with CMA.
1241
+
* See comments above new_inode() why this is required _and_
1242
+
* expected if you're going to pin these pages.
1243
+
*/
1244
+
mapping_set_gfp_mask(obj->filp->f_mapping, GFP_HIGHUSER);
1200
1245
1201
1246
drm_gem_lru_move_tail(&priv->lru.unbacked, obj);
1202
1247
···
1195
1296
struct drm_gem_object *obj;
1196
1297
uint32_t size;
1197
1298
int ret, npages;
1198
-
1199
-
/* if we don't have IOMMU, don't bother pretending we can import: */
1200
-
if (!msm_use_mmu(dev)) {
1201
-
DRM_DEV_ERROR(dev->dev, "cannot import without IOMMU\n");
1202
-
return ERR_PTR(-EINVAL);
1203
-
}
1204
1299
1205
1300
size = PAGE_ALIGN(dmabuf->size);
1206
1301
-5
drivers/gpu/drm/msm/msm_gem.h
-5
drivers/gpu/drm/msm/msm_gem.h
···
102
102
103
103
struct list_head vmas; /* list of msm_gem_vma */
104
104
105
-
/* For physically contiguous buffers. Used when we don't have
106
-
* an IOMMU. Also used for stolen/splashscreen buffer.
107
-
*/
108
-
struct drm_mm_node *vram_node;
109
-
110
105
char name[32]; /* Identifier to print for the debugfs files */
111
106
112
107
/* userspace metadata backchannel */
-5
drivers/gpu/drm/msm/msm_gem_submit.c
-5
drivers/gpu/drm/msm/msm_gem_submit.c
···
670
670
if (args->pad)
671
671
return -EINVAL;
672
672
673
-
if (unlikely(!ctx->vm) && !capable(CAP_SYS_RAWIO)) {
674
-
DRM_ERROR_RATELIMITED("IOMMU support or CAP_SYS_RAWIO required!\n");
675
-
return -EPERM;
676
-
}
677
-
678
673
/* for now, we just have 3d pipe.. eventually this would need to
679
674
* be more clever to dispatch to appropriate gpu module:
680
675
*/
+1
-5
drivers/gpu/drm/msm/msm_gpu.c
+1
-5
drivers/gpu/drm/msm/msm_gpu.c
···
942
942
943
943
msm_devfreq_init(gpu);
944
944
945
-
946
945
gpu->vm = gpu->funcs->create_vm(gpu, pdev);
947
-
948
-
if (gpu->vm == NULL)
949
-
DRM_DEV_INFO(drm->dev, "%s: no IOMMU, fallback to VRAM carveout!\n", name);
950
-
else if (IS_ERR(gpu->vm)) {
946
+
if (IS_ERR(gpu->vm)) {
951
947
ret = PTR_ERR(gpu->vm);
952
948
goto fail;
953
949
}