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Merge tag 'linux-watchdog-6.14-rc1' of git://www.linux-watchdog.org/linux-watchdog

Pull watchdog updates from Wim Van Sebroeck:

- Add Qualcomm IPQ5424 DT binding

- da9052_wdt: add support for bootstatus bits

- Other small fixes and improvements

* tag 'linux-watchdog-6.14-rc1' of git://www.linux-watchdog.org/linux-watchdog:
dt-bindings: watchdog: Document Qualcomm IPQ5424
watchdog: rti_wdt: Fix an OF node leak in rti_wdt_probe()
watchdog: max77620: fix excess field in kerneldoc
watchdog: sp805_wdt: Drop documentation of non-existent `status` member
watchdog: rzv2h_wdt: Use local `dev` pointer in probe
watchdog: da9052_wdt: add support for bootstatus bits
watchdog: sp805: Report correct timeleft at maximum
watchdog: rti: Fix off-by-one in heartbeat recovery

+25 -13
+1
Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml
··· 20 20 - qcom,kpss-wdt-ipq4019 21 21 - qcom,apss-wdt-ipq5018 22 22 - qcom,apss-wdt-ipq5332 23 + - qcom,apss-wdt-ipq5424 23 24 - qcom,apss-wdt-ipq9574 24 25 - qcom,apss-wdt-msm8226 25 26 - qcom,apss-wdt-msm8974
+12 -1
drivers/watchdog/da9052_wdt.c
··· 135 135 } 136 136 137 137 static const struct watchdog_info da9052_wdt_info = { 138 - .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, 138 + .options = WDIOF_SETTIMEOUT | 139 + WDIOF_KEEPALIVEPING | 140 + WDIOF_CARDRESET | 141 + WDIOF_OVERHEAT | 142 + WDIOF_POWERUNDER, 139 143 .identity = "DA9052 Watchdog", 140 144 }; 141 145 ··· 172 168 da9052_wdt->ops = &da9052_wdt_ops; 173 169 da9052_wdt->parent = dev; 174 170 watchdog_set_drvdata(da9052_wdt, driver_data); 171 + 172 + if (da9052->fault_log & DA9052_FAULTLOG_TWDERROR) 173 + da9052_wdt->bootstatus |= WDIOF_CARDRESET; 174 + if (da9052->fault_log & DA9052_FAULTLOG_TEMPOVER) 175 + da9052_wdt->bootstatus |= WDIOF_OVERHEAT; 176 + if (da9052->fault_log & DA9052_FAULTLOG_VDDFAULT) 177 + da9052_wdt->bootstatus |= WDIOF_POWERUNDER; 175 178 176 179 ret = da9052_reg_update(da9052, DA9052_CONTROL_D_REG, 177 180 DA9052_CONTROLD_TWDSCALE, 0);
-1
drivers/watchdog/max77620_wdt.c
··· 25 25 26 26 /** 27 27 * struct max77620_variant - Data specific to a chip variant 28 - * @wdt_info: watchdog descriptor 29 28 * @reg_onoff_cnfg2: ONOFF_CNFG2 register offset 30 29 * @reg_cnfg_glbl2: CNFG_GLBL2 register offset 31 30 * @reg_cnfg_glbl3: CNFG_GLBL3 register offset
+3 -1
drivers/watchdog/rti_wdt.c
··· 273 273 274 274 set_bit(WDOG_HW_RUNNING, &wdd->status); 275 275 time_left_ms = rti_wdt_get_timeleft_ms(wdd); 276 - heartbeat_ms = readl(wdt->base + RTIDWDPRLD); 276 + /* AM62x TRM: texp = (RTIDWDPRLD + 1) * (2^13) / RTICLK1 */ 277 + heartbeat_ms = readl(wdt->base + RTIDWDPRLD) + 1; 277 278 heartbeat_ms <<= WDT_PRELOAD_SHIFT; 278 279 heartbeat_ms *= 1000; 279 280 do_div(heartbeat_ms, wdt->freq); ··· 302 301 node = of_parse_phandle(pdev->dev.of_node, "memory-region", 0); 303 302 if (node) { 304 303 ret = of_address_to_resource(node, 0, &res); 304 + of_node_put(node); 305 305 if (ret) { 306 306 dev_err(dev, "No memory address assigned to the region.\n"); 307 307 goto err_iomap;
+8 -8
drivers/watchdog/rzv2h_wdt.c
··· 217 217 if (IS_ERR(priv->base)) 218 218 return PTR_ERR(priv->base); 219 219 220 - priv->pclk = devm_clk_get_prepared(&pdev->dev, "pclk"); 220 + priv->pclk = devm_clk_get_prepared(dev, "pclk"); 221 221 if (IS_ERR(priv->pclk)) 222 - return dev_err_probe(&pdev->dev, PTR_ERR(priv->pclk), "no pclk"); 222 + return dev_err_probe(dev, PTR_ERR(priv->pclk), "no pclk"); 223 223 224 - priv->oscclk = devm_clk_get_prepared(&pdev->dev, "oscclk"); 224 + priv->oscclk = devm_clk_get_prepared(dev, "oscclk"); 225 225 if (IS_ERR(priv->oscclk)) 226 - return dev_err_probe(&pdev->dev, PTR_ERR(priv->oscclk), "no oscclk"); 226 + return dev_err_probe(dev, PTR_ERR(priv->oscclk), "no oscclk"); 227 227 228 - priv->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL); 228 + priv->rstc = devm_reset_control_get_exclusive(dev, NULL); 229 229 if (IS_ERR(priv->rstc)) 230 - return dev_err_probe(&pdev->dev, PTR_ERR(priv->rstc), 230 + return dev_err_probe(dev, PTR_ERR(priv->rstc), 231 231 "failed to get cpg reset"); 232 232 233 233 priv->wdev.max_hw_heartbeat_ms = (MILLI * MAX_TIMEOUT_CYCLES * CLOCK_DIV_BY_256) / 234 234 clk_get_rate(priv->oscclk); 235 235 dev_dbg(dev, "max hw timeout of %dms\n", priv->wdev.max_hw_heartbeat_ms); 236 236 237 - ret = devm_pm_runtime_enable(&pdev->dev); 237 + ret = devm_pm_runtime_enable(dev); 238 238 if (ret) 239 239 return ret; 240 240 ··· 251 251 if (ret) 252 252 dev_warn(dev, "Specified timeout invalid, using default"); 253 253 254 - return devm_watchdog_register_device(&pdev->dev, &priv->wdev); 254 + return devm_watchdog_register_device(dev, &priv->wdev); 255 255 } 256 256 257 257 static const struct of_device_id rzv2h_wdt_ids[] = {
+1 -2
drivers/watchdog/sp805_wdt.c
··· 62 62 * @clk: (optional) clock structure of wdt 63 63 * @rate: (optional) clock rate when provided via properties 64 64 * @adev: amba device structure of wdt 65 - * @status: current status of wdt 66 65 * @load_val: load value to be set for current timeout 67 66 */ 68 67 struct sp805_wdt { ··· 127 128 128 129 /*If the interrupt is inactive then time left is WDTValue + WDTLoad. */ 129 130 if (!(readl_relaxed(wdt->base + WDTRIS) & INT_MASK)) 130 - load += wdt->load_val + 1; 131 + load += (u64)wdt->load_val + 1; 131 132 spin_unlock(&wdt->lock); 132 133 133 134 return div_u64(load, wdt->rate);