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phy: ti: phy-da8xx-usb: Add runtime PM support

Runtime PM is not supported while USB PHY can be turned off from
register accesses.

Add runtime PM for the USB2.0 PHY. The PHY is entirely shut down to save
as much power as possible. This means that gadgets will not be discovered
once suspend state is entered, and suspend state can not be left without
an explicit user intervention (through sysfs). That's why runtime PM is
disabled by default.

Signed-off-by: Bastien Curutchet <bastien.curutchet@bootlin.com>
Link: https://lore.kernel.org/r/20240528102026.40136-2-bastien.curutchet@bootlin.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Bastien Curutchet and committed by
Greg Kroah-Hartman ee8e41b5 876483a5

+49
+49
drivers/phy/ti/phy-da8xx-usb.c
··· 14 14 #include <linux/phy/phy.h> 15 15 #include <linux/platform_data/phy-da8xx-usb.h> 16 16 #include <linux/platform_device.h> 17 + #include <linux/pm_runtime.h> 17 18 #include <linux/regmap.h> 18 19 19 20 #define PHY_INIT_BITS (CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN) 20 21 21 22 struct da8xx_usb_phy { 23 + struct device *dev; 22 24 struct phy_provider *phy_provider; 23 25 struct phy *usb11_phy; 24 26 struct phy *usb20_phy; ··· 41 39 regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_USB1SUSPENDM, 42 40 CFGCHIP2_USB1SUSPENDM); 43 41 42 + /* 43 + * USB1.1 can used USB2.0 output clock as reference clock so this is here to prevent USB2.0 44 + * from shutting PHY's power when USB1.1 might use it 45 + */ 46 + pm_runtime_get_sync(d_phy->dev); 47 + 44 48 return 0; 45 49 } 46 50 ··· 57 49 regmap_write_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_USB1SUSPENDM, 0); 58 50 59 51 clk_disable_unprepare(d_phy->usb11_clk); 52 + pm_runtime_put_sync(d_phy->dev); 60 53 61 54 return 0; 62 55 } ··· 127 118 .owner = THIS_MODULE, 128 119 }; 129 120 121 + static int __maybe_unused da8xx_runtime_suspend(struct device *dev) 122 + { 123 + struct da8xx_usb_phy *d_phy = dev_get_drvdata(dev); 124 + 125 + dev_dbg(dev, "Suspending ...\n"); 126 + 127 + regmap_set_bits(d_phy->regmap, CFGCHIP(2), CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN); 128 + 129 + return 0; 130 + } 131 + 132 + static int __maybe_unused da8xx_runtime_resume(struct device *dev) 133 + { 134 + u32 mask = CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | CFGCHIP2_PHY_PLLON; 135 + struct da8xx_usb_phy *d_phy = dev_get_drvdata(dev); 136 + u32 pll_status; 137 + 138 + regmap_update_bits(d_phy->regmap, CFGCHIP(2), mask, CFGCHIP2_PHY_PLLON); 139 + 140 + dev_dbg(dev, "Resuming ...\n"); 141 + 142 + return regmap_read_poll_timeout(d_phy->regmap, CFGCHIP(2), pll_status, 143 + pll_status & CFGCHIP2_PHYCLKGD, 1000, 500000); 144 + } 145 + 146 + static const struct dev_pm_ops da8xx_usb_phy_pm_ops = { 147 + SET_RUNTIME_PM_OPS(da8xx_runtime_suspend, da8xx_runtime_resume, NULL) 148 + }; 149 + 130 150 static struct phy *da8xx_usb_phy_of_xlate(struct device *dev, 131 151 const struct of_phandle_args *args) 132 152 { ··· 184 146 d_phy = devm_kzalloc(dev, sizeof(*d_phy), GFP_KERNEL); 185 147 if (!d_phy) 186 148 return -ENOMEM; 149 + 150 + d_phy->dev = dev; 187 151 188 152 if (pdata) 189 153 d_phy->regmap = pdata->cfgchip; ··· 248 208 regmap_write_bits(d_phy->regmap, CFGCHIP(2), 249 209 PHY_INIT_BITS, PHY_INIT_BITS); 250 210 211 + pm_runtime_set_active(dev); 212 + devm_pm_runtime_enable(dev); 213 + /* 214 + * Prevent runtime pm from being ON by default. Users can enable 215 + * it using power/control in sysfs. 216 + */ 217 + pm_runtime_forbid(dev); 218 + 251 219 return 0; 252 220 } 253 221 ··· 280 232 .remove_new = da8xx_usb_phy_remove, 281 233 .driver = { 282 234 .name = "da8xx-usb-phy", 235 + .pm = &da8xx_usb_phy_pm_ops, 283 236 .of_match_table = da8xx_usb_phy_ids, 284 237 }, 285 238 };