tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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ARM: dts: suniv: add USB-related device nodes

The suniv SoC has a USB OTG controller and a USB PHY like other
Allwinner SoCs.

Add their device tree node.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/20230319212936.26649-2-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>

authored by

Icenowy Zheng and committed by
Jernej Skrabec f23ba46e fce449f5

+26
+26
arch/arm/boot/dts/suniv-f1c100s.dtsi
··· 133 133 #size-cells = <0>; 134 134 }; 135 135 136 + usb_otg: usb@1c13000 { 137 + compatible = "allwinner,suniv-f1c100s-musb"; 138 + reg = <0x01c13000 0x0400>; 139 + clocks = <&ccu CLK_BUS_OTG>; 140 + resets = <&ccu RST_BUS_OTG>; 141 + interrupts = <26>; 142 + interrupt-names = "mc"; 143 + phys = <&usbphy 0>; 144 + phy-names = "usb"; 145 + extcon = <&usbphy 0>; 146 + allwinner,sram = <&otg_sram 1>; 147 + status = "disabled"; 148 + }; 149 + 150 + usbphy: phy@1c13400 { 151 + compatible = "allwinner,suniv-f1c100s-usb-phy"; 152 + reg = <0x01c13400 0x10>; 153 + reg-names = "phy_ctrl"; 154 + clocks = <&ccu CLK_USB_PHY0>; 155 + clock-names = "usb0_phy"; 156 + resets = <&ccu RST_USB_PHY0>; 157 + reset-names = "usb0_reset"; 158 + #phy-cells = <1>; 159 + status = "disabled"; 160 + }; 161 + 136 162 ccu: clock@1c20000 { 137 163 compatible = "allwinner,suniv-f1c100s-ccu"; 138 164 reg = <0x01c20000 0x400>;