Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk fix from Stephen Boyd:
"One fix for Samsung Exynos524x SoCs where recent IOMMU patches have
caused some of these clocks to turn off when they were always left on
before"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
clk/samsung: exynos542x: mark some clocks as critical

+7 -7
+7 -7
drivers/clk/samsung/clk-exynos5420.c
··· 586 586 GATE(CLK_ACLK550_CAM, "aclk550_cam", "mout_user_aclk550_cam", 587 587 GATE_BUS_TOP, 24, 0, 0), 588 588 GATE(CLK_ACLK432_SCALER, "aclk432_scaler", "mout_user_aclk432_scaler", 589 - GATE_BUS_TOP, 27, 0, 0), 589 + GATE_BUS_TOP, 27, CLK_IS_CRITICAL, 0), 590 590 }; 591 591 592 592 static const struct samsung_mux_clock exynos5420_mux_clks[] __initconst = { ··· 956 956 GATE(CLK_SMMU_G2D, "smmu_g2d", "aclk333_g2d", GATE_IP_G2D, 7, 0, 0), 957 957 958 958 GATE(0, "aclk200_fsys", "mout_user_aclk200_fsys", 959 - GATE_BUS_FSYS0, 9, CLK_IGNORE_UNUSED, 0), 959 + GATE_BUS_FSYS0, 9, CLK_IS_CRITICAL, 0), 960 960 GATE(0, "aclk200_fsys2", "mout_user_aclk200_fsys2", 961 961 GATE_BUS_FSYS0, 10, CLK_IGNORE_UNUSED, 0), 962 962 963 963 GATE(0, "aclk333_g2d", "mout_user_aclk333_g2d", 964 964 GATE_BUS_TOP, 0, CLK_IGNORE_UNUSED, 0), 965 965 GATE(0, "aclk266_g2d", "mout_user_aclk266_g2d", 966 - GATE_BUS_TOP, 1, CLK_IGNORE_UNUSED, 0), 966 + GATE_BUS_TOP, 1, CLK_IS_CRITICAL, 0), 967 967 GATE(0, "aclk300_jpeg", "mout_user_aclk300_jpeg", 968 968 GATE_BUS_TOP, 4, CLK_IGNORE_UNUSED, 0), 969 969 GATE(0, "aclk333_432_isp0", "mout_user_aclk333_432_isp0", 970 970 GATE_BUS_TOP, 5, 0, 0), 971 971 GATE(0, "aclk300_gscl", "mout_user_aclk300_gscl", 972 - GATE_BUS_TOP, 6, CLK_IGNORE_UNUSED, 0), 972 + GATE_BUS_TOP, 6, CLK_IS_CRITICAL, 0), 973 973 GATE(0, "aclk333_432_gscl", "mout_user_aclk333_432_gscl", 974 974 GATE_BUS_TOP, 7, CLK_IGNORE_UNUSED, 0), 975 975 GATE(0, "aclk333_432_isp", "mout_user_aclk333_432_isp", ··· 983 983 GATE(0, "aclk166", "mout_user_aclk166", 984 984 GATE_BUS_TOP, 14, CLK_IGNORE_UNUSED, 0), 985 985 GATE(CLK_ACLK333, "aclk333", "mout_user_aclk333", 986 - GATE_BUS_TOP, 15, CLK_IGNORE_UNUSED, 0), 986 + GATE_BUS_TOP, 15, CLK_IS_CRITICAL, 0), 987 987 GATE(0, "aclk400_isp", "mout_user_aclk400_isp", 988 988 GATE_BUS_TOP, 16, 0, 0), 989 989 GATE(0, "aclk400_mscl", "mout_user_aclk400_mscl", 990 990 GATE_BUS_TOP, 17, 0, 0), 991 991 GATE(0, "aclk200_disp1", "mout_user_aclk200_disp1", 992 - GATE_BUS_TOP, 18, 0, 0), 992 + GATE_BUS_TOP, 18, CLK_IS_CRITICAL, 0), 993 993 GATE(CLK_SCLK_MPHY_IXTAL24, "sclk_mphy_ixtal24", "mphy_refclk_ixtal24", 994 994 GATE_BUS_TOP, 28, 0, 0), 995 995 GATE(CLK_SCLK_HSIC_12M, "sclk_hsic_12m", "ff_hsic_12m", 996 996 GATE_BUS_TOP, 29, 0, 0), 997 997 998 998 GATE(0, "aclk300_disp1", "mout_user_aclk300_disp1", 999 - SRC_MASK_TOP2, 24, 0, 0), 999 + SRC_MASK_TOP2, 24, CLK_IS_CRITICAL, 0), 1000 1000 1001 1001 GATE(CLK_MAU_EPLL, "mau_epll", "mout_mau_epll_clk", 1002 1002 SRC_MASK_TOP7, 20, 0, 0),