tjh.dev / kernel
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mtd: rawnand: stm32_fmc2: get resources from parent node

FMC2 EBI support has been added. Common resources (registers base
address and clock) can now be shared between the 2 drivers using
"st,stm32mp1-fmc2-nfc" compatible string. It means that the
common resources should now be found in the parent device when EBI
node is available.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/1591975362-22009-7-git-send-email-christophe.kerello@st.com

authored by

Christophe Kerello and committed by
Miquel Raynal fbd9b543 51c88a8d

+51 -23
+1 -2
drivers/mtd/nand/raw/Kconfig
··· 415 415 config MTD_NAND_STM32_FMC2 416 416 tristate "Support for NAND controller on STM32MP SoCs" 417 417 depends on MACH_STM32MP157 || COMPILE_TEST 418 - select REGMAP 419 - select REGMAP_MMIO 418 + select MFD_SYSCON 420 419 help 421 420 Enables support for NAND Flash chips on SoCs containing the FMC2 422 421 NAND controller. This controller is found on STM32MP SoCs.
+50 -21
drivers/mtd/nand/raw/stm32_fmc2_nand.c
··· 11 11 #include <linux/errno.h> 12 12 #include <linux/interrupt.h> 13 13 #include <linux/iopoll.h> 14 + #include <linux/mfd/syscon.h> 14 15 #include <linux/module.h> 15 16 #include <linux/mtd/rawnand.h> 17 + #include <linux/of_address.h> 16 18 #include <linux/pinctrl/consumer.h> 17 19 #include <linux/platform_device.h> 18 20 #include <linux/regmap.h> ··· 206 204 #define FMC2_BCHDSR4_EBP7 GENMASK(12, 0) 207 205 #define FMC2_BCHDSR4_EBP8 GENMASK(28, 16) 208 206 209 - /* Regmap registers configuration */ 210 - #define FMC2_MAX_REGISTER 0x3fc 211 - 212 - static const struct regmap_config stm32_fmc2_regmap_cfg = { 213 - .reg_bits = 32, 214 - .val_bits = 32, 215 - .reg_stride = sizeof(u32), 216 - .max_register = FMC2_MAX_REGISTER, 217 - }; 218 - 219 207 enum stm32_fmc2_ecc { 220 208 FMC2_ECC_HAM = 1, 221 209 FMC2_ECC_BCH4 = 4, ··· 245 253 struct nand_controller base; 246 254 struct stm32_fmc2_nand nand; 247 255 struct device *dev; 256 + struct device *cdev; 248 257 struct regmap *regmap; 249 258 void __iomem *data_base[FMC2_MAX_CE]; 250 259 void __iomem *cmd_base[FMC2_MAX_CE]; ··· 1377 1384 pcr |= FIELD_PREP(FMC2_PCR_TAR, FMC2_PCR_TAR_DEFAULT); 1378 1385 1379 1386 /* Enable FMC2 controller */ 1380 - regmap_update_bits(nfc->regmap, FMC2_BCR1, 1381 - FMC2_BCR1_FMC2EN, FMC2_BCR1_FMC2EN); 1387 + if (nfc->dev == nfc->cdev) 1388 + regmap_update_bits(nfc->regmap, FMC2_BCR1, 1389 + FMC2_BCR1_FMC2EN, FMC2_BCR1_FMC2EN); 1382 1390 1383 1391 regmap_write(nfc->regmap, FMC2_PCR, pcr); 1384 1392 regmap_write(nfc->regmap, FMC2_PMEM, FMC2_PMEM_DEFAULT); ··· 1809 1815 return ret; 1810 1816 } 1811 1817 1818 + static int stm32_fmc2_nfc_set_cdev(struct stm32_fmc2_nfc *nfc) 1819 + { 1820 + struct device *dev = nfc->dev; 1821 + bool ebi_found = false; 1822 + 1823 + if (dev->parent && of_device_is_compatible(dev->parent->of_node, 1824 + "st,stm32mp1-fmc2-ebi")) 1825 + ebi_found = true; 1826 + 1827 + if (of_device_is_compatible(dev->of_node, "st,stm32mp1-fmc2-nfc")) { 1828 + if (ebi_found) { 1829 + nfc->cdev = dev->parent; 1830 + 1831 + return 0; 1832 + } 1833 + 1834 + return -EINVAL; 1835 + } 1836 + 1837 + if (ebi_found) 1838 + return -EINVAL; 1839 + 1840 + nfc->cdev = dev; 1841 + 1842 + return 0; 1843 + } 1844 + 1812 1845 static int stm32_fmc2_nfc_probe(struct platform_device *pdev) 1813 1846 { 1814 1847 struct device *dev = &pdev->dev; ··· 1845 1824 struct resource *res; 1846 1825 struct mtd_info *mtd; 1847 1826 struct nand_chip *chip; 1848 - void __iomem *mmio; 1827 + struct resource cres; 1849 1828 int chip_cs, mem_region, ret, irq; 1829 + int start_region = 0; 1850 1830 1851 1831 nfc = devm_kzalloc(dev, sizeof(*nfc), GFP_KERNEL); 1852 1832 if (!nfc) ··· 1857 1835 nand_controller_init(&nfc->base); 1858 1836 nfc->base.ops = &stm32_fmc2_nfc_controller_ops; 1859 1837 1838 + ret = stm32_fmc2_nfc_set_cdev(nfc); 1839 + if (ret) 1840 + return ret; 1841 + 1860 1842 ret = stm32_fmc2_nfc_parse_dt(nfc); 1861 1843 if (ret) 1862 1844 return ret; 1863 1845 1864 - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1865 - mmio = devm_ioremap_resource(dev, res); 1866 - if (IS_ERR(mmio)) 1867 - return PTR_ERR(mmio); 1846 + ret = of_address_to_resource(nfc->cdev->of_node, 0, &cres); 1847 + if (ret) 1848 + return ret; 1868 1849 1869 - nfc->regmap = devm_regmap_init_mmio(dev, mmio, &stm32_fmc2_regmap_cfg); 1850 + nfc->io_phys_addr = cres.start; 1851 + 1852 + nfc->regmap = device_node_to_regmap(nfc->cdev->of_node); 1870 1853 if (IS_ERR(nfc->regmap)) 1871 1854 return PTR_ERR(nfc->regmap); 1872 1855 1873 - nfc->io_phys_addr = res->start; 1856 + if (nfc->dev == nfc->cdev) 1857 + start_region = 1; 1874 1858 1875 - for (chip_cs = 0, mem_region = 1; chip_cs < FMC2_MAX_CE; 1859 + for (chip_cs = 0, mem_region = start_region; chip_cs < FMC2_MAX_CE; 1876 1860 chip_cs++, mem_region += 3) { 1877 1861 if (!(nfc->cs_assigned & BIT(chip_cs))) 1878 1862 continue; ··· 1916 1888 1917 1889 init_completion(&nfc->complete); 1918 1890 1919 - nfc->clk = devm_clk_get(dev, NULL); 1891 + nfc->clk = devm_clk_get(nfc->cdev, NULL); 1920 1892 if (IS_ERR(nfc->clk)) 1921 1893 return PTR_ERR(nfc->clk); 1922 1894 ··· 2057 2029 2058 2030 static const struct of_device_id stm32_fmc2_nfc_match[] = { 2059 2031 {.compatible = "st,stm32mp15-fmc2"}, 2032 + {.compatible = "st,stm32mp1-fmc2-nfc"}, 2060 2033 {} 2061 2034 }; 2062 2035 MODULE_DEVICE_TABLE(of, stm32_fmc2_nfc_match);