Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes and straggler patches from Olof Johansson:
"A collection of fixes for fall out from 3.10 merge window, some build
fixes and warning cleanups and a small handful of patches that were
small and contained and made sense to still include in 3.10 (some of
these have also been in -next since the merge window opened).
Largest continous series is for OMAP, but there's a handful for other
platforms.
For i.MX, one of the patches are framebuffer fixups due to fallout
during the merge window, and the other removes some stale and broken
code."
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (34 commits)
ARM: exynos: dts: Fixed vbus-gpios
ARM: EXYNOS5: Fix kernel dump in AFTR idle mode
ARM: ux500: Rid ignored return value of regulator_enable() compiler warning
ARM: ux500: read the correct soc_id number
ARM: exynos: dts: cros5250: add cyapa trackpad
video: mxsfb: Adapt to new videomode API
ARM: imx: Select GENERIC_ALLOCATOR
ARM: imx: compile fix for hotplug.c
ARM: dts: don't assume boards are using twl4030 for omap3
ARM: OMAP2+: Remove bogus IS_ERR_OR_NULL checking from id.c
ARM: dts: Configure and fix the McSPI pins for 4430sdp
ARM: dts: AM33XX: Add GPMC node
ARM: dts: OMAP4460: Fix CPU OPP voltages
ARM: dts: OMAP36xx: Fix CPU OPP voltages
ARM: OMAP4+: omap2plus_defconfig: Enable audio via TWL6040 as module
ARM: OMAP2: AM33XX: id: Add support for new AM335x PG2.1 Si
omap: mux: add AM/DM37x gpios
ARM: OMAP1: DMA: fix error handling in omap1_system_dma_init()
ARM: OMAP2+: omap_device: use late_initcall_sync
ARM: OMAP: RX-51: change probe order of touchscreen and panel SPI devices
...
+173
-235
+14
-14
Documentation/devicetree/bindings/mtd/gpmc-nand.txt
+14
-14
Documentation/devicetree/bindings/mtd/gpmc-nand.txt
···
56
56
nand-bus-width = <16>;
57
57
ti,nand-ecc-opt = "bch8";
58
58
59
-
gpmc,sync-clk = <0>;
60
-
gpmc,cs-on = <0>;
61
-
gpmc,cs-rd-off = <44>;
62
-
gpmc,cs-wr-off = <44>;
63
-
gpmc,adv-on = <6>;
64
-
gpmc,adv-rd-off = <34>;
65
-
gpmc,adv-wr-off = <44>;
66
-
gpmc,we-off = <40>;
67
-
gpmc,oe-off = <54>;
68
-
gpmc,access = <64>;
69
-
gpmc,rd-cycle = <82>;
70
-
gpmc,wr-cycle = <82>;
71
-
gpmc,wr-access = <40>;
72
-
gpmc,wr-data-mux-bus = <0>;
59
+
gpmc,sync-clk-ps = <0>;
60
+
gpmc,cs-on-ns = <0>;
61
+
gpmc,cs-rd-off-ns = <44>;
62
+
gpmc,cs-wr-off-ns = <44>;
63
+
gpmc,adv-on-ns = <6>;
64
+
gpmc,adv-rd-off-ns = <34>;
65
+
gpmc,adv-wr-off-ns = <44>;
66
+
gpmc,we-off-ns = <40>;
67
+
gpmc,oe-off-ns = <54>;
68
+
gpmc,access-ns = <64>;
69
+
gpmc,rd-cycle-ns = <82>;
70
+
gpmc,wr-cycle-ns = <82>;
71
+
gpmc,wr-access-ns = <40>;
72
+
gpmc,wr-data-mux-bus-ns = <0>;
73
73
74
74
#address-cells = <1>;
75
75
#size-cells = <1>;
+28
-28
Documentation/devicetree/bindings/net/gpmc-eth.txt
+28
-28
Documentation/devicetree/bindings/net/gpmc-eth.txt
···
26
26
- bank-width: Address width of the device in bytes. GPMC supports 8-bit
27
27
and 16-bit devices and so must be either 1 or 2 bytes.
28
28
- compatible: Compatible string property for the ethernet child device.
29
-
- gpmc,cs-on: Chip-select assertion time
30
-
- gpmc,cs-rd-off: Chip-select de-assertion time for reads
31
-
- gpmc,cs-wr-off: Chip-select de-assertion time for writes
32
-
- gpmc,oe-on: Output-enable assertion time
33
-
- gpmc,oe-off Output-enable de-assertion time
34
-
- gpmc,we-on: Write-enable assertion time
35
-
- gpmc,we-off: Write-enable de-assertion time
36
-
- gpmc,access: Start cycle to first data capture (read access)
37
-
- gpmc,rd-cycle: Total read cycle time
38
-
- gpmc,wr-cycle: Total write cycle time
29
+
- gpmc,cs-on-ns: Chip-select assertion time
30
+
- gpmc,cs-rd-off-ns: Chip-select de-assertion time for reads
31
+
- gpmc,cs-wr-off-ns: Chip-select de-assertion time for writes
32
+
- gpmc,oe-on-ns: Output-enable assertion time
33
+
- gpmc,oe-off-ns: Output-enable de-assertion time
34
+
- gpmc,we-on-ns: Write-enable assertion time
35
+
- gpmc,we-off-ns: Write-enable de-assertion time
36
+
- gpmc,access-ns: Start cycle to first data capture (read access)
37
+
- gpmc,rd-cycle-ns: Total read cycle time
38
+
- gpmc,wr-cycle-ns: Total write cycle time
39
39
- reg: Chip-select, base address (relative to chip-select)
40
40
and size of the memory mapped for the device.
41
41
Note that base address will be typically 0 as this
···
65
65
bank-width = <2>;
66
66
67
67
gpmc,mux-add-data;
68
-
gpmc,cs-on = <0>;
69
-
gpmc,cs-rd-off = <186>;
70
-
gpmc,cs-wr-off = <186>;
71
-
gpmc,adv-on = <12>;
72
-
gpmc,adv-rd-off = <48>;
73
-
gpmc,adv-wr-off = <48>;
74
-
gpmc,oe-on = <54>;
75
-
gpmc,oe-off = <168>;
76
-
gpmc,we-on = <54>;
77
-
gpmc,we-off = <168>;
78
-
gpmc,rd-cycle = <186>;
79
-
gpmc,wr-cycle = <186>;
80
-
gpmc,access = <114>;
81
-
gpmc,page-burst-access = <6>;
82
-
gpmc,bus-turnaround = <12>;
83
-
gpmc,cycle2cycle-delay = <18>;
84
-
gpmc,wr-data-mux-bus = <90>;
85
-
gpmc,wr-access = <186>;
68
+
gpmc,cs-on-ns = <0>;
69
+
gpmc,cs-rd-off-ns = <186>;
70
+
gpmc,cs-wr-off-ns = <186>;
71
+
gpmc,adv-on-ns = <12>;
72
+
gpmc,adv-rd-off-ns = <48>;
73
+
gpmc,adv-wr-off-ns = <48>;
74
+
gpmc,oe-on-ns = <54>;
75
+
gpmc,oe-off-ns = <168>;
76
+
gpmc,we-on-ns = <54>;
77
+
gpmc,we-off-ns = <168>;
78
+
gpmc,rd-cycle-ns = <186>;
79
+
gpmc,wr-cycle-ns = <186>;
80
+
gpmc,access-ns = <114>;
81
+
gpmc,page-burst-access-ns = <6>;
82
+
gpmc,bus-turnaround-ns = <12>;
83
+
gpmc,cycle2cycle-delay-ns = <18>;
84
+
gpmc,wr-data-mux-bus-ns = <90>;
85
+
gpmc,wr-access-ns = <186>;
86
86
gpmc,cycle2cycle-samecsen;
87
87
gpmc,cycle2cycle-diffcsen;
88
88
-1
arch/arm/Kconfig
-1
arch/arm/Kconfig
+12
arch/arm/boot/dts/am33xx.dtsi
+12
arch/arm/boot/dts/am33xx.dtsi
···
403
403
0x44d80000 0x2000>; /* M3 DMEM */
404
404
ti,hwmods = "wkup_m3";
405
405
};
406
+
407
+
gpmc: gpmc@50000000 {
408
+
compatible = "ti,am3352-gpmc";
409
+
ti,hwmods = "gpmc";
410
+
reg = <0x50000000 0x2000>;
411
+
interrupts = <100>;
412
+
num-cs = <7>;
413
+
num-waitpins = <2>;
414
+
#address-cells = <2>;
415
+
#size-cells = <1>;
416
+
status = "disabled";
417
+
};
406
418
};
407
419
};
+8
arch/arm/boot/dts/cros5250-common.dtsi
+8
arch/arm/boot/dts/cros5250-common.dtsi
···
175
175
i2c@12C70000 {
176
176
samsung,i2c-sda-delay = <100>;
177
177
samsung,i2c-max-bus-freq = <378000>;
178
+
179
+
trackpad {
180
+
reg = <0x67>;
181
+
compatible = "cypress,cyapa";
182
+
interrupts = <2 0>;
183
+
interrupt-parent = <&gpx1>;
184
+
wakeup-source;
185
+
};
178
186
};
179
187
180
188
i2c@12C80000 {
+1
-1
arch/arm/boot/dts/exynos5250-smdk5250.dts
+1
-1
arch/arm/boot/dts/exynos5250-smdk5250.dts
+1
-1
arch/arm/boot/dts/exynos5250-snow.dts
+1
-1
arch/arm/boot/dts/exynos5250-snow.dts
+1
arch/arm/boot/dts/omap3-beagle-xm.dts
+1
arch/arm/boot/dts/omap3-beagle-xm.dts
+1
arch/arm/boot/dts/omap3-evm.dts
+1
arch/arm/boot/dts/omap3-evm.dts
+1
arch/arm/boot/dts/omap3-overo.dtsi
+1
arch/arm/boot/dts/omap3-overo.dtsi
-1
arch/arm/boot/dts/omap3.dtsi
-1
arch/arm/boot/dts/omap3.dtsi
+3
-3
arch/arm/boot/dts/omap36xx.dtsi
+3
-3
arch/arm/boot/dts/omap36xx.dtsi
+13
-1
arch/arm/boot/dts/omap4-sdp.dts
+13
-1
arch/arm/boot/dts/omap4-sdp.dts
···
223
223
>;
224
224
};
225
225
226
+
mcspi1_pins: pinmux_mcspi1_pins {
227
+
pinctrl-single,pins = <
228
+
0xf2 0x100 /* mcspi1_clk.mcspi1_clk INPUT | MODE0 */
229
+
0xf4 0x100 /* mcspi1_somi.mcspi1_somi INPUT | MODE0 */
230
+
0xf6 0x100 /* mcspi1_simo.mcspi1_simo INPUT | MODE0 */
231
+
0xf8 0x100 /* mcspi1_cs0.mcspi1_cs0 INPUT | MODE0*/
232
+
>;
233
+
};
234
+
226
235
dss_hdmi_pins: pinmux_dss_hdmi_pins {
227
236
pinctrl-single,pins = <
228
237
0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
···
367
358
};
368
359
369
360
&mcspi1 {
361
+
pinctrl-names = "default";
362
+
pinctrl-0 = <&mcspi1_pins>;
363
+
370
364
eth@0 {
371
365
compatible = "ks8851";
372
366
spi-max-frequency = <24000000>;
373
367
reg = <0>;
374
368
interrupt-parent = <&gpio2>;
375
-
interrupts = <2>; /* gpio line 34 */
369
+
interrupts = <2 8>; /* gpio line 34, low triggered */
376
370
vdd-supply = <&vdd_eth>;
377
371
};
378
372
};
+1
-1
arch/arm/boot/dts/omap4-var-som.dts
+1
-1
arch/arm/boot/dts/omap4-var-som.dts
+3
-3
arch/arm/boot/dts/omap4460.dtsi
+3
-3
arch/arm/boot/dts/omap4460.dtsi
+4
arch/arm/configs/omap2plus_defconfig
+4
arch/arm/configs/omap2plus_defconfig
···
137
137
CONFIG_SERIAL_8250_RSA=y
138
138
CONFIG_SERIAL_AMBA_PL011=y
139
139
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
140
+
CONFIG_SERIAL_OMAP=y
141
+
CONFIG_SERIAL_OMAP_CONSOLE=y
140
142
CONFIG_HW_RANDOM=y
141
143
CONFIG_I2C_CHARDEV=y
142
144
CONFIG_SPI=y
···
155
153
CONFIG_TWL4030_WATCHDOG=y
156
154
CONFIG_MFD_TPS65217=y
157
155
CONFIG_MFD_TPS65910=y
156
+
CONFIG_TWL6040_CORE=y
158
157
CONFIG_REGULATOR_TWL4030=y
159
158
CONFIG_REGULATOR_TPS65023=y
160
159
CONFIG_REGULATOR_TPS6507X=y
···
198
195
CONFIG_SND_SOC=m
199
196
CONFIG_SND_OMAP_SOC=m
200
197
CONFIG_SND_OMAP_SOC_OMAP_TWL4030=m
198
+
CONFIG_SND_OMAP_SOC_OMAP_ABE_TWL6040=m
201
199
CONFIG_SND_OMAP_SOC_OMAP3_PANDORA=m
202
200
CONFIG_USB=y
203
201
CONFIG_USB_DEBUG=y
+7
arch/arm/kernel/devtree.c
+7
arch/arm/kernel/devtree.c
···
180
180
unsigned long dt_root;
181
181
const char *model;
182
182
183
+
#ifdef CONFIG_ARCH_MULTIPLATFORM
184
+
DT_MACHINE_START(GENERIC_DT, "Generic DT based system")
185
+
MACHINE_END
186
+
187
+
mdesc_best = (struct machine_desc *)&__mach_desc_GENERIC_DT;
188
+
#endif
189
+
183
190
if (!dt_phys)
184
191
return NULL;
185
192
+12
-1
arch/arm/kernel/setup.c
+12
-1
arch/arm/kernel/setup.c
···
18
18
#include <linux/bootmem.h>
19
19
#include <linux/seq_file.h>
20
20
#include <linux/screen_info.h>
21
+
#include <linux/of_platform.h>
21
22
#include <linux/init.h>
22
23
#include <linux/kexec.h>
23
24
#include <linux/of_fdt.h>
···
660
659
661
660
static int __init customize_machine(void)
662
661
{
663
-
/* customizes platform devices, or adds new ones */
662
+
/*
663
+
* customizes platform devices, or adds new ones
664
+
* On DT based machines, we fall back to populating the
665
+
* machine from the device tree, if no callback is provided,
666
+
* otherwise we would always need an init_machine callback.
667
+
*/
664
668
if (machine_desc->init_machine)
665
669
machine_desc->init_machine();
670
+
#ifdef CONFIG_OF
671
+
else
672
+
of_platform_populate(NULL, of_default_bus_match_table,
673
+
NULL, NULL);
674
+
#endif
666
675
return 0;
667
676
}
668
677
arch_initcall(customize_machine);
+1
arch/arm/mach-exynos/include/mach/regs-pmu.h
+1
arch/arm/mach-exynos/include/mach/regs-pmu.h
···
344
344
#define EXYNOS5_FSYS_ARM_OPTION S5P_PMUREG(0x2208)
345
345
#define EXYNOS5_ISP_ARM_OPTION S5P_PMUREG(0x2288)
346
346
#define EXYNOS5_ARM_COMMON_OPTION S5P_PMUREG(0x2408)
347
+
#define EXYNOS5_ARM_L2_OPTION S5P_PMUREG(0x2608)
347
348
#define EXYNOS5_TOP_PWR_OPTION S5P_PMUREG(0x2C48)
348
349
#define EXYNOS5_TOP_PWR_SYSMEM_OPTION S5P_PMUREG(0x2CC8)
349
350
#define EXYNOS5_JPEG_MEM_OPTION S5P_PMUREG(0x2F48)
+2
-3
arch/arm/mach-exynos/pmu.c
+2
-3
arch/arm/mach-exynos/pmu.c
···
228
228
{ EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
229
229
{ EXYNOS5_ARM_COMMON_SYS_PWR_REG, { 0x0, 0x0, 0x2} },
230
230
{ EXYNOS5_ARM_L2_SYS_PWR_REG, { 0x3, 0x3, 0x3} },
231
+
{ EXYNOS5_ARM_L2_OPTION, { 0x10, 0x10, 0x0 } },
231
232
{ EXYNOS5_CMU_ACLKSTOP_SYS_PWR_REG, { 0x1, 0x0, 0x1} },
232
233
{ EXYNOS5_CMU_SCLKSTOP_SYS_PWR_REG, { 0x1, 0x0, 0x1} },
233
234
{ EXYNOS5_CMU_RESET_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
···
354
353
355
354
/*
356
355
* SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable
357
-
* MANUAL_L2RSTDISABLE_CONTROL_BITFIELD Enable
358
356
*/
359
357
tmp = __raw_readl(EXYNOS5_ARM_COMMON_OPTION);
360
-
tmp |= (EXYNOS5_MANUAL_L2RSTDISABLE_CONTROL |
361
-
EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN);
358
+
tmp |= EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN;
362
359
__raw_writel(tmp, EXYNOS5_ARM_COMMON_OPTION);
363
360
364
361
/*
+1
-4
arch/arm/mach-imx/Kconfig
+1
-4
arch/arm/mach-imx/Kconfig
···
5
5
select AUTO_ZRELADDR if !ZBOOT_ROM
6
6
select CLKDEV_LOOKUP
7
7
select CLKSRC_MMIO
8
+
select GENERIC_ALLOCATOR
8
9
select GENERIC_CLOCKEVENTS
9
10
select GENERIC_IRQ_CHIP
10
11
select MULTI_IRQ_HANDLER
···
61
60
62
61
config ARCH_HAS_RNGA
63
62
bool
64
-
65
-
config IRAM_ALLOC
66
-
bool
67
-
select GENERIC_ALLOCATOR
68
63
69
64
config HAVE_IMX_ANATOP
70
65
bool
-1
arch/arm/mach-imx/Makefile
-1
arch/arm/mach-imx/Makefile
+1
arch/arm/mach-imx/common.h
+1
arch/arm/mach-imx/common.h
+1
-1
arch/arm/mach-imx/headsmp.S
+1
-1
arch/arm/mach-imx/headsmp.S
+2
arch/arm/mach-imx/hotplug.c
+2
arch/arm/mach-imx/hotplug.c
-73
arch/arm/mach-imx/iram_alloc.c
-73
arch/arm/mach-imx/iram_alloc.c
···
1
-
/*
2
-
* Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3
-
*
4
-
* This program is free software; you can redistribute it and/or
5
-
* modify it under the terms of the GNU General Public License
6
-
* as published by the Free Software Foundation; either version 2
7
-
* of the License, or (at your option) any later version.
8
-
*
9
-
* This program is distributed in the hope that it will be useful,
10
-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
11
-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12
-
* GNU General Public License for more details.
13
-
*
14
-
* You should have received a copy of the GNU General Public License
15
-
* along with this program; if not, write to the Free Software
16
-
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17
-
* MA 02110-1301, USA.
18
-
*/
19
-
20
-
#include <linux/kernel.h>
21
-
#include <linux/io.h>
22
-
#include <linux/module.h>
23
-
#include <linux/spinlock.h>
24
-
#include <linux/genalloc.h>
25
-
#include "linux/platform_data/imx-iram.h"
26
-
27
-
static unsigned long iram_phys_base;
28
-
static void __iomem *iram_virt_base;
29
-
static struct gen_pool *iram_pool;
30
-
31
-
static inline void __iomem *iram_phys_to_virt(unsigned long p)
32
-
{
33
-
return iram_virt_base + (p - iram_phys_base);
34
-
}
35
-
36
-
void __iomem *iram_alloc(unsigned int size, unsigned long *dma_addr)
37
-
{
38
-
if (!iram_pool)
39
-
return NULL;
40
-
41
-
*dma_addr = gen_pool_alloc(iram_pool, size);
42
-
pr_debug("iram alloc - %dB@0x%lX\n", size, *dma_addr);
43
-
if (!*dma_addr)
44
-
return NULL;
45
-
return iram_phys_to_virt(*dma_addr);
46
-
}
47
-
EXPORT_SYMBOL(iram_alloc);
48
-
49
-
void iram_free(unsigned long addr, unsigned int size)
50
-
{
51
-
if (!iram_pool)
52
-
return;
53
-
54
-
gen_pool_free(iram_pool, addr, size);
55
-
}
56
-
EXPORT_SYMBOL(iram_free);
57
-
58
-
int __init iram_init(unsigned long base, unsigned long size)
59
-
{
60
-
iram_phys_base = base;
61
-
62
-
iram_pool = gen_pool_create(PAGE_SHIFT, -1);
63
-
if (!iram_pool)
64
-
return -ENOMEM;
65
-
66
-
gen_pool_add(iram_pool, base, size, -1);
67
-
iram_virt_base = ioremap(iram_phys_base, size);
68
-
if (!iram_virt_base)
69
-
return -EIO;
70
-
71
-
pr_debug("i.MX IRAM pool: %ld KB@0x%p\n", size / 1024, iram_virt_base);
72
-
return 0;
73
-
}
+4
-4
arch/arm/mach-omap1/dma.c
+4
-4
arch/arm/mach-omap1/dma.c
···
301
301
if (ret) {
302
302
dev_err(&pdev->dev, "%s: Unable to add resources for %s%d\n",
303
303
__func__, pdev->name, pdev->id);
304
-
goto exit_device_put;
304
+
goto exit_iounmap;
305
305
}
306
306
307
307
p = kzalloc(sizeof(struct omap_system_dma_plat_info), GFP_KERNEL);
···
309
309
dev_err(&pdev->dev, "%s: Unable to allocate 'p' for %s\n",
310
310
__func__, pdev->name);
311
311
ret = -ENOMEM;
312
-
goto exit_device_del;
312
+
goto exit_iounmap;
313
313
}
314
314
315
315
d = kzalloc(sizeof(struct omap_dma_dev_attr), GFP_KERNEL);
···
402
402
kfree(d);
403
403
exit_release_p:
404
404
kfree(p);
405
-
exit_device_del:
406
-
platform_device_del(pdev);
405
+
exit_iounmap:
406
+
iounmap(dma_base);
407
407
exit_device_put:
408
408
platform_device_put(pdev);
409
409
-2
arch/arm/mach-omap2/Kconfig
-2
arch/arm/mach-omap2/Kconfig
+4
-4
arch/arm/mach-omap2/Makefile
+4
-4
arch/arm/mach-omap2/Makefile
···
32
32
33
33
# SMP support ONLY available for OMAP4
34
34
35
-
obj-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o
36
-
obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o
35
+
smp-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o
36
+
smp-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o
37
37
omap-4-5-common = omap4-common.o omap-wakeupgen.o \
38
38
sleep44xx.o
39
-
obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-common)
40
-
obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-common)
39
+
obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-common) $(smp-y)
40
+
obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-common) $(smp-y)
41
41
42
42
plus_sec := $(call as-instr,.arch_extension sec,+sec)
43
43
AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a$(plus_sec)
+3
-3
arch/arm/mach-omap2/board-omap3beagle.c
+3
-3
arch/arm/mach-omap2/board-omap3beagle.c
···
112
112
*/
113
113
static struct {
114
114
int mmc1_gpio_wp;
115
-
int usb_pwr_level;
115
+
bool usb_pwr_level; /* 0 - Active Low, 1 - Active High */
116
116
int dvi_pd_gpio;
117
117
int usr_button_gpio;
118
118
int mmc_caps;
119
119
} beagle_config = {
120
120
.mmc1_gpio_wp = -EINVAL,
121
-
.usb_pwr_level = GPIOF_OUT_INIT_LOW,
121
+
.usb_pwr_level = 0,
122
122
.dvi_pd_gpio = -EINVAL,
123
123
.usr_button_gpio = 4,
124
124
.mmc_caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
···
178
178
case 0:
179
179
printk(KERN_INFO "OMAP3 Beagle Rev: xM Ax/Bx\n");
180
180
omap3_beagle_version = OMAP3BEAGLE_BOARD_XM;
181
-
beagle_config.usb_pwr_level = GPIOF_OUT_INIT_HIGH;
181
+
beagle_config.usb_pwr_level = 1;
182
182
beagle_config.mmc_caps &= ~MMC_CAP_8_BIT_DATA;
183
183
break;
184
184
case 2:
+2
-2
arch/arm/mach-omap2/board-rx51-peripherals.c
+2
-2
arch/arm/mach-omap2/board-rx51-peripherals.c
···
73
73
#define LIS302_IRQ1_GPIO 181
74
74
#define LIS302_IRQ2_GPIO 180 /* Not yet in use */
75
75
76
-
/* list all spi devices here */
76
+
/* List all SPI devices here. Note that the list/probe order seems to matter! */
77
77
enum {
78
78
RX51_SPI_WL1251,
79
-
RX51_SPI_MIPID, /* LCD panel */
80
79
RX51_SPI_TSC2005, /* Touch Controller */
80
+
RX51_SPI_MIPID, /* LCD panel */
81
81
};
82
82
83
83
static struct wl12xx_platform_data wl1251_pdata;
+12
-26
arch/arm/mach-omap2/gpmc.c
+12
-26
arch/arm/mach-omap2/gpmc.c
···
1520
1520
return ret;
1521
1521
}
1522
1522
1523
-
for_each_node_by_name(child, "nand") {
1524
-
ret = gpmc_probe_nand_child(pdev, child);
1525
-
if (ret < 0) {
1526
-
of_node_put(child);
1527
-
return ret;
1528
-
}
1529
-
}
1523
+
for_each_child_of_node(pdev->dev.of_node, child) {
1530
1524
1531
-
for_each_node_by_name(child, "onenand") {
1532
-
ret = gpmc_probe_onenand_child(pdev, child);
1533
-
if (ret < 0) {
1534
-
of_node_put(child);
1535
-
return ret;
1536
-
}
1537
-
}
1525
+
if (!child->name)
1526
+
continue;
1538
1527
1539
-
for_each_node_by_name(child, "nor") {
1540
-
ret = gpmc_probe_generic_child(pdev, child);
1541
-
if (ret < 0) {
1542
-
of_node_put(child);
1543
-
return ret;
1544
-
}
1545
-
}
1528
+
if (of_node_cmp(child->name, "nand") == 0)
1529
+
ret = gpmc_probe_nand_child(pdev, child);
1530
+
else if (of_node_cmp(child->name, "onenand") == 0)
1531
+
ret = gpmc_probe_onenand_child(pdev, child);
1532
+
else if (of_node_cmp(child->name, "ethernet") == 0 ||
1533
+
of_node_cmp(child->name, "nor") == 0)
1534
+
ret = gpmc_probe_generic_child(pdev, child);
1546
1535
1547
-
for_each_node_by_name(child, "ethernet") {
1548
-
ret = gpmc_probe_generic_child(pdev, child);
1549
-
if (ret < 0) {
1536
+
if (WARN(ret < 0, "%s: probing gpmc child %s failed\n",
1537
+
__func__, child->full_name))
1550
1538
of_node_put(child);
1551
-
return ret;
1552
-
}
1553
1539
}
1554
1540
1555
1541
return 0;
+8
-5
arch/arm/mach-omap2/id.c
+8
-5
arch/arm/mach-omap2/id.c
···
419
419
cpu_rev = "1.0";
420
420
break;
421
421
case 1:
422
-
/* FALLTHROUGH */
423
-
default:
424
422
omap_revision = AM335X_REV_ES2_0;
425
423
cpu_rev = "2.0";
424
+
break;
425
+
case 2:
426
+
/* FALLTHROUGH */
427
+
default:
428
+
omap_revision = AM335X_REV_ES2_1;
429
+
cpu_rev = "2.1";
426
430
break;
427
431
}
428
432
break;
···
648
644
soc_dev_attr->revision = soc_rev;
649
645
650
646
soc_dev = soc_device_register(soc_dev_attr);
651
-
if (IS_ERR_OR_NULL(soc_dev)) {
647
+
if (IS_ERR(soc_dev)) {
652
648
kfree(soc_dev_attr);
653
649
return;
654
650
}
655
651
656
652
parent = soc_device_to_device(soc_dev);
657
-
if (!IS_ERR_OR_NULL(parent))
658
-
device_create_file(parent, &omap_soc_attr);
653
+
device_create_file(parent, &omap_soc_attr);
659
654
}
660
655
#endif /* CONFIG_SOC_BUS */
+5
-1
arch/arm/mach-omap2/mux34xx.h
+5
-1
arch/arm/mach-omap2/mux34xx.h
···
393
393
#define OMAP3_CONTROL_PADCONF_SAD2D_SWAKEUP_OFFSET 0xa1c
394
394
#define OMAP3_CONTROL_PADCONF_JTAG_RTCK_OFFSET 0xa1e
395
395
#define OMAP3_CONTROL_PADCONF_JTAG_TDO_OFFSET 0xa20
396
+
#define OMAP3_CONTROL_PADCONF_GPIO_127 0xa24
397
+
#define OMAP3_CONTROL_PADCONF_GPIO_126 0xa26
398
+
#define OMAP3_CONTROL_PADCONF_GPIO_128 0xa28
399
+
#define OMAP3_CONTROL_PADCONF_GPIO_129 0xa2a
396
400
397
401
#define OMAP3_CONTROL_PADCONF_MUX_SIZE \
398
-
(OMAP3_CONTROL_PADCONF_JTAG_TDO_OFFSET + 0x2)
402
+
(OMAP3_CONTROL_PADCONF_GPIO_129 + 0x2)
+1
-1
arch/arm/mach-omap2/omap_device.c
+1
-1
arch/arm/mach-omap2/omap_device.c
+2
arch/arm/mach-omap2/soc.h
+2
arch/arm/mach-omap2/soc.h
···
396
396
#define AM335X_CLASS 0x33500033
397
397
#define AM335X_REV_ES1_0 AM335X_CLASS
398
398
#define AM335X_REV_ES2_0 (AM335X_CLASS | (0x1 << 8))
399
+
#define AM335X_REV_ES2_1 (AM335X_CLASS | (0x2 << 8))
399
400
400
401
#define OMAP443X_CLASS 0x44300044
401
402
#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8))
···
497
496
#define omap_subsys_initcall(fn) omap_initcall(subsys_initcall, fn)
498
497
#define omap_device_initcall(fn) omap_initcall(device_initcall, fn)
499
498
#define omap_late_initcall(fn) omap_initcall(late_initcall, fn)
499
+
#define omap_late_initcall_sync(fn) omap_initcall(late_initcall_sync, fn)
500
500
501
501
#endif /* __ASSEMBLY__ */
502
502
+1
-1
arch/arm/mach-prima2/Kconfig
+1
-1
arch/arm/mach-prima2/Kconfig
+2
arch/arm/mach-spear/spear13xx.c
+2
arch/arm/mach-spear/spear13xx.c
+1
arch/arm/mach-tegra/Kconfig
+1
arch/arm/mach-tegra/Kconfig
+2
arch/arm/mach-ux500/Kconfig
+2
arch/arm/mach-ux500/Kconfig
+2
-2
arch/arm/mach-ux500/board-mop500.c
+2
-2
arch/arm/mach-ux500/board-mop500.c
+1
-1
arch/arm/mach-ux500/cpu-db8500.c
+1
-1
arch/arm/mach-ux500/cpu-db8500.c
···
191
191
/* Throw these device-specific numbers into the entropy pool */
192
192
add_device_randomness(uid, 0x14);
193
193
return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
194
-
readl((u32 *)uid+1),
194
+
readl((u32 *)uid+0),
195
195
readl((u32 *)uid+1), readl((u32 *)uid+2),
196
196
readl((u32 *)uid+3), readl((u32 *)uid+4));
197
197
}
+1
-1
drivers/video/Kconfig
+1
-1
drivers/video/Kconfig
+4
-4
drivers/video/mxsfb.c
+4
-4
drivers/video/mxsfb.c
···
42
42
#include <linux/module.h>
43
43
#include <linux/kernel.h>
44
44
#include <linux/of_device.h>
45
-
#include <video/of_display_timing.h>
46
45
#include <linux/platform_device.h>
47
46
#include <linux/clk.h>
48
47
#include <linux/dma-mapping.h>
···
49
50
#include <linux/pinctrl/consumer.h>
50
51
#include <linux/fb.h>
51
52
#include <linux/regulator/consumer.h>
53
+
#include <video/of_display_timing.h>
52
54
#include <video/videomode.h>
53
55
54
56
#define REG_SET 4
···
777
777
struct videomode vm;
778
778
struct fb_videomode fb_vm;
779
779
780
-
ret = videomode_from_timing(timings, &vm, i);
780
+
ret = videomode_from_timings(timings, &vm, i);
781
781
if (ret < 0)
782
782
goto put_timings_node;
783
783
ret = fb_videomode_from_videomode(&vm, &fb_vm);
784
784
if (ret < 0)
785
785
goto put_timings_node;
786
786
787
-
if (vm.data_flags & DISPLAY_FLAGS_DE_HIGH)
787
+
if (vm.flags & DISPLAY_FLAGS_DE_HIGH)
788
788
host->sync |= MXSFB_SYNC_DATA_ENABLE_HIGH_ACT;
789
-
if (vm.data_flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
789
+
if (vm.flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
790
790
host->sync |= MXSFB_SYNC_DOTCLK_FALLING_ACT;
791
791
fb_add_videomode(&fb_vm, &fb_info->modelist);
792
792
}
-41
include/linux/platform_data/imx-iram.h
-41
include/linux/platform_data/imx-iram.h
···
1
-
/*
2
-
* Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3
-
*
4
-
* This program is free software; you can redistribute it and/or
5
-
* modify it under the terms of the GNU General Public License
6
-
* as published by the Free Software Foundation; either version 2
7
-
* of the License, or (at your option) any later version.
8
-
*
9
-
* This program is distributed in the hope that it will be useful,
10
-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
11
-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12
-
* GNU General Public License for more details.
13
-
*
14
-
* You should have received a copy of the GNU General Public License
15
-
* along with this program; if not, write to the Free Software
16
-
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17
-
* MA 02110-1301, USA.
18
-
*/
19
-
#include <linux/errno.h>
20
-
21
-
#ifdef CONFIG_IRAM_ALLOC
22
-
23
-
int __init iram_init(unsigned long base, unsigned long size);
24
-
void __iomem *iram_alloc(unsigned int size, unsigned long *dma_addr);
25
-
void iram_free(unsigned long dma_addr, unsigned int size);
26
-
27
-
#else
28
-
29
-
static inline int __init iram_init(unsigned long base, unsigned long size)
30
-
{
31
-
return -ENOMEM;
32
-
}
33
-
34
-
static inline void __iomem *iram_alloc(unsigned int size, unsigned long *dma_addr)
35
-
{
36
-
return NULL;
37
-
}
38
-
39
-
static inline void iram_free(unsigned long base, unsigned long size) {}
40
-
41
-
#endif