Rockbox open source high quality audio player as a Music Player Daemon
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echoplayer: clock FMC from PLL1Q

Unlinking the FMC from the bus clock should make it
simpler to do CPU frequency scaling later on.

Change-Id: Ia87bbe3dd01ff25ea1520309680017b400471bfe

authored by

Aidan MacDonald and committed by
Solomon Peachy
87f20246 b155e2c3

+4 -4
+3 -3
firmware/target/arm/stm32/echoplayer/clock-echoplayer.c
··· 27 27 #include "regs/stm32h743/rcc.h" 28 28 #include "regs/stm32h743/syscfg.h" 29 29 30 - #define PLL1Q_FREQ 48000000 30 + #define PLL1Q_FREQ 240000000 31 31 #define PLL3R_FREQ 6000000 32 32 33 33 /* Flag to use VOS0 */ ··· 47 47 "HSE frequency not correct"); 48 48 _Static_assert(LCD_DOTCLOCK_FREQ <= PLL3R_FREQ, 49 49 "PLL3R too slow for LCD"); 50 - _Static_assert(PLL1Q_FREQ == 48000000, 50 + _Static_assert(PLL1Q_FREQ == 240000000, 51 51 "PLL1Q parameters not correct"); 52 52 53 53 /* ··· 82 82 reg_writef(RCC_PLL1DIVR, 83 83 DIVN(80 - 1), /* 6 * 80 = 480 MHz */ 84 84 DIVP(1 - 1), /* 480 / 1 = 480 MHz */ 85 - DIVQ(10 - 1), /* 480 / 10 = 48 MHz */ 85 + DIVQ(2 - 1), /* 480 / 2 = 240 MHz */ 86 86 DIVR(1 - 1)); 87 87 88 88 reg_writef(RCC_PLL3DIVR,
+1 -1
firmware/target/arm/stm32/echoplayer/system-echoplayer.c
··· 133 133 INIT_ATTR static void fmc_init(void) 134 134 { 135 135 /* configure clock */ 136 - reg_writef(RCC_D1CCIPR, FMCSEL_V(AHB)); 136 + reg_writef(RCC_D1CCIPR, FMCSEL_V(PLL1Q)); 137 137 138 138 /* ungate FMC peripheral */ 139 139 reg_writef(RCC_AHB3ENR, FMCEN(1));